Simple driver for the 20-bit ADC MAX1120x from Maxim

Committer:
macgyveremir
Date:
Tue Aug 21 21:55:40 2012 +0000
Revision:
0:af630aa9a00d
Child:
1:17195d284d76
Basic functionality programmed. Not tested yet on an actual device.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
macgyveremir 0:af630aa9a00d 1 #ifndef __MAX1120X_H__
macgyveremir 0:af630aa9a00d 2 #define __MAX1120X_H__
macgyveremir 0:af630aa9a00d 3
macgyveremir 0:af630aa9a00d 4 #include "mbed.h"
macgyveremir 0:af630aa9a00d 5
macgyveremir 0:af630aa9a00d 6 // Status flag
macgyveremir 0:af630aa9a00d 7 #define NOT_READY 1
macgyveremir 0:af630aa9a00d 8 #define READY 0
macgyveremir 0:af630aa9a00d 9
macgyveremir 0:af630aa9a00d 10 // Start bit
macgyveremir 0:af630aa9a00d 11 #define START 0x80
macgyveremir 0:af630aa9a00d 12
macgyveremir 0:af630aa9a00d 13 // Mode selection
macgyveremir 0:af630aa9a00d 14 #define MODE_ACTION (0<<6)
macgyveremir 0:af630aa9a00d 15 #define MODE_REGISTER (1<<6)
macgyveremir 0:af630aa9a00d 16
macgyveremir 0:af630aa9a00d 17 // Mode 0 Actions table
macgyveremir 0:af630aa9a00d 18 #define ACT_SELF_CAL 0x10
macgyveremir 0:af630aa9a00d 19 #define ACT_SYS_OFF_CAL 0x20
macgyveremir 0:af630aa9a00d 20 #define ACT_SYS_GAN_CAL 0x30
macgyveremir 0:af630aa9a00d 21 #define ACT_POWERDOWN 0x08
macgyveremir 0:af630aa9a00d 22 #define ACT_CONV_1SPS 0x00
macgyveremir 0:af630aa9a00d 23 #define ACT_CONV_2_5SPS 0x01
macgyveremir 0:af630aa9a00d 24 #define ACT_CONV_5SPS 0x02
macgyveremir 0:af630aa9a00d 25 #define ACT_CONV_10SPS 0x03
macgyveremir 0:af630aa9a00d 26 #define ACT_CONV_15SPS 0x04
macgyveremir 0:af630aa9a00d 27 #define ACT_CONV_30SPS 0x05
macgyveremir 0:af630aa9a00d 28 #define ACT_CONV_60SPS 0x06
macgyveremir 0:af630aa9a00d 29 #define ACT_CONV_120SPS 0x07
macgyveremir 0:af630aa9a00d 30
macgyveremir 0:af630aa9a00d 31 // Mode 1 Registers table
macgyveremir 0:af630aa9a00d 32 #define REG_DO_READ 1 // Point register for read
macgyveremir 0:af630aa9a00d 33 #define REG_DO_WRITE 0 // Point register for write
macgyveremir 0:af630aa9a00d 34 #define REG_STAT1 (0<<1) // Status flags
macgyveremir 0:af630aa9a00d 35 #define REG_CTRL1 (1<<1) // Converter operation settings
macgyveremir 0:af630aa9a00d 36 #define REG_CTRL2 (2<<1) // GPIO pins control
macgyveremir 0:af630aa9a00d 37 #define REG_CTRL3 (3<<1) // Gain & Calibration settings
macgyveremir 0:af630aa9a00d 38 #define REG_DATA (4<<1) // Sample result
macgyveremir 0:af630aa9a00d 39 #define REG_SOC (5<<1) // Offset Sys Calibration value
macgyveremir 0:af630aa9a00d 40 #define REG_SGC (6<<1) // Gain Sys Calibration value
macgyveremir 0:af630aa9a00d 41 #define REG_SCOC (7<<1) // Offset Self-Calibration value
macgyveremir 0:af630aa9a00d 42 #define REG_SCGC (8<<1) // gain Self-Calibration value
macgyveremir 0:af630aa9a00d 43
macgyveremir 0:af630aa9a00d 44 // Registers' bits
macgyveremir 0:af630aa9a00d 45 #define STAT1_RDY (1<<0)
macgyveremir 0:af630aa9a00d 46 #define STAT1_MSTAT (1<<1)
macgyveremir 0:af630aa9a00d 47 #define STAT1_OR (1<<3)
macgyveremir 0:af630aa9a00d 48 #define STAT1_UR (1<<4)
macgyveremir 0:af630aa9a00d 49
macgyveremir 0:af630aa9a00d 50 #define CTRL1_SCYCLE (1<<1)
macgyveremir 0:af630aa9a00d 51 #define CTRL1_FORMAT (1<<2)
macgyveremir 0:af630aa9a00d 52 #define CTRL1_SIGBUF (1<<3)
macgyveremir 0:af630aa9a00d 53 #define CTRL1_REFBUF (1<<4)
macgyveremir 0:af630aa9a00d 54 #define CTRL1_EXTCLK (1<<5)
macgyveremir 0:af630aa9a00d 55 #define CTRL1_UNIP_BIP (1<<6)
macgyveremir 0:af630aa9a00d 56 #define CTRL1_LINEF (1<<7)
macgyveremir 0:af630aa9a00d 57
macgyveremir 0:af630aa9a00d 58 #define CTRL2_DIR_MASK 0xF0
macgyveremir 0:af630aa9a00d 59 #define CTRL2_DIO_MASK 0x0F
macgyveremir 0:af630aa9a00d 60
macgyveremir 0:af630aa9a00d 61 #define CTRL3_DGAIN_MASK 0xE0
macgyveremir 0:af630aa9a00d 62 #define CTRL3_NOSYSG (1<<4)
macgyveremir 0:af630aa9a00d 63 #define CTRL3_NOSYSO (1<<3)
macgyveremir 0:af630aa9a00d 64 #define CTRL3_NOSCG (1<<2)
macgyveremir 0:af630aa9a00d 65 #define CTRL3_NOSCO (1<<1)
macgyveremir 0:af630aa9a00d 66
macgyveremir 0:af630aa9a00d 67 #endif /*__MAX1120X_H__*/
macgyveremir 0:af630aa9a00d 68