Luis Linares / MAX1120x

Simple driver for the 20-bit ADC MAX1120x from Maxim

MAX1120x.h@3:9bf082d65d25, 2012-10-23 (annotated)

Committer:
macgyveremir
Date:
Tue Oct 23 19:09:00 2012 +0000
Revision:
3:9bf082d65d25
Parent:
2:26afdc979a54 
Working implementation. Can easily be extended to include higher-level functions

Who changed what in which revision?

UserRevisionLine numberNew contents of line
macgyveremir 0:af630aa9a00d 1 #ifndef __MAX1120X_H__
macgyveremir 0:af630aa9a00d 2 #define __MAX1120X_H__
macgyveremir 0:af630aa9a00d 3
macgyveremir 0:af630aa9a00d 4 #include "mbed.h"
macgyveremir 0:af630aa9a00d 5
macgyveremir 0:af630aa9a00d 6 // Status flag
macgyveremir 0:af630aa9a00d 7 #define NOT_READY 1
macgyveremir 0:af630aa9a00d 8 #define READY 0
macgyveremir 0:af630aa9a00d 9
macgyveremir 0:af630aa9a00d 10 // Start bit
macgyveremir 2:26afdc979a54 11 #define START (1<<7)
macgyveremir 0:af630aa9a00d 12
macgyveremir 0:af630aa9a00d 13 // Mode selection
macgyveremir 2:26afdc979a54 14 #define MODE_BIT 6
macgyveremir 2:26afdc979a54 15 #define REGISTER_OP_BIT 0
macgyveremir 2:26afdc979a54 16 #define mode_register_write(x) ((START | x | (1<<MODE_BIT)) & (~(1<<REGISTER_OP_BIT)) )
macgyveremir 2:26afdc979a54 17 #define mode_register_read(x) (START | x | (1<<MODE_BIT) | (1<<REGISTER_OP_BIT))
macgyveremir 2:26afdc979a54 18 #define mode_action(x) ((START | x) & (~(1<<MODE_BIT)) )
macgyveremir 0:af630aa9a00d 19
macgyveremir 2:26afdc979a54 20 // Mode 0 (action) Actions table
macgyveremir 0:af630aa9a00d 21 #define ACT_SELF_CAL 0x10
macgyveremir 0:af630aa9a00d 22 #define ACT_SYS_OFF_CAL 0x20
macgyveremir 0:af630aa9a00d 23 #define ACT_SYS_GAN_CAL 0x30
macgyveremir 0:af630aa9a00d 24 #define ACT_POWERDOWN 0x08
macgyveremir 0:af630aa9a00d 25 #define ACT_CONV_1SPS 0x00
macgyveremir 0:af630aa9a00d 26 #define ACT_CONV_2_5SPS 0x01
macgyveremir 0:af630aa9a00d 27 #define ACT_CONV_5SPS 0x02
macgyveremir 0:af630aa9a00d 28 #define ACT_CONV_10SPS 0x03
macgyveremir 0:af630aa9a00d 29 #define ACT_CONV_15SPS 0x04
macgyveremir 0:af630aa9a00d 30 #define ACT_CONV_30SPS 0x05
macgyveremir 0:af630aa9a00d 31 #define ACT_CONV_60SPS 0x06
macgyveremir 0:af630aa9a00d 32 #define ACT_CONV_120SPS 0x07
macgyveremir 0:af630aa9a00d 33
macgyveremir 2:26afdc979a54 34 // Mode 1 (command) Registers table
macgyveremir 2:26afdc979a54 35 #define RS3 4
macgyveremir 2:26afdc979a54 36 #define RS2 3
macgyveremir 2:26afdc979a54 37 #define RS1 2
macgyveremir 2:26afdc979a54 38 #define RS0 1
macgyveremir 2:26afdc979a54 39 #define REG_STAT1 (0x00) // Status flags
macgyveremir 2:26afdc979a54 40 #define REG_CTRL1 ((1<<RS0)) // Converter operation settings
macgyveremir 2:26afdc979a54 41 #define REG_CTRL2 ((1<<RS1)) // GPIO pins control
macgyveremir 2:26afdc979a54 42 #define REG_CTRL3 ((1<<RS0) | (1<<RS1)) // Gain & Calibration settings
macgyveremir 2:26afdc979a54 43 #define REG_DATA ((1<<RS2)) // Sample result
macgyveremir 2:26afdc979a54 44 #define REG_SOC ((1<<RS2) | (1<<RS0)) // Offset Sys Calibration value
macgyveremir 2:26afdc979a54 45 #define REG_SGC ((1<<RS2) | (1<<RS1)) // Gain Sys Calibration value
macgyveremir 2:26afdc979a54 46 #define REG_SCOC ((1<<RS2) | (1<<RS1) | (1<<RS0)) // Offset Self-Calibration value
macgyveremir 2:26afdc979a54 47 #define REG_SCGC ((1<<RS3)) // Gain Self-Calibration value
macgyveremir 0:af630aa9a00d 48
macgyveremir 0:af630aa9a00d 49 // Registers' bits
macgyveremir 0:af630aa9a00d 50 #define STAT1_RDY (1<<0)
macgyveremir 0:af630aa9a00d 51 #define STAT1_MSTAT (1<<1)
macgyveremir 2:26afdc979a54 52 #define STAT1_UR (1<<2)
macgyveremir 0:af630aa9a00d 53 #define STAT1_OR (1<<3)
macgyveremir 2:26afdc979a54 54 #define STAT1_RATE0 (1<<4)
macgyveremir 2:26afdc979a54 55 #define STAT1_RATE1 (1<<5)
macgyveremir 2:26afdc979a54 56 #define STAT1_RATE2 (1<<6)
macgyveremir 2:26afdc979a54 57 #define STAT1_SYSOR (1<<7)
macgyveremir 0:af630aa9a00d 58
macgyveremir 0:af630aa9a00d 59 #define CTRL1_SCYCLE (1<<1)
macgyveremir 0:af630aa9a00d 60 #define CTRL1_FORMAT (1<<2)
macgyveremir 0:af630aa9a00d 61 #define CTRL1_SIGBUF (1<<3)
macgyveremir 0:af630aa9a00d 62 #define CTRL1_REFBUF (1<<4)
macgyveremir 0:af630aa9a00d 63 #define CTRL1_EXTCLK (1<<5)
macgyveremir 0:af630aa9a00d 64 #define CTRL1_UNIP_BIP (1<<6)
macgyveremir 0:af630aa9a00d 65 #define CTRL1_LINEF (1<<7)
macgyveremir 0:af630aa9a00d 66
macgyveremir 0:af630aa9a00d 67 #define CTRL2_DIR_MASK 0xF0
macgyveremir 0:af630aa9a00d 68 #define CTRL2_DIO_MASK 0x0F
macgyveremir 0:af630aa9a00d 69
macgyveremir 0:af630aa9a00d 70 #define CTRL3_DGAIN_MASK 0xE0
macgyveremir 0:af630aa9a00d 71 #define CTRL3_NOSYSG (1<<4)
macgyveremir 0:af630aa9a00d 72 #define CTRL3_NOSYSO (1<<3)
macgyveremir 0:af630aa9a00d 73 #define CTRL3_NOSCG (1<<2)
macgyveremir 0:af630aa9a00d 74 #define CTRL3_NOSCO (1<<1)
macgyveremir 0:af630aa9a00d 75
macgyveremir 2:26afdc979a54 76 // SPI interface configuration
macgyveremir 2:26afdc979a54 77 #define MAX1120x_SPI_MODE 3
macgyveremir 2:26afdc979a54 78
macgyveremir 1:17195d284d76 79
macgyveremir 1:17195d284d76 80 typedef unsigned int uint;
macgyveremir 1:17195d284d76 81
macgyveremir 2:26afdc979a54 82 union UI32toC_t
macgyveremir 2:26afdc979a54 83 {
macgyveremir 2:26afdc979a54 84 char bytes[sizeof(unsigned int)];
macgyveremir 2:26afdc979a54 85 unsigned int value;
macgyveremir 2:26afdc979a54 86 };
macgyveremir 2:26afdc979a54 87
macgyveremir 1:17195d284d76 88 class MAX1120x
macgyveremir 1:17195d284d76 89 {
macgyveremir 1:17195d284d76 90 SPI *spi;
macgyveremir 1:17195d284d76 91 DigitalOut *cs;
macgyveremir 1:17195d284d76 92 DigitalIn *rdy_dout;
macgyveremir 1:17195d284d76 93
macgyveremir 1:17195d284d76 94 public:
macgyveremir 1:17195d284d76 95 MAX1120x (SPI *, DigitalIn *, DigitalOut *);
macgyveremir 1:17195d284d76 96
macgyveremir 2:26afdc979a54 97 // Low-level operations
macgyveremir 1:17195d284d76 98 void do_self_calibration ();
macgyveremir 2:26afdc979a54 99 void calibrate_system_zero ();
macgyveremir 2:26afdc979a54 100 void calibrate_system_gain ();
macgyveremir 2:26afdc979a54 101 char get_status ();
macgyveremir 1:17195d284d76 102 void set_control_1 (char);
macgyveremir 1:17195d284d76 103 char get_control_1 ();
macgyveremir 1:17195d284d76 104 void set_control_2 (char);
macgyveremir 1:17195d284d76 105 char get_control_2 ();
macgyveremir 2:26afdc979a54 106 void set_control_3 (char);
macgyveremir 2:26afdc979a54 107 char get_control_3 ();
macgyveremir 1:17195d284d76 108 unsigned int get_single_sample ();
macgyveremir 2:26afdc979a54 109 unsigned int get_cal_register (char);
macgyveremir 2:26afdc979a54 110
macgyveremir 2:26afdc979a54 111 // High-level operations
macgyveremir 2:26afdc979a54 112 void init_singlecycle_unipolar_nosyscal ();
macgyveremir 1:17195d284d76 113 };
macgyveremir 1:17195d284d76 114
macgyveremir 0:af630aa9a00d 115 #endif /*__MAX1120X_H__*/
macgyveremir 0:af630aa9a00d 116