xeye_ atsu
/
I2S_AIC23B_32khz_wavtest
I2S_Example/lpc17xx_uart.c@0:63ed631d8c3a, 2011-01-21 (annotated)
- Committer:
- lynxeyed_atsu
- Date:
- Fri Jan 21 08:39:48 2011 +0000
- Revision:
- 0:63ed631d8c3a
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
lynxeyed_atsu | 0:63ed631d8c3a | 1 | /***********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 2 | * @file lpc17xx_uart.c |
lynxeyed_atsu | 0:63ed631d8c3a | 3 | * @brief Contains all functions support for UART firmware library on LPC17xx |
lynxeyed_atsu | 0:63ed631d8c3a | 4 | * @version 3.0 |
lynxeyed_atsu | 0:63ed631d8c3a | 5 | * @date 18. June. 2010 |
lynxeyed_atsu | 0:63ed631d8c3a | 6 | * @author NXP MCU SW Application Team |
lynxeyed_atsu | 0:63ed631d8c3a | 7 | ************************************************************************** |
lynxeyed_atsu | 0:63ed631d8c3a | 8 | * Software that is described herein is for illustrative purposes only |
lynxeyed_atsu | 0:63ed631d8c3a | 9 | * which provides customers with programming information regarding the |
lynxeyed_atsu | 0:63ed631d8c3a | 10 | * products. This software is supplied "AS IS" without any warranties. |
lynxeyed_atsu | 0:63ed631d8c3a | 11 | * NXP Semiconductors assumes no responsibility or liability for the |
lynxeyed_atsu | 0:63ed631d8c3a | 12 | * use of the software, conveys no license or title under any patent, |
lynxeyed_atsu | 0:63ed631d8c3a | 13 | * copyright, or mask work right to the product. NXP Semiconductors |
lynxeyed_atsu | 0:63ed631d8c3a | 14 | * reserves the right to make changes in the software without |
lynxeyed_atsu | 0:63ed631d8c3a | 15 | * notification. NXP Semiconductors also make no representation or |
lynxeyed_atsu | 0:63ed631d8c3a | 16 | * warranty that such application will be suitable for the specified |
lynxeyed_atsu | 0:63ed631d8c3a | 17 | * use without further testing or modification. |
lynxeyed_atsu | 0:63ed631d8c3a | 18 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 19 | |
lynxeyed_atsu | 0:63ed631d8c3a | 20 | /* Peripheral group ----------------------------------------------------------- */ |
lynxeyed_atsu | 0:63ed631d8c3a | 21 | /** @addtogroup UART |
lynxeyed_atsu | 0:63ed631d8c3a | 22 | * @{ |
lynxeyed_atsu | 0:63ed631d8c3a | 23 | */ |
lynxeyed_atsu | 0:63ed631d8c3a | 24 | |
lynxeyed_atsu | 0:63ed631d8c3a | 25 | /* Includes ------------------------------------------------------------------- */ |
lynxeyed_atsu | 0:63ed631d8c3a | 26 | #include "lpc17xx_uart.h" |
lynxeyed_atsu | 0:63ed631d8c3a | 27 | #include "lpc17xx_clkpwr.h" |
lynxeyed_atsu | 0:63ed631d8c3a | 28 | |
lynxeyed_atsu | 0:63ed631d8c3a | 29 | /* If this source file built with example, the LPC17xx FW library configuration |
lynxeyed_atsu | 0:63ed631d8c3a | 30 | * file in each example directory ("lpc17xx_libcfg.h") must be included, |
lynxeyed_atsu | 0:63ed631d8c3a | 31 | * otherwise the default FW library configuration file must be included instead |
lynxeyed_atsu | 0:63ed631d8c3a | 32 | */ |
lynxeyed_atsu | 0:63ed631d8c3a | 33 | #ifdef __BUILD_WITH_EXAMPLE__ |
lynxeyed_atsu | 0:63ed631d8c3a | 34 | #include "lpc17xx_libcfg.h" |
lynxeyed_atsu | 0:63ed631d8c3a | 35 | #else |
lynxeyed_atsu | 0:63ed631d8c3a | 36 | #include "lpc17xx_libcfg_default.h" |
lynxeyed_atsu | 0:63ed631d8c3a | 37 | #endif /* __BUILD_WITH_EXAMPLE__ */ |
lynxeyed_atsu | 0:63ed631d8c3a | 38 | |
lynxeyed_atsu | 0:63ed631d8c3a | 39 | |
lynxeyed_atsu | 0:63ed631d8c3a | 40 | #ifdef _UART |
lynxeyed_atsu | 0:63ed631d8c3a | 41 | |
lynxeyed_atsu | 0:63ed631d8c3a | 42 | /* Private Functions ---------------------------------------------------------- */ |
lynxeyed_atsu | 0:63ed631d8c3a | 43 | |
lynxeyed_atsu | 0:63ed631d8c3a | 44 | static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate); |
lynxeyed_atsu | 0:63ed631d8c3a | 45 | |
lynxeyed_atsu | 0:63ed631d8c3a | 46 | |
lynxeyed_atsu | 0:63ed631d8c3a | 47 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 48 | * @brief Determines best dividers to get a target clock rate |
lynxeyed_atsu | 0:63ed631d8c3a | 49 | * @param[in] UARTx Pointer to selected UART peripheral, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 50 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 51 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 52 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 53 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 54 | * @param[in] baudrate Desired UART baud rate. |
lynxeyed_atsu | 0:63ed631d8c3a | 55 | * @return Error status, could be: |
lynxeyed_atsu | 0:63ed631d8c3a | 56 | * - SUCCESS |
lynxeyed_atsu | 0:63ed631d8c3a | 57 | * - ERROR |
lynxeyed_atsu | 0:63ed631d8c3a | 58 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 59 | static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate) |
lynxeyed_atsu | 0:63ed631d8c3a | 60 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 61 | Status errorStatus = ERROR; |
lynxeyed_atsu | 0:63ed631d8c3a | 62 | |
lynxeyed_atsu | 0:63ed631d8c3a | 63 | uint32_t uClk = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 64 | uint32_t calcBaudrate = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 65 | uint32_t temp = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 66 | |
lynxeyed_atsu | 0:63ed631d8c3a | 67 | uint32_t mulFracDiv, dividerAddFracDiv; |
lynxeyed_atsu | 0:63ed631d8c3a | 68 | uint32_t diviser = 0 ; |
lynxeyed_atsu | 0:63ed631d8c3a | 69 | uint32_t mulFracDivOptimal = 1; |
lynxeyed_atsu | 0:63ed631d8c3a | 70 | uint32_t dividerAddOptimal = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 71 | uint32_t diviserOptimal = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 72 | |
lynxeyed_atsu | 0:63ed631d8c3a | 73 | uint32_t relativeError = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 74 | uint32_t relativeOptimalError = 100000; |
lynxeyed_atsu | 0:63ed631d8c3a | 75 | |
lynxeyed_atsu | 0:63ed631d8c3a | 76 | /* get UART block clock */ |
lynxeyed_atsu | 0:63ed631d8c3a | 77 | if (UARTx == (LPC_UART_TypeDef *)LPC_UART0) |
lynxeyed_atsu | 0:63ed631d8c3a | 78 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 79 | uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART0); |
lynxeyed_atsu | 0:63ed631d8c3a | 80 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 81 | else if (UARTx == (LPC_UART_TypeDef *)LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 82 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 83 | uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART1); |
lynxeyed_atsu | 0:63ed631d8c3a | 84 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 85 | else if (UARTx == LPC_UART2) |
lynxeyed_atsu | 0:63ed631d8c3a | 86 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 87 | uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART2); |
lynxeyed_atsu | 0:63ed631d8c3a | 88 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 89 | else if (UARTx == LPC_UART3) |
lynxeyed_atsu | 0:63ed631d8c3a | 90 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 91 | uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART3); |
lynxeyed_atsu | 0:63ed631d8c3a | 92 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 93 | |
lynxeyed_atsu | 0:63ed631d8c3a | 94 | |
lynxeyed_atsu | 0:63ed631d8c3a | 95 | uClk = uClk >> 4; /* div by 16 */ |
lynxeyed_atsu | 0:63ed631d8c3a | 96 | /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers |
lynxeyed_atsu | 0:63ed631d8c3a | 97 | * The formula is : |
lynxeyed_atsu | 0:63ed631d8c3a | 98 | * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL) |
lynxeyed_atsu | 0:63ed631d8c3a | 99 | * It involves floating point calculations. That's the reason the formulae are adjusted with |
lynxeyed_atsu | 0:63ed631d8c3a | 100 | * Multiply and divide method.*/ |
lynxeyed_atsu | 0:63ed631d8c3a | 101 | /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions: |
lynxeyed_atsu | 0:63ed631d8c3a | 102 | * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */ |
lynxeyed_atsu | 0:63ed631d8c3a | 103 | for (mulFracDiv = 1 ; mulFracDiv <= 15 ;mulFracDiv++) |
lynxeyed_atsu | 0:63ed631d8c3a | 104 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 105 | for (dividerAddFracDiv = 0 ; dividerAddFracDiv <= 15 ;dividerAddFracDiv++) |
lynxeyed_atsu | 0:63ed631d8c3a | 106 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 107 | temp = (mulFracDiv * uClk) / ((mulFracDiv + dividerAddFracDiv)); |
lynxeyed_atsu | 0:63ed631d8c3a | 108 | |
lynxeyed_atsu | 0:63ed631d8c3a | 109 | diviser = temp / baudrate; |
lynxeyed_atsu | 0:63ed631d8c3a | 110 | if ((temp % baudrate) > (baudrate / 2)) |
lynxeyed_atsu | 0:63ed631d8c3a | 111 | diviser++; |
lynxeyed_atsu | 0:63ed631d8c3a | 112 | |
lynxeyed_atsu | 0:63ed631d8c3a | 113 | if (diviser > 2 && diviser < 65536) |
lynxeyed_atsu | 0:63ed631d8c3a | 114 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 115 | calcBaudrate = temp / diviser; |
lynxeyed_atsu | 0:63ed631d8c3a | 116 | |
lynxeyed_atsu | 0:63ed631d8c3a | 117 | if (calcBaudrate <= baudrate) |
lynxeyed_atsu | 0:63ed631d8c3a | 118 | relativeError = baudrate - calcBaudrate; |
lynxeyed_atsu | 0:63ed631d8c3a | 119 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 120 | relativeError = calcBaudrate - baudrate; |
lynxeyed_atsu | 0:63ed631d8c3a | 121 | |
lynxeyed_atsu | 0:63ed631d8c3a | 122 | if ((relativeError < relativeOptimalError)) |
lynxeyed_atsu | 0:63ed631d8c3a | 123 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 124 | mulFracDivOptimal = mulFracDiv ; |
lynxeyed_atsu | 0:63ed631d8c3a | 125 | dividerAddOptimal = dividerAddFracDiv; |
lynxeyed_atsu | 0:63ed631d8c3a | 126 | diviserOptimal = diviser; |
lynxeyed_atsu | 0:63ed631d8c3a | 127 | relativeOptimalError = relativeError; |
lynxeyed_atsu | 0:63ed631d8c3a | 128 | if (relativeError == 0) |
lynxeyed_atsu | 0:63ed631d8c3a | 129 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 130 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 131 | } /* End of if */ |
lynxeyed_atsu | 0:63ed631d8c3a | 132 | } /* end of inner for loop */ |
lynxeyed_atsu | 0:63ed631d8c3a | 133 | if (relativeError == 0) |
lynxeyed_atsu | 0:63ed631d8c3a | 134 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 135 | } /* end of outer for loop */ |
lynxeyed_atsu | 0:63ed631d8c3a | 136 | |
lynxeyed_atsu | 0:63ed631d8c3a | 137 | if (relativeOptimalError < ((baudrate * UART_ACCEPTED_BAUDRATE_ERROR)/100)) |
lynxeyed_atsu | 0:63ed631d8c3a | 138 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 139 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 140 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 141 | ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 142 | ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/DLM = UART_LOAD_DLM(diviserOptimal); |
lynxeyed_atsu | 0:63ed631d8c3a | 143 | ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/DLL = UART_LOAD_DLL(diviserOptimal); |
lynxeyed_atsu | 0:63ed631d8c3a | 144 | /* Then reset DLAB bit */ |
lynxeyed_atsu | 0:63ed631d8c3a | 145 | ((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 146 | ((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(mulFracDivOptimal) \ |
lynxeyed_atsu | 0:63ed631d8c3a | 147 | | UART_FDR_DIVADDVAL(dividerAddOptimal)) & UART_FDR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 148 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 149 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 150 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 151 | UARTx->LCR |= UART_LCR_DLAB_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 152 | UARTx->/*DLIER.*/DLM = UART_LOAD_DLM(diviserOptimal); |
lynxeyed_atsu | 0:63ed631d8c3a | 153 | UARTx->/*RBTHDLR.*/DLL = UART_LOAD_DLL(diviserOptimal); |
lynxeyed_atsu | 0:63ed631d8c3a | 154 | /* Then reset DLAB bit */ |
lynxeyed_atsu | 0:63ed631d8c3a | 155 | UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 156 | UARTx->FDR = (UART_FDR_MULVAL(mulFracDivOptimal) \ |
lynxeyed_atsu | 0:63ed631d8c3a | 157 | | UART_FDR_DIVADDVAL(dividerAddOptimal)) & UART_FDR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 158 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 159 | errorStatus = SUCCESS; |
lynxeyed_atsu | 0:63ed631d8c3a | 160 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 161 | |
lynxeyed_atsu | 0:63ed631d8c3a | 162 | return errorStatus; |
lynxeyed_atsu | 0:63ed631d8c3a | 163 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 164 | |
lynxeyed_atsu | 0:63ed631d8c3a | 165 | /* End of Private Functions ---------------------------------------------------- */ |
lynxeyed_atsu | 0:63ed631d8c3a | 166 | |
lynxeyed_atsu | 0:63ed631d8c3a | 167 | |
lynxeyed_atsu | 0:63ed631d8c3a | 168 | /* Public Functions ----------------------------------------------------------- */ |
lynxeyed_atsu | 0:63ed631d8c3a | 169 | /** @addtogroup UART_Public_Functions |
lynxeyed_atsu | 0:63ed631d8c3a | 170 | * @{ |
lynxeyed_atsu | 0:63ed631d8c3a | 171 | */ |
lynxeyed_atsu | 0:63ed631d8c3a | 172 | /* UART Init/DeInit functions -------------------------------------------------*/ |
lynxeyed_atsu | 0:63ed631d8c3a | 173 | /********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 174 | * @brief Initializes the UARTx peripheral according to the specified |
lynxeyed_atsu | 0:63ed631d8c3a | 175 | * parameters in the UART_ConfigStruct. |
lynxeyed_atsu | 0:63ed631d8c3a | 176 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 177 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 178 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 179 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 180 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 181 | * @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure |
lynxeyed_atsu | 0:63ed631d8c3a | 182 | * that contains the configuration information for the |
lynxeyed_atsu | 0:63ed631d8c3a | 183 | * specified UART peripheral. |
lynxeyed_atsu | 0:63ed631d8c3a | 184 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 185 | *********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 186 | void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct) |
lynxeyed_atsu | 0:63ed631d8c3a | 187 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 188 | uint32_t tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 189 | |
lynxeyed_atsu | 0:63ed631d8c3a | 190 | // For debug mode |
lynxeyed_atsu | 0:63ed631d8c3a | 191 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 192 | CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits)); |
lynxeyed_atsu | 0:63ed631d8c3a | 193 | CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits)); |
lynxeyed_atsu | 0:63ed631d8c3a | 194 | CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity)); |
lynxeyed_atsu | 0:63ed631d8c3a | 195 | |
lynxeyed_atsu | 0:63ed631d8c3a | 196 | #ifdef _UART0 |
lynxeyed_atsu | 0:63ed631d8c3a | 197 | if(UARTx == (LPC_UART_TypeDef *)LPC_UART0) |
lynxeyed_atsu | 0:63ed631d8c3a | 198 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 199 | /* Set up clock and power for UART module */ |
lynxeyed_atsu | 0:63ed631d8c3a | 200 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 201 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 202 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 203 | |
lynxeyed_atsu | 0:63ed631d8c3a | 204 | #ifdef _UART1 |
lynxeyed_atsu | 0:63ed631d8c3a | 205 | if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 206 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 207 | /* Set up clock and power for UART module */ |
lynxeyed_atsu | 0:63ed631d8c3a | 208 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 209 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 210 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 211 | |
lynxeyed_atsu | 0:63ed631d8c3a | 212 | #ifdef _UART2 |
lynxeyed_atsu | 0:63ed631d8c3a | 213 | if(UARTx == LPC_UART2) |
lynxeyed_atsu | 0:63ed631d8c3a | 214 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 215 | /* Set up clock and power for UART module */ |
lynxeyed_atsu | 0:63ed631d8c3a | 216 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 217 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 218 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 219 | |
lynxeyed_atsu | 0:63ed631d8c3a | 220 | #ifdef _UART3 |
lynxeyed_atsu | 0:63ed631d8c3a | 221 | if(UARTx == LPC_UART3) |
lynxeyed_atsu | 0:63ed631d8c3a | 222 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 223 | /* Set up clock and power for UART module */ |
lynxeyed_atsu | 0:63ed631d8c3a | 224 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 225 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 226 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 227 | |
lynxeyed_atsu | 0:63ed631d8c3a | 228 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 229 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 230 | /* FIFOs are empty */ |
lynxeyed_atsu | 0:63ed631d8c3a | 231 | ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN \ |
lynxeyed_atsu | 0:63ed631d8c3a | 232 | | UART_FCR_RX_RS | UART_FCR_TX_RS); |
lynxeyed_atsu | 0:63ed631d8c3a | 233 | // Disable FIFO |
lynxeyed_atsu | 0:63ed631d8c3a | 234 | ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 235 | |
lynxeyed_atsu | 0:63ed631d8c3a | 236 | // Dummy reading |
lynxeyed_atsu | 0:63ed631d8c3a | 237 | while (((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_RDR) |
lynxeyed_atsu | 0:63ed631d8c3a | 238 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 239 | tmp = ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR; |
lynxeyed_atsu | 0:63ed631d8c3a | 240 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 241 | |
lynxeyed_atsu | 0:63ed631d8c3a | 242 | ((LPC_UART1_TypeDef *)UARTx)->TER = UART_TER_TXEN; |
lynxeyed_atsu | 0:63ed631d8c3a | 243 | // Wait for current transmit complete |
lynxeyed_atsu | 0:63ed631d8c3a | 244 | while (!(((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_THRE)); |
lynxeyed_atsu | 0:63ed631d8c3a | 245 | // Disable Tx |
lynxeyed_atsu | 0:63ed631d8c3a | 246 | ((LPC_UART1_TypeDef *)UARTx)->TER = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 247 | |
lynxeyed_atsu | 0:63ed631d8c3a | 248 | // Disable interrupt |
lynxeyed_atsu | 0:63ed631d8c3a | 249 | ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 250 | // Set LCR to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 251 | ((LPC_UART1_TypeDef *)UARTx)->LCR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 252 | // Set ACR to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 253 | ((LPC_UART1_TypeDef *)UARTx)->ACR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 254 | // Set Modem Control to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 255 | ((LPC_UART1_TypeDef *)UARTx)->MCR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 256 | // Set RS485 control to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 257 | ((LPC_UART1_TypeDef *)UARTx)->RS485CTRL = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 258 | // Set RS485 delay timer to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 259 | ((LPC_UART1_TypeDef *)UARTx)->RS485DLY = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 260 | // Set RS485 addr match to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 261 | ((LPC_UART1_TypeDef *)UARTx)->ADRMATCH = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 262 | //Dummy Reading to Clear Status |
lynxeyed_atsu | 0:63ed631d8c3a | 263 | tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR; |
lynxeyed_atsu | 0:63ed631d8c3a | 264 | tmp = ((LPC_UART1_TypeDef *)UARTx)->LSR; |
lynxeyed_atsu | 0:63ed631d8c3a | 265 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 266 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 267 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 268 | /* FIFOs are empty */ |
lynxeyed_atsu | 0:63ed631d8c3a | 269 | UARTx->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS); |
lynxeyed_atsu | 0:63ed631d8c3a | 270 | // Disable FIFO |
lynxeyed_atsu | 0:63ed631d8c3a | 271 | UARTx->/*IIFCR.*/FCR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 272 | |
lynxeyed_atsu | 0:63ed631d8c3a | 273 | // Dummy reading |
lynxeyed_atsu | 0:63ed631d8c3a | 274 | while (UARTx->LSR & UART_LSR_RDR) |
lynxeyed_atsu | 0:63ed631d8c3a | 275 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 276 | tmp = UARTx->/*RBTHDLR.*/RBR; |
lynxeyed_atsu | 0:63ed631d8c3a | 277 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 278 | |
lynxeyed_atsu | 0:63ed631d8c3a | 279 | UARTx->TER = UART_TER_TXEN; |
lynxeyed_atsu | 0:63ed631d8c3a | 280 | // Wait for current transmit complete |
lynxeyed_atsu | 0:63ed631d8c3a | 281 | while (!(UARTx->LSR & UART_LSR_THRE)); |
lynxeyed_atsu | 0:63ed631d8c3a | 282 | // Disable Tx |
lynxeyed_atsu | 0:63ed631d8c3a | 283 | UARTx->TER = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 284 | |
lynxeyed_atsu | 0:63ed631d8c3a | 285 | // Disable interrupt |
lynxeyed_atsu | 0:63ed631d8c3a | 286 | UARTx->/*DLIER.*/IER = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 287 | // Set LCR to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 288 | UARTx->LCR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 289 | // Set ACR to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 290 | UARTx->ACR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 291 | // Dummy reading |
lynxeyed_atsu | 0:63ed631d8c3a | 292 | tmp = UARTx->LSR; |
lynxeyed_atsu | 0:63ed631d8c3a | 293 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 294 | |
lynxeyed_atsu | 0:63ed631d8c3a | 295 | if (UARTx == LPC_UART3) |
lynxeyed_atsu | 0:63ed631d8c3a | 296 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 297 | // Set IrDA to default state |
lynxeyed_atsu | 0:63ed631d8c3a | 298 | UARTx->ICR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 299 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 300 | |
lynxeyed_atsu | 0:63ed631d8c3a | 301 | // Set Line Control register ---------------------------- |
lynxeyed_atsu | 0:63ed631d8c3a | 302 | |
lynxeyed_atsu | 0:63ed631d8c3a | 303 | uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate)); |
lynxeyed_atsu | 0:63ed631d8c3a | 304 | |
lynxeyed_atsu | 0:63ed631d8c3a | 305 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 306 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 307 | tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \ |
lynxeyed_atsu | 0:63ed631d8c3a | 308 | & UART_LCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 309 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 310 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 311 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 312 | tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 313 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 314 | |
lynxeyed_atsu | 0:63ed631d8c3a | 315 | switch (UART_ConfigStruct->Databits){ |
lynxeyed_atsu | 0:63ed631d8c3a | 316 | case UART_DATABIT_5: |
lynxeyed_atsu | 0:63ed631d8c3a | 317 | tmp |= UART_LCR_WLEN5; |
lynxeyed_atsu | 0:63ed631d8c3a | 318 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 319 | case UART_DATABIT_6: |
lynxeyed_atsu | 0:63ed631d8c3a | 320 | tmp |= UART_LCR_WLEN6; |
lynxeyed_atsu | 0:63ed631d8c3a | 321 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 322 | case UART_DATABIT_7: |
lynxeyed_atsu | 0:63ed631d8c3a | 323 | tmp |= UART_LCR_WLEN7; |
lynxeyed_atsu | 0:63ed631d8c3a | 324 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 325 | case UART_DATABIT_8: |
lynxeyed_atsu | 0:63ed631d8c3a | 326 | default: |
lynxeyed_atsu | 0:63ed631d8c3a | 327 | tmp |= UART_LCR_WLEN8; |
lynxeyed_atsu | 0:63ed631d8c3a | 328 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 329 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 330 | |
lynxeyed_atsu | 0:63ed631d8c3a | 331 | if (UART_ConfigStruct->Parity == UART_PARITY_NONE) |
lynxeyed_atsu | 0:63ed631d8c3a | 332 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 333 | // Do nothing... |
lynxeyed_atsu | 0:63ed631d8c3a | 334 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 335 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 336 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 337 | tmp |= UART_LCR_PARITY_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 338 | switch (UART_ConfigStruct->Parity) |
lynxeyed_atsu | 0:63ed631d8c3a | 339 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 340 | case UART_PARITY_ODD: |
lynxeyed_atsu | 0:63ed631d8c3a | 341 | tmp |= UART_LCR_PARITY_ODD; |
lynxeyed_atsu | 0:63ed631d8c3a | 342 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 343 | |
lynxeyed_atsu | 0:63ed631d8c3a | 344 | case UART_PARITY_EVEN: |
lynxeyed_atsu | 0:63ed631d8c3a | 345 | tmp |= UART_LCR_PARITY_EVEN; |
lynxeyed_atsu | 0:63ed631d8c3a | 346 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 347 | |
lynxeyed_atsu | 0:63ed631d8c3a | 348 | case UART_PARITY_SP_1: |
lynxeyed_atsu | 0:63ed631d8c3a | 349 | tmp |= UART_LCR_PARITY_F_1; |
lynxeyed_atsu | 0:63ed631d8c3a | 350 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 351 | |
lynxeyed_atsu | 0:63ed631d8c3a | 352 | case UART_PARITY_SP_0: |
lynxeyed_atsu | 0:63ed631d8c3a | 353 | tmp |= UART_LCR_PARITY_F_0; |
lynxeyed_atsu | 0:63ed631d8c3a | 354 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 355 | default: |
lynxeyed_atsu | 0:63ed631d8c3a | 356 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 357 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 358 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 359 | |
lynxeyed_atsu | 0:63ed631d8c3a | 360 | switch (UART_ConfigStruct->Stopbits){ |
lynxeyed_atsu | 0:63ed631d8c3a | 361 | case UART_STOPBIT_2: |
lynxeyed_atsu | 0:63ed631d8c3a | 362 | tmp |= UART_LCR_STOPBIT_SEL; |
lynxeyed_atsu | 0:63ed631d8c3a | 363 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 364 | case UART_STOPBIT_1: |
lynxeyed_atsu | 0:63ed631d8c3a | 365 | default: |
lynxeyed_atsu | 0:63ed631d8c3a | 366 | // Do no thing |
lynxeyed_atsu | 0:63ed631d8c3a | 367 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 368 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 369 | |
lynxeyed_atsu | 0:63ed631d8c3a | 370 | |
lynxeyed_atsu | 0:63ed631d8c3a | 371 | // Write back to LCR, configure FIFO and Disable Tx |
lynxeyed_atsu | 0:63ed631d8c3a | 372 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 373 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 374 | ((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); |
lynxeyed_atsu | 0:63ed631d8c3a | 375 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 376 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 377 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 378 | UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); |
lynxeyed_atsu | 0:63ed631d8c3a | 379 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 380 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 381 | |
lynxeyed_atsu | 0:63ed631d8c3a | 382 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 383 | * @brief De-initializes the UARTx peripheral registers to their |
lynxeyed_atsu | 0:63ed631d8c3a | 384 | * default reset values. |
lynxeyed_atsu | 0:63ed631d8c3a | 385 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 386 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 387 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 388 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 389 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 390 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 391 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 392 | void UART_DeInit(LPC_UART_TypeDef* UARTx) |
lynxeyed_atsu | 0:63ed631d8c3a | 393 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 394 | // For debug mode |
lynxeyed_atsu | 0:63ed631d8c3a | 395 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 396 | |
lynxeyed_atsu | 0:63ed631d8c3a | 397 | UART_TxCmd(UARTx, DISABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 398 | |
lynxeyed_atsu | 0:63ed631d8c3a | 399 | #ifdef _UART0 |
lynxeyed_atsu | 0:63ed631d8c3a | 400 | if (UARTx == (LPC_UART_TypeDef *)LPC_UART0) |
lynxeyed_atsu | 0:63ed631d8c3a | 401 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 402 | /* Set up clock and power for UART module */ |
lynxeyed_atsu | 0:63ed631d8c3a | 403 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 404 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 405 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 406 | |
lynxeyed_atsu | 0:63ed631d8c3a | 407 | #ifdef _UART1 |
lynxeyed_atsu | 0:63ed631d8c3a | 408 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 409 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 410 | /* Set up clock and power for UART module */ |
lynxeyed_atsu | 0:63ed631d8c3a | 411 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 412 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 413 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 414 | |
lynxeyed_atsu | 0:63ed631d8c3a | 415 | #ifdef _UART2 |
lynxeyed_atsu | 0:63ed631d8c3a | 416 | if (UARTx == LPC_UART2) |
lynxeyed_atsu | 0:63ed631d8c3a | 417 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 418 | /* Set up clock and power for UART module */ |
lynxeyed_atsu | 0:63ed631d8c3a | 419 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 420 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 421 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 422 | |
lynxeyed_atsu | 0:63ed631d8c3a | 423 | #ifdef _UART3 |
lynxeyed_atsu | 0:63ed631d8c3a | 424 | if (UARTx == LPC_UART3) |
lynxeyed_atsu | 0:63ed631d8c3a | 425 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 426 | /* Set up clock and power for UART module */ |
lynxeyed_atsu | 0:63ed631d8c3a | 427 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE); |
lynxeyed_atsu | 0:63ed631d8c3a | 428 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 429 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 430 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 431 | |
lynxeyed_atsu | 0:63ed631d8c3a | 432 | /*****************************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 433 | * @brief Fills each UART_InitStruct member with its default value: |
lynxeyed_atsu | 0:63ed631d8c3a | 434 | * - 9600 bps |
lynxeyed_atsu | 0:63ed631d8c3a | 435 | * - 8-bit data |
lynxeyed_atsu | 0:63ed631d8c3a | 436 | * - 1 Stopbit |
lynxeyed_atsu | 0:63ed631d8c3a | 437 | * - None Parity |
lynxeyed_atsu | 0:63ed631d8c3a | 438 | * @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure |
lynxeyed_atsu | 0:63ed631d8c3a | 439 | * which will be initialized. |
lynxeyed_atsu | 0:63ed631d8c3a | 440 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 441 | *******************************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 442 | void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct) |
lynxeyed_atsu | 0:63ed631d8c3a | 443 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 444 | UART_InitStruct->Baud_rate = 9600; |
lynxeyed_atsu | 0:63ed631d8c3a | 445 | UART_InitStruct->Databits = UART_DATABIT_8; |
lynxeyed_atsu | 0:63ed631d8c3a | 446 | UART_InitStruct->Parity = UART_PARITY_NONE; |
lynxeyed_atsu | 0:63ed631d8c3a | 447 | UART_InitStruct->Stopbits = UART_STOPBIT_1; |
lynxeyed_atsu | 0:63ed631d8c3a | 448 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 449 | |
lynxeyed_atsu | 0:63ed631d8c3a | 450 | /* UART Send/Recieve functions -------------------------------------------------*/ |
lynxeyed_atsu | 0:63ed631d8c3a | 451 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 452 | * @brief Transmit a single data through UART peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 453 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 454 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 455 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 456 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 457 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 458 | * @param[in] Data Data to transmit (must be 8-bit long) |
lynxeyed_atsu | 0:63ed631d8c3a | 459 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 460 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 461 | void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data) |
lynxeyed_atsu | 0:63ed631d8c3a | 462 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 463 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 464 | |
lynxeyed_atsu | 0:63ed631d8c3a | 465 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 466 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 467 | ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT; |
lynxeyed_atsu | 0:63ed631d8c3a | 468 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 469 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 470 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 471 | UARTx->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT; |
lynxeyed_atsu | 0:63ed631d8c3a | 472 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 473 | |
lynxeyed_atsu | 0:63ed631d8c3a | 474 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 475 | |
lynxeyed_atsu | 0:63ed631d8c3a | 476 | |
lynxeyed_atsu | 0:63ed631d8c3a | 477 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 478 | * @brief Receive a single data from UART peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 479 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 480 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 481 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 482 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 483 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 484 | * @return Data received |
lynxeyed_atsu | 0:63ed631d8c3a | 485 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 486 | uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx) |
lynxeyed_atsu | 0:63ed631d8c3a | 487 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 488 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 489 | |
lynxeyed_atsu | 0:63ed631d8c3a | 490 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 491 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 492 | return (((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT); |
lynxeyed_atsu | 0:63ed631d8c3a | 493 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 494 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 495 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 496 | return (UARTx->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT); |
lynxeyed_atsu | 0:63ed631d8c3a | 497 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 498 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 499 | |
lynxeyed_atsu | 0:63ed631d8c3a | 500 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 501 | * @brief Send a block of data via UART peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 502 | * @param[in] UARTx Selected UART peripheral used to send data, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 503 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 504 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 505 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 506 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 507 | * @param[in] txbuf Pointer to Transmit buffer |
lynxeyed_atsu | 0:63ed631d8c3a | 508 | * @param[in] buflen Length of Transmit buffer |
lynxeyed_atsu | 0:63ed631d8c3a | 509 | * @param[in] flag Flag used in UART transfer, should be |
lynxeyed_atsu | 0:63ed631d8c3a | 510 | * NONE_BLOCKING or BLOCKING |
lynxeyed_atsu | 0:63ed631d8c3a | 511 | * @return Number of bytes sent. |
lynxeyed_atsu | 0:63ed631d8c3a | 512 | * |
lynxeyed_atsu | 0:63ed631d8c3a | 513 | * Note: when using UART in BLOCKING mode, a time-out condition is used |
lynxeyed_atsu | 0:63ed631d8c3a | 514 | * via defined symbol UART_BLOCKING_TIMEOUT. |
lynxeyed_atsu | 0:63ed631d8c3a | 515 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 516 | uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf, |
lynxeyed_atsu | 0:63ed631d8c3a | 517 | uint32_t buflen, TRANSFER_BLOCK_Type flag) |
lynxeyed_atsu | 0:63ed631d8c3a | 518 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 519 | uint32_t bToSend, bSent, timeOut, fifo_cnt; |
lynxeyed_atsu | 0:63ed631d8c3a | 520 | uint8_t *pChar = txbuf; |
lynxeyed_atsu | 0:63ed631d8c3a | 521 | |
lynxeyed_atsu | 0:63ed631d8c3a | 522 | bToSend = buflen; |
lynxeyed_atsu | 0:63ed631d8c3a | 523 | |
lynxeyed_atsu | 0:63ed631d8c3a | 524 | // blocking mode |
lynxeyed_atsu | 0:63ed631d8c3a | 525 | if (flag == BLOCKING) { |
lynxeyed_atsu | 0:63ed631d8c3a | 526 | bSent = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 527 | while (bToSend){ |
lynxeyed_atsu | 0:63ed631d8c3a | 528 | timeOut = UART_BLOCKING_TIMEOUT; |
lynxeyed_atsu | 0:63ed631d8c3a | 529 | // Wait for THR empty with timeout |
lynxeyed_atsu | 0:63ed631d8c3a | 530 | while (!(UARTx->LSR & UART_LSR_THRE)) { |
lynxeyed_atsu | 0:63ed631d8c3a | 531 | if (timeOut == 0) break; |
lynxeyed_atsu | 0:63ed631d8c3a | 532 | timeOut--; |
lynxeyed_atsu | 0:63ed631d8c3a | 533 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 534 | // Time out! |
lynxeyed_atsu | 0:63ed631d8c3a | 535 | if(timeOut == 0) break; |
lynxeyed_atsu | 0:63ed631d8c3a | 536 | fifo_cnt = UART_TX_FIFO_SIZE; |
lynxeyed_atsu | 0:63ed631d8c3a | 537 | while (fifo_cnt && bToSend){ |
lynxeyed_atsu | 0:63ed631d8c3a | 538 | UART_SendByte(UARTx, (*pChar++)); |
lynxeyed_atsu | 0:63ed631d8c3a | 539 | fifo_cnt--; |
lynxeyed_atsu | 0:63ed631d8c3a | 540 | bToSend--; |
lynxeyed_atsu | 0:63ed631d8c3a | 541 | bSent++; |
lynxeyed_atsu | 0:63ed631d8c3a | 542 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 543 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 544 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 545 | // None blocking mode |
lynxeyed_atsu | 0:63ed631d8c3a | 546 | else { |
lynxeyed_atsu | 0:63ed631d8c3a | 547 | bSent = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 548 | while (bToSend) { |
lynxeyed_atsu | 0:63ed631d8c3a | 549 | if (!(UARTx->LSR & UART_LSR_THRE)){ |
lynxeyed_atsu | 0:63ed631d8c3a | 550 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 551 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 552 | fifo_cnt = UART_TX_FIFO_SIZE; |
lynxeyed_atsu | 0:63ed631d8c3a | 553 | while (fifo_cnt && bToSend) { |
lynxeyed_atsu | 0:63ed631d8c3a | 554 | UART_SendByte(UARTx, (*pChar++)); |
lynxeyed_atsu | 0:63ed631d8c3a | 555 | bToSend--; |
lynxeyed_atsu | 0:63ed631d8c3a | 556 | fifo_cnt--; |
lynxeyed_atsu | 0:63ed631d8c3a | 557 | bSent++; |
lynxeyed_atsu | 0:63ed631d8c3a | 558 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 559 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 560 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 561 | return bSent; |
lynxeyed_atsu | 0:63ed631d8c3a | 562 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 563 | |
lynxeyed_atsu | 0:63ed631d8c3a | 564 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 565 | * @brief Receive a block of data via UART peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 566 | * @param[in] UARTx Selected UART peripheral used to send data, |
lynxeyed_atsu | 0:63ed631d8c3a | 567 | * should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 568 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 569 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 570 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 571 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 572 | * @param[out] rxbuf Pointer to Received buffer |
lynxeyed_atsu | 0:63ed631d8c3a | 573 | * @param[in] buflen Length of Received buffer |
lynxeyed_atsu | 0:63ed631d8c3a | 574 | * @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING |
lynxeyed_atsu | 0:63ed631d8c3a | 575 | |
lynxeyed_atsu | 0:63ed631d8c3a | 576 | * @return Number of bytes received |
lynxeyed_atsu | 0:63ed631d8c3a | 577 | * |
lynxeyed_atsu | 0:63ed631d8c3a | 578 | * Note: when using UART in BLOCKING mode, a time-out condition is used |
lynxeyed_atsu | 0:63ed631d8c3a | 579 | * via defined symbol UART_BLOCKING_TIMEOUT. |
lynxeyed_atsu | 0:63ed631d8c3a | 580 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 581 | uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \ |
lynxeyed_atsu | 0:63ed631d8c3a | 582 | uint32_t buflen, TRANSFER_BLOCK_Type flag) |
lynxeyed_atsu | 0:63ed631d8c3a | 583 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 584 | uint32_t bToRecv, bRecv, timeOut; |
lynxeyed_atsu | 0:63ed631d8c3a | 585 | uint8_t *pChar = rxbuf; |
lynxeyed_atsu | 0:63ed631d8c3a | 586 | |
lynxeyed_atsu | 0:63ed631d8c3a | 587 | bToRecv = buflen; |
lynxeyed_atsu | 0:63ed631d8c3a | 588 | |
lynxeyed_atsu | 0:63ed631d8c3a | 589 | // Blocking mode |
lynxeyed_atsu | 0:63ed631d8c3a | 590 | if (flag == BLOCKING) { |
lynxeyed_atsu | 0:63ed631d8c3a | 591 | bRecv = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 592 | while (bToRecv){ |
lynxeyed_atsu | 0:63ed631d8c3a | 593 | timeOut = UART_BLOCKING_TIMEOUT; |
lynxeyed_atsu | 0:63ed631d8c3a | 594 | while (!(UARTx->LSR & UART_LSR_RDR)){ |
lynxeyed_atsu | 0:63ed631d8c3a | 595 | if (timeOut == 0) break; |
lynxeyed_atsu | 0:63ed631d8c3a | 596 | timeOut--; |
lynxeyed_atsu | 0:63ed631d8c3a | 597 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 598 | // Time out! |
lynxeyed_atsu | 0:63ed631d8c3a | 599 | if(timeOut == 0) break; |
lynxeyed_atsu | 0:63ed631d8c3a | 600 | // Get data from the buffer |
lynxeyed_atsu | 0:63ed631d8c3a | 601 | (*pChar++) = UART_ReceiveByte(UARTx); |
lynxeyed_atsu | 0:63ed631d8c3a | 602 | bToRecv--; |
lynxeyed_atsu | 0:63ed631d8c3a | 603 | bRecv++; |
lynxeyed_atsu | 0:63ed631d8c3a | 604 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 605 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 606 | // None blocking mode |
lynxeyed_atsu | 0:63ed631d8c3a | 607 | else { |
lynxeyed_atsu | 0:63ed631d8c3a | 608 | bRecv = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 609 | while (bToRecv) { |
lynxeyed_atsu | 0:63ed631d8c3a | 610 | if (!(UARTx->LSR & UART_LSR_RDR)) { |
lynxeyed_atsu | 0:63ed631d8c3a | 611 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 612 | } else { |
lynxeyed_atsu | 0:63ed631d8c3a | 613 | (*pChar++) = UART_ReceiveByte(UARTx); |
lynxeyed_atsu | 0:63ed631d8c3a | 614 | bRecv++; |
lynxeyed_atsu | 0:63ed631d8c3a | 615 | bToRecv--; |
lynxeyed_atsu | 0:63ed631d8c3a | 616 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 617 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 618 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 619 | return bRecv; |
lynxeyed_atsu | 0:63ed631d8c3a | 620 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 621 | |
lynxeyed_atsu | 0:63ed631d8c3a | 622 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 623 | * @brief Force BREAK character on UART line, output pin UARTx TXD is |
lynxeyed_atsu | 0:63ed631d8c3a | 624 | forced to logic 0. |
lynxeyed_atsu | 0:63ed631d8c3a | 625 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 626 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 627 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 628 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 629 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 630 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 631 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 632 | void UART_ForceBreak(LPC_UART_TypeDef* UARTx) |
lynxeyed_atsu | 0:63ed631d8c3a | 633 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 634 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 635 | |
lynxeyed_atsu | 0:63ed631d8c3a | 636 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 637 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 638 | ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_BREAK_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 639 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 640 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 641 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 642 | UARTx->LCR |= UART_LCR_BREAK_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 643 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 644 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 645 | |
lynxeyed_atsu | 0:63ed631d8c3a | 646 | |
lynxeyed_atsu | 0:63ed631d8c3a | 647 | /********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 648 | * @brief Enable or disable specified UART interrupt. |
lynxeyed_atsu | 0:63ed631d8c3a | 649 | * @param[in] UARTx UART peripheral selected, should be |
lynxeyed_atsu | 0:63ed631d8c3a | 650 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 651 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 652 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 653 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 654 | * @param[in] UARTIntCfg Specifies the interrupt flag, |
lynxeyed_atsu | 0:63ed631d8c3a | 655 | * should be one of the following: |
lynxeyed_atsu | 0:63ed631d8c3a | 656 | - UART_INTCFG_RBR : RBR Interrupt enable |
lynxeyed_atsu | 0:63ed631d8c3a | 657 | - UART_INTCFG_THRE : THR Interrupt enable |
lynxeyed_atsu | 0:63ed631d8c3a | 658 | - UART_INTCFG_RLS : RX line status interrupt enable |
lynxeyed_atsu | 0:63ed631d8c3a | 659 | - UART1_INTCFG_MS : Modem status interrupt enable (UART1 only) |
lynxeyed_atsu | 0:63ed631d8c3a | 660 | - UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only) |
lynxeyed_atsu | 0:63ed631d8c3a | 661 | - UART_INTCFG_ABEO : Enables the end of auto-baud interrupt |
lynxeyed_atsu | 0:63ed631d8c3a | 662 | - UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt |
lynxeyed_atsu | 0:63ed631d8c3a | 663 | * @param[in] NewState New state of specified UART interrupt type, |
lynxeyed_atsu | 0:63ed631d8c3a | 664 | * should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 665 | * - ENALBE: Enable this UART interrupt type. |
lynxeyed_atsu | 0:63ed631d8c3a | 666 | * - DISALBE: Disable this UART interrupt type. |
lynxeyed_atsu | 0:63ed631d8c3a | 667 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 668 | *********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 669 | void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState) |
lynxeyed_atsu | 0:63ed631d8c3a | 670 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 671 | uint32_t tmp = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 672 | |
lynxeyed_atsu | 0:63ed631d8c3a | 673 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 674 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); |
lynxeyed_atsu | 0:63ed631d8c3a | 675 | |
lynxeyed_atsu | 0:63ed631d8c3a | 676 | switch(UARTIntCfg){ |
lynxeyed_atsu | 0:63ed631d8c3a | 677 | case UART_INTCFG_RBR: |
lynxeyed_atsu | 0:63ed631d8c3a | 678 | tmp = UART_IER_RBRINT_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 679 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 680 | case UART_INTCFG_THRE: |
lynxeyed_atsu | 0:63ed631d8c3a | 681 | tmp = UART_IER_THREINT_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 682 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 683 | case UART_INTCFG_RLS: |
lynxeyed_atsu | 0:63ed631d8c3a | 684 | tmp = UART_IER_RLSINT_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 685 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 686 | case UART1_INTCFG_MS: |
lynxeyed_atsu | 0:63ed631d8c3a | 687 | tmp = UART1_IER_MSINT_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 688 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 689 | case UART1_INTCFG_CTS: |
lynxeyed_atsu | 0:63ed631d8c3a | 690 | tmp = UART1_IER_CTSINT_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 691 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 692 | case UART_INTCFG_ABEO: |
lynxeyed_atsu | 0:63ed631d8c3a | 693 | tmp = UART_IER_ABEOINT_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 694 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 695 | case UART_INTCFG_ABTO: |
lynxeyed_atsu | 0:63ed631d8c3a | 696 | tmp = UART_IER_ABTOINT_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 697 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 698 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 699 | |
lynxeyed_atsu | 0:63ed631d8c3a | 700 | if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 701 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 702 | CHECK_PARAM((PARAM_UART_INTCFG(UARTIntCfg)) || (PARAM_UART1_INTCFG(UARTIntCfg))); |
lynxeyed_atsu | 0:63ed631d8c3a | 703 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 704 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 705 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 706 | CHECK_PARAM(PARAM_UART_INTCFG(UARTIntCfg)); |
lynxeyed_atsu | 0:63ed631d8c3a | 707 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 708 | |
lynxeyed_atsu | 0:63ed631d8c3a | 709 | if (NewState == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 710 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 711 | if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 712 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 713 | ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER |= tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 714 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 715 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 716 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 717 | UARTx->/*DLIER.*/IER |= tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 718 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 719 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 720 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 721 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 722 | if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 723 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 724 | ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER &= (~tmp) & UART1_IER_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 725 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 726 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 727 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 728 | UARTx->/*DLIER.*/IER &= (~tmp) & UART_IER_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 729 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 730 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 731 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 732 | |
lynxeyed_atsu | 0:63ed631d8c3a | 733 | |
lynxeyed_atsu | 0:63ed631d8c3a | 734 | /********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 735 | * @brief Get current value of Line Status register in UART peripheral. |
lynxeyed_atsu | 0:63ed631d8c3a | 736 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 737 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 738 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 739 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 740 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 741 | * @return Current value of Line Status register in UART peripheral. |
lynxeyed_atsu | 0:63ed631d8c3a | 742 | * Note: The return value of this function must be ANDed with each member in |
lynxeyed_atsu | 0:63ed631d8c3a | 743 | * UART_LS_Type enumeration to determine current flag status |
lynxeyed_atsu | 0:63ed631d8c3a | 744 | * corresponding to each Line status type. Because some flags in |
lynxeyed_atsu | 0:63ed631d8c3a | 745 | * Line Status register will be cleared after reading, the next reading |
lynxeyed_atsu | 0:63ed631d8c3a | 746 | * Line Status register could not be correct. So this function used to |
lynxeyed_atsu | 0:63ed631d8c3a | 747 | * read Line status register in one time only, then the return value |
lynxeyed_atsu | 0:63ed631d8c3a | 748 | * used to check all flags. |
lynxeyed_atsu | 0:63ed631d8c3a | 749 | *********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 750 | uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx) |
lynxeyed_atsu | 0:63ed631d8c3a | 751 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 752 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 753 | |
lynxeyed_atsu | 0:63ed631d8c3a | 754 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 755 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 756 | return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK); |
lynxeyed_atsu | 0:63ed631d8c3a | 757 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 758 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 759 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 760 | return ((UARTx->LSR) & UART_LSR_BITMASK); |
lynxeyed_atsu | 0:63ed631d8c3a | 761 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 762 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 763 | |
lynxeyed_atsu | 0:63ed631d8c3a | 764 | /********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 765 | * @brief Get Interrupt Identification value |
lynxeyed_atsu | 0:63ed631d8c3a | 766 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 767 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 768 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 769 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 770 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 771 | * @return Current value of UART UIIR register in UART peripheral. |
lynxeyed_atsu | 0:63ed631d8c3a | 772 | *********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 773 | uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx) |
lynxeyed_atsu | 0:63ed631d8c3a | 774 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 775 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 776 | return (UARTx->IIR & 0x03CF); |
lynxeyed_atsu | 0:63ed631d8c3a | 777 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 778 | |
lynxeyed_atsu | 0:63ed631d8c3a | 779 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 780 | * @brief Check whether if UART is busy or not |
lynxeyed_atsu | 0:63ed631d8c3a | 781 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 782 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 783 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 784 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 785 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 786 | * @return RESET if UART is not busy, otherwise return SET. |
lynxeyed_atsu | 0:63ed631d8c3a | 787 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 788 | FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx) |
lynxeyed_atsu | 0:63ed631d8c3a | 789 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 790 | if (UARTx->LSR & UART_LSR_TEMT){ |
lynxeyed_atsu | 0:63ed631d8c3a | 791 | return RESET; |
lynxeyed_atsu | 0:63ed631d8c3a | 792 | } else { |
lynxeyed_atsu | 0:63ed631d8c3a | 793 | return SET; |
lynxeyed_atsu | 0:63ed631d8c3a | 794 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 795 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 796 | |
lynxeyed_atsu | 0:63ed631d8c3a | 797 | |
lynxeyed_atsu | 0:63ed631d8c3a | 798 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 799 | * @brief Configure FIFO function on selected UART peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 800 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 801 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 802 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 803 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 804 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 805 | * @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that |
lynxeyed_atsu | 0:63ed631d8c3a | 806 | * contains specified information about FIFO configuration |
lynxeyed_atsu | 0:63ed631d8c3a | 807 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 808 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 809 | void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg) |
lynxeyed_atsu | 0:63ed631d8c3a | 810 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 811 | uint8_t tmp = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 812 | |
lynxeyed_atsu | 0:63ed631d8c3a | 813 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 814 | CHECK_PARAM(PARAM_UART_FIFO_LEVEL(FIFOCfg->FIFO_Level)); |
lynxeyed_atsu | 0:63ed631d8c3a | 815 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_DMAMode)); |
lynxeyed_atsu | 0:63ed631d8c3a | 816 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetRxBuf)); |
lynxeyed_atsu | 0:63ed631d8c3a | 817 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetTxBuf)); |
lynxeyed_atsu | 0:63ed631d8c3a | 818 | |
lynxeyed_atsu | 0:63ed631d8c3a | 819 | tmp |= UART_FCR_FIFO_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 820 | switch (FIFOCfg->FIFO_Level){ |
lynxeyed_atsu | 0:63ed631d8c3a | 821 | case UART_FIFO_TRGLEV0: |
lynxeyed_atsu | 0:63ed631d8c3a | 822 | tmp |= UART_FCR_TRG_LEV0; |
lynxeyed_atsu | 0:63ed631d8c3a | 823 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 824 | case UART_FIFO_TRGLEV1: |
lynxeyed_atsu | 0:63ed631d8c3a | 825 | tmp |= UART_FCR_TRG_LEV1; |
lynxeyed_atsu | 0:63ed631d8c3a | 826 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 827 | case UART_FIFO_TRGLEV2: |
lynxeyed_atsu | 0:63ed631d8c3a | 828 | tmp |= UART_FCR_TRG_LEV2; |
lynxeyed_atsu | 0:63ed631d8c3a | 829 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 830 | case UART_FIFO_TRGLEV3: |
lynxeyed_atsu | 0:63ed631d8c3a | 831 | default: |
lynxeyed_atsu | 0:63ed631d8c3a | 832 | tmp |= UART_FCR_TRG_LEV3; |
lynxeyed_atsu | 0:63ed631d8c3a | 833 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 834 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 835 | |
lynxeyed_atsu | 0:63ed631d8c3a | 836 | if (FIFOCfg->FIFO_ResetTxBuf == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 837 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 838 | tmp |= UART_FCR_TX_RS; |
lynxeyed_atsu | 0:63ed631d8c3a | 839 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 840 | if (FIFOCfg->FIFO_ResetRxBuf == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 841 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 842 | tmp |= UART_FCR_RX_RS; |
lynxeyed_atsu | 0:63ed631d8c3a | 843 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 844 | if (FIFOCfg->FIFO_DMAMode == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 845 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 846 | tmp |= UART_FCR_DMAMODE_SEL; |
lynxeyed_atsu | 0:63ed631d8c3a | 847 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 848 | |
lynxeyed_atsu | 0:63ed631d8c3a | 849 | |
lynxeyed_atsu | 0:63ed631d8c3a | 850 | //write to FIFO control register |
lynxeyed_atsu | 0:63ed631d8c3a | 851 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 852 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 853 | ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 854 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 855 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 856 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 857 | UARTx->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 858 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 859 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 860 | |
lynxeyed_atsu | 0:63ed631d8c3a | 861 | /*****************************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 862 | * @brief Fills each UART_FIFOInitStruct member with its default value: |
lynxeyed_atsu | 0:63ed631d8c3a | 863 | * - FIFO_DMAMode = DISABLE |
lynxeyed_atsu | 0:63ed631d8c3a | 864 | * - FIFO_Level = UART_FIFO_TRGLEV0 |
lynxeyed_atsu | 0:63ed631d8c3a | 865 | * - FIFO_ResetRxBuf = ENABLE |
lynxeyed_atsu | 0:63ed631d8c3a | 866 | * - FIFO_ResetTxBuf = ENABLE |
lynxeyed_atsu | 0:63ed631d8c3a | 867 | * - FIFO_State = ENABLE |
lynxeyed_atsu | 0:63ed631d8c3a | 868 | |
lynxeyed_atsu | 0:63ed631d8c3a | 869 | * @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure |
lynxeyed_atsu | 0:63ed631d8c3a | 870 | * which will be initialized. |
lynxeyed_atsu | 0:63ed631d8c3a | 871 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 872 | *******************************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 873 | void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct) |
lynxeyed_atsu | 0:63ed631d8c3a | 874 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 875 | UART_FIFOInitStruct->FIFO_DMAMode = DISABLE; |
lynxeyed_atsu | 0:63ed631d8c3a | 876 | UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0; |
lynxeyed_atsu | 0:63ed631d8c3a | 877 | UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE; |
lynxeyed_atsu | 0:63ed631d8c3a | 878 | UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE; |
lynxeyed_atsu | 0:63ed631d8c3a | 879 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 880 | |
lynxeyed_atsu | 0:63ed631d8c3a | 881 | |
lynxeyed_atsu | 0:63ed631d8c3a | 882 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 883 | * @brief Start/Stop Auto Baudrate activity |
lynxeyed_atsu | 0:63ed631d8c3a | 884 | * @param[in] UARTx UART peripheral selected, should be |
lynxeyed_atsu | 0:63ed631d8c3a | 885 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 886 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 887 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 888 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 889 | * @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that |
lynxeyed_atsu | 0:63ed631d8c3a | 890 | * contains specified information about UART |
lynxeyed_atsu | 0:63ed631d8c3a | 891 | * auto baudrate configuration |
lynxeyed_atsu | 0:63ed631d8c3a | 892 | * @param[in] NewState New State of Auto baudrate activity, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 893 | * - ENABLE: Start this activity |
lynxeyed_atsu | 0:63ed631d8c3a | 894 | * - DISABLE: Stop this activity |
lynxeyed_atsu | 0:63ed631d8c3a | 895 | * Note: Auto-baudrate mode enable bit will be cleared once this mode |
lynxeyed_atsu | 0:63ed631d8c3a | 896 | * completed. |
lynxeyed_atsu | 0:63ed631d8c3a | 897 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 898 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 899 | void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \ |
lynxeyed_atsu | 0:63ed631d8c3a | 900 | FunctionalState NewState) |
lynxeyed_atsu | 0:63ed631d8c3a | 901 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 902 | uint32_t tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 903 | |
lynxeyed_atsu | 0:63ed631d8c3a | 904 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 905 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); |
lynxeyed_atsu | 0:63ed631d8c3a | 906 | |
lynxeyed_atsu | 0:63ed631d8c3a | 907 | tmp = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 908 | if (NewState == ENABLE) { |
lynxeyed_atsu | 0:63ed631d8c3a | 909 | if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1){ |
lynxeyed_atsu | 0:63ed631d8c3a | 910 | tmp |= UART_ACR_MODE; |
lynxeyed_atsu | 0:63ed631d8c3a | 911 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 912 | if (ABConfigStruct->AutoRestart == ENABLE){ |
lynxeyed_atsu | 0:63ed631d8c3a | 913 | tmp |= UART_ACR_AUTO_RESTART; |
lynxeyed_atsu | 0:63ed631d8c3a | 914 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 915 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 916 | |
lynxeyed_atsu | 0:63ed631d8c3a | 917 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 918 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 919 | if (NewState == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 920 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 921 | // Clear DLL and DLM value |
lynxeyed_atsu | 0:63ed631d8c3a | 922 | ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 923 | ((LPC_UART1_TypeDef *)UARTx)->DLL = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 924 | ((LPC_UART1_TypeDef *)UARTx)->DLM = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 925 | ((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 926 | // FDR value must be reset to default value |
lynxeyed_atsu | 0:63ed631d8c3a | 927 | ((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10; |
lynxeyed_atsu | 0:63ed631d8c3a | 928 | ((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START | tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 929 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 930 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 931 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 932 | ((LPC_UART1_TypeDef *)UARTx)->ACR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 933 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 934 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 935 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 936 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 937 | if (NewState == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 938 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 939 | // Clear DLL and DLM value |
lynxeyed_atsu | 0:63ed631d8c3a | 940 | UARTx->LCR |= UART_LCR_DLAB_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 941 | UARTx->DLL = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 942 | UARTx->DLM = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 943 | UARTx->LCR &= ~UART_LCR_DLAB_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 944 | // FDR value must be reset to default value |
lynxeyed_atsu | 0:63ed631d8c3a | 945 | UARTx->FDR = 0x10; |
lynxeyed_atsu | 0:63ed631d8c3a | 946 | UARTx->ACR = UART_ACR_START | tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 947 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 948 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 949 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 950 | UARTx->ACR = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 951 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 952 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 953 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 954 | |
lynxeyed_atsu | 0:63ed631d8c3a | 955 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 956 | * @brief Clear Autobaud Interrupt Pending |
lynxeyed_atsu | 0:63ed631d8c3a | 957 | * @param[in] UARTx UART peripheral selected, should be |
lynxeyed_atsu | 0:63ed631d8c3a | 958 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 959 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 960 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 961 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 962 | * @param[in] ABIntType type of auto-baud interrupt, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 963 | * - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt |
lynxeyed_atsu | 0:63ed631d8c3a | 964 | * - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt |
lynxeyed_atsu | 0:63ed631d8c3a | 965 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 966 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 967 | void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType) |
lynxeyed_atsu | 0:63ed631d8c3a | 968 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 969 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 970 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 971 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 972 | UARTx->ACR |= ABIntType; |
lynxeyed_atsu | 0:63ed631d8c3a | 973 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 974 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 975 | UARTx->ACR |= ABIntType; |
lynxeyed_atsu | 0:63ed631d8c3a | 976 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 977 | |
lynxeyed_atsu | 0:63ed631d8c3a | 978 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 979 | * @brief Enable/Disable transmission on UART TxD pin |
lynxeyed_atsu | 0:63ed631d8c3a | 980 | * @param[in] UARTx UART peripheral selected, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 981 | * - LPC_UART0: UART0 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 982 | * - LPC_UART1: UART1 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 983 | * - LPC_UART2: UART2 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 984 | * - LPC_UART3: UART3 peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 985 | * @param[in] NewState New State of Tx transmission function, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 986 | * - ENABLE: Enable this function |
lynxeyed_atsu | 0:63ed631d8c3a | 987 | - DISABLE: Disable this function |
lynxeyed_atsu | 0:63ed631d8c3a | 988 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 989 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 990 | void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState) |
lynxeyed_atsu | 0:63ed631d8c3a | 991 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 992 | CHECK_PARAM(PARAM_UARTx(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 993 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); |
lynxeyed_atsu | 0:63ed631d8c3a | 994 | |
lynxeyed_atsu | 0:63ed631d8c3a | 995 | if (NewState == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 996 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 997 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 998 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 999 | ((LPC_UART1_TypeDef *)UARTx)->TER |= UART_TER_TXEN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1000 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1001 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 1002 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1003 | UARTx->TER |= UART_TER_TXEN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1004 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1005 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1006 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 1007 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1008 | if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1) |
lynxeyed_atsu | 0:63ed631d8c3a | 1009 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1010 | ((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1011 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1012 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 1013 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1014 | UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1015 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1016 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1017 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1018 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1019 | /* UART IrDA functions ---------------------------------------------------*/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1020 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1021 | #ifdef _UART3 |
lynxeyed_atsu | 0:63ed631d8c3a | 1022 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1023 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1024 | * @brief Enable or disable inverting serial input function of IrDA |
lynxeyed_atsu | 0:63ed631d8c3a | 1025 | * on UART peripheral. |
lynxeyed_atsu | 0:63ed631d8c3a | 1026 | * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1027 | * @param[in] NewState New state of inverting serial input, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 1028 | * - ENABLE: Enable this function. |
lynxeyed_atsu | 0:63ed631d8c3a | 1029 | * - DISABLE: Disable this function. |
lynxeyed_atsu | 0:63ed631d8c3a | 1030 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 1031 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1032 | void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState) |
lynxeyed_atsu | 0:63ed631d8c3a | 1033 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1034 | CHECK_PARAM(PARAM_UART_IrDA(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1035 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1036 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1037 | if (NewState == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 1038 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1039 | UARTx->ICR |= UART_ICR_IRDAINV; |
lynxeyed_atsu | 0:63ed631d8c3a | 1040 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1041 | else if (NewState == DISABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 1042 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1043 | UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1044 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1045 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1046 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1047 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1048 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1049 | * @brief Enable or disable IrDA function on UART peripheral. |
lynxeyed_atsu | 0:63ed631d8c3a | 1050 | * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1051 | * @param[in] NewState New state of IrDA function, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 1052 | * - ENABLE: Enable this function. |
lynxeyed_atsu | 0:63ed631d8c3a | 1053 | * - DISABLE: Disable this function. |
lynxeyed_atsu | 0:63ed631d8c3a | 1054 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 1055 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1056 | void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState) |
lynxeyed_atsu | 0:63ed631d8c3a | 1057 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1058 | CHECK_PARAM(PARAM_UART_IrDA(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1059 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1060 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1061 | if (NewState == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 1062 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1063 | UARTx->ICR |= UART_ICR_IRDAEN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1064 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1065 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 1066 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1067 | UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1068 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1069 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1070 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1071 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1072 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1073 | * @brief Configure Pulse divider for IrDA function on UART peripheral. |
lynxeyed_atsu | 0:63ed631d8c3a | 1074 | * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1075 | * @param[in] PulseDiv Pulse Divider value from Peripheral clock, |
lynxeyed_atsu | 0:63ed631d8c3a | 1076 | * should be one of the following: |
lynxeyed_atsu | 0:63ed631d8c3a | 1077 | - UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk |
lynxeyed_atsu | 0:63ed631d8c3a | 1078 | - UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk |
lynxeyed_atsu | 0:63ed631d8c3a | 1079 | - UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk |
lynxeyed_atsu | 0:63ed631d8c3a | 1080 | - UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk |
lynxeyed_atsu | 0:63ed631d8c3a | 1081 | - UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk |
lynxeyed_atsu | 0:63ed631d8c3a | 1082 | - UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk |
lynxeyed_atsu | 0:63ed631d8c3a | 1083 | - UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk |
lynxeyed_atsu | 0:63ed631d8c3a | 1084 | - UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk |
lynxeyed_atsu | 0:63ed631d8c3a | 1085 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1086 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 1087 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1088 | void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv) |
lynxeyed_atsu | 0:63ed631d8c3a | 1089 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1090 | uint32_t tmp, tmp1; |
lynxeyed_atsu | 0:63ed631d8c3a | 1091 | CHECK_PARAM(PARAM_UART_IrDA(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1092 | CHECK_PARAM(PARAM_UART_IrDA_PULSEDIV(PulseDiv)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1093 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1094 | tmp1 = UART_ICR_PULSEDIV(PulseDiv); |
lynxeyed_atsu | 0:63ed631d8c3a | 1095 | tmp = UARTx->ICR & (~UART_ICR_PULSEDIV(7)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1096 | tmp |= tmp1 | UART_ICR_FIXPULSE_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1097 | UARTx->ICR = tmp & UART_ICR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1098 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1099 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1100 | #endif |
lynxeyed_atsu | 0:63ed631d8c3a | 1101 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1102 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1103 | /* UART1 FullModem function ---------------------------------------------*/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1104 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1105 | #ifdef _UART1 |
lynxeyed_atsu | 0:63ed631d8c3a | 1106 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1107 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1108 | * @brief Force pin DTR/RTS corresponding to given state (Full modem mode) |
lynxeyed_atsu | 0:63ed631d8c3a | 1109 | * @param[in] UARTx LPC_UART1 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1110 | * @param[in] Pin Pin that NewState will be applied to, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 1111 | * - UART1_MODEM_PIN_DTR: DTR pin. |
lynxeyed_atsu | 0:63ed631d8c3a | 1112 | * - UART1_MODEM_PIN_RTS: RTS pin. |
lynxeyed_atsu | 0:63ed631d8c3a | 1113 | * @param[in] NewState New State of DTR/RTS pin, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 1114 | * - INACTIVE: Force the pin to inactive signal. |
lynxeyed_atsu | 0:63ed631d8c3a | 1115 | - ACTIVE: Force the pin to active signal. |
lynxeyed_atsu | 0:63ed631d8c3a | 1116 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 1117 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1118 | void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \ |
lynxeyed_atsu | 0:63ed631d8c3a | 1119 | UART1_SignalState NewState) |
lynxeyed_atsu | 0:63ed631d8c3a | 1120 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1121 | uint8_t tmp = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 1122 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1123 | CHECK_PARAM(PARAM_UART1_MODEM(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1124 | CHECK_PARAM(PARAM_UART1_MODEM_PIN(Pin)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1125 | CHECK_PARAM(PARAM_UART1_SIGNALSTATE(NewState)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1126 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1127 | switch (Pin){ |
lynxeyed_atsu | 0:63ed631d8c3a | 1128 | case UART1_MODEM_PIN_DTR: |
lynxeyed_atsu | 0:63ed631d8c3a | 1129 | tmp = UART1_MCR_DTR_CTRL; |
lynxeyed_atsu | 0:63ed631d8c3a | 1130 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 1131 | case UART1_MODEM_PIN_RTS: |
lynxeyed_atsu | 0:63ed631d8c3a | 1132 | tmp = UART1_MCR_RTS_CTRL; |
lynxeyed_atsu | 0:63ed631d8c3a | 1133 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 1134 | default: |
lynxeyed_atsu | 0:63ed631d8c3a | 1135 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 1136 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1137 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1138 | if (NewState == ACTIVE){ |
lynxeyed_atsu | 0:63ed631d8c3a | 1139 | UARTx->MCR |= tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 1140 | } else { |
lynxeyed_atsu | 0:63ed631d8c3a | 1141 | UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1142 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1143 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1144 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1145 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1146 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1147 | * @brief Configure Full Modem mode for UART peripheral |
lynxeyed_atsu | 0:63ed631d8c3a | 1148 | * @param[in] UARTx LPC_UART1 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1149 | * @param[in] Mode Full Modem mode, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 1150 | * - UART1_MODEM_MODE_LOOPBACK: Loop back mode. |
lynxeyed_atsu | 0:63ed631d8c3a | 1151 | * - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode. |
lynxeyed_atsu | 0:63ed631d8c3a | 1152 | * - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode. |
lynxeyed_atsu | 0:63ed631d8c3a | 1153 | * @param[in] NewState New State of this mode, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 1154 | * - ENABLE: Enable this mode. |
lynxeyed_atsu | 0:63ed631d8c3a | 1155 | - DISABLE: Disable this mode. |
lynxeyed_atsu | 0:63ed631d8c3a | 1156 | * @return none |
lynxeyed_atsu | 0:63ed631d8c3a | 1157 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1158 | void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \ |
lynxeyed_atsu | 0:63ed631d8c3a | 1159 | FunctionalState NewState) |
lynxeyed_atsu | 0:63ed631d8c3a | 1160 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1161 | uint8_t tmp = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 1162 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1163 | CHECK_PARAM(PARAM_UART1_MODEM(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1164 | CHECK_PARAM(PARAM_UART1_MODEM_MODE(Mode)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1165 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1166 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1167 | switch(Mode){ |
lynxeyed_atsu | 0:63ed631d8c3a | 1168 | case UART1_MODEM_MODE_LOOPBACK: |
lynxeyed_atsu | 0:63ed631d8c3a | 1169 | tmp = UART1_MCR_LOOPB_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1170 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 1171 | case UART1_MODEM_MODE_AUTO_RTS: |
lynxeyed_atsu | 0:63ed631d8c3a | 1172 | tmp = UART1_MCR_AUTO_RTS_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1173 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 1174 | case UART1_MODEM_MODE_AUTO_CTS: |
lynxeyed_atsu | 0:63ed631d8c3a | 1175 | tmp = UART1_MCR_AUTO_CTS_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1176 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 1177 | default: |
lynxeyed_atsu | 0:63ed631d8c3a | 1178 | break; |
lynxeyed_atsu | 0:63ed631d8c3a | 1179 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1180 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1181 | if (NewState == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 1182 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1183 | UARTx->MCR |= tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 1184 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1185 | else |
lynxeyed_atsu | 0:63ed631d8c3a | 1186 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1187 | UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1188 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1189 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1190 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1191 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1192 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1193 | * @brief Get current status of modem status register |
lynxeyed_atsu | 0:63ed631d8c3a | 1194 | * @param[in] UARTx LPC_UART1 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1195 | * @return Current value of modem status register |
lynxeyed_atsu | 0:63ed631d8c3a | 1196 | * Note: The return value of this function must be ANDed with each member |
lynxeyed_atsu | 0:63ed631d8c3a | 1197 | * UART_MODEM_STAT_type enumeration to determine current flag status |
lynxeyed_atsu | 0:63ed631d8c3a | 1198 | * corresponding to each modem flag status. Because some flags in |
lynxeyed_atsu | 0:63ed631d8c3a | 1199 | * modem status register will be cleared after reading, the next reading |
lynxeyed_atsu | 0:63ed631d8c3a | 1200 | * modem register could not be correct. So this function used to |
lynxeyed_atsu | 0:63ed631d8c3a | 1201 | * read modem status register in one time only, then the return value |
lynxeyed_atsu | 0:63ed631d8c3a | 1202 | * used to check all flags. |
lynxeyed_atsu | 0:63ed631d8c3a | 1203 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1204 | uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx) |
lynxeyed_atsu | 0:63ed631d8c3a | 1205 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1206 | CHECK_PARAM(PARAM_UART1_MODEM(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1207 | return ((UARTx->MSR) & UART1_MSR_BITMASK); |
lynxeyed_atsu | 0:63ed631d8c3a | 1208 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1209 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1210 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1211 | /* UART RS485 functions --------------------------------------------------------------*/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1212 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1213 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1214 | * @brief Configure UART peripheral in RS485 mode according to the specified |
lynxeyed_atsu | 0:63ed631d8c3a | 1215 | * parameters in the RS485ConfigStruct. |
lynxeyed_atsu | 0:63ed631d8c3a | 1216 | * @param[in] UARTx LPC_UART1 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1217 | * @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure |
lynxeyed_atsu | 0:63ed631d8c3a | 1218 | * that contains the configuration information for specified UART |
lynxeyed_atsu | 0:63ed631d8c3a | 1219 | * in RS485 mode. |
lynxeyed_atsu | 0:63ed631d8c3a | 1220 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 1221 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1222 | void UART_RS485Config(LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct) |
lynxeyed_atsu | 0:63ed631d8c3a | 1223 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1224 | uint32_t tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 1225 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1226 | CHECK_PARAM(PARAM_UART1_MODEM(UARTx)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1227 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoAddrDetect_State)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1228 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoDirCtrl_State)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1229 | CHECK_PARAM(PARAM_UART1_RS485_CFG_DELAYVALUE(RS485ConfigStruct->DelayValue)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1230 | CHECK_PARAM(PARAM_SETSTATE(RS485ConfigStruct->DirCtrlPol_Level)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1231 | CHECK_PARAM(PARAM_UART_RS485_DIRCTRL_PIN(RS485ConfigStruct->DirCtrlPin)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1232 | CHECK_PARAM(PARAM_UART1_RS485_CFG_MATCHADDRVALUE(RS485ConfigStruct->MatchAddrValue)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1233 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->NormalMultiDropMode_State)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1234 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->Rx_State)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1235 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1236 | tmp = 0; |
lynxeyed_atsu | 0:63ed631d8c3a | 1237 | // If Auto Direction Control is enabled - This function is used in Master mode |
lynxeyed_atsu | 0:63ed631d8c3a | 1238 | if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 1239 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1240 | tmp |= UART1_RS485CTRL_DCTRL_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1241 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1242 | // Set polar |
lynxeyed_atsu | 0:63ed631d8c3a | 1243 | if (RS485ConfigStruct->DirCtrlPol_Level == SET) |
lynxeyed_atsu | 0:63ed631d8c3a | 1244 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1245 | tmp |= UART1_RS485CTRL_OINV_1; |
lynxeyed_atsu | 0:63ed631d8c3a | 1246 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1247 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1248 | // Set pin according to |
lynxeyed_atsu | 0:63ed631d8c3a | 1249 | if (RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR) |
lynxeyed_atsu | 0:63ed631d8c3a | 1250 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1251 | tmp |= UART1_RS485CTRL_SEL_DTR; |
lynxeyed_atsu | 0:63ed631d8c3a | 1252 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1253 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1254 | // Fill delay time |
lynxeyed_atsu | 0:63ed631d8c3a | 1255 | UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1256 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1257 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1258 | // MultiDrop mode is enable |
lynxeyed_atsu | 0:63ed631d8c3a | 1259 | if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 1260 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1261 | tmp |= UART1_RS485CTRL_NMM_EN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1262 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1263 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1264 | // Auto Address Detect function |
lynxeyed_atsu | 0:63ed631d8c3a | 1265 | if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 1266 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1267 | tmp |= UART1_RS485CTRL_AADEN; |
lynxeyed_atsu | 0:63ed631d8c3a | 1268 | // Fill Match Address |
lynxeyed_atsu | 0:63ed631d8c3a | 1269 | UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1270 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1271 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1272 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1273 | // Receiver is disable |
lynxeyed_atsu | 0:63ed631d8c3a | 1274 | if (RS485ConfigStruct->Rx_State == DISABLE) |
lynxeyed_atsu | 0:63ed631d8c3a | 1275 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1276 | tmp |= UART1_RS485CTRL_RX_DIS; |
lynxeyed_atsu | 0:63ed631d8c3a | 1277 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1278 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1279 | // write back to RS485 control register |
lynxeyed_atsu | 0:63ed631d8c3a | 1280 | UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1281 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1282 | // Enable Parity function and leave parity in stick '0' parity as default |
lynxeyed_atsu | 0:63ed631d8c3a | 1283 | UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN); |
lynxeyed_atsu | 0:63ed631d8c3a | 1284 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1285 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1286 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1287 | * @brief Enable/Disable receiver in RS485 module in UART1 |
lynxeyed_atsu | 0:63ed631d8c3a | 1288 | * @param[in] UARTx LPC_UART1 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1289 | * @param[in] NewState New State of command, should be: |
lynxeyed_atsu | 0:63ed631d8c3a | 1290 | * - ENABLE: Enable this function. |
lynxeyed_atsu | 0:63ed631d8c3a | 1291 | * - DISABLE: Disable this function. |
lynxeyed_atsu | 0:63ed631d8c3a | 1292 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 1293 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1294 | void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState) |
lynxeyed_atsu | 0:63ed631d8c3a | 1295 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1296 | if (NewState == ENABLE){ |
lynxeyed_atsu | 0:63ed631d8c3a | 1297 | UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS; |
lynxeyed_atsu | 0:63ed631d8c3a | 1298 | } else { |
lynxeyed_atsu | 0:63ed631d8c3a | 1299 | UARTx->RS485CTRL |= UART1_RS485CTRL_RX_DIS; |
lynxeyed_atsu | 0:63ed631d8c3a | 1300 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1301 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1302 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1303 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1304 | * @brief Send data on RS485 bus with specified parity stick value (9-bit mode). |
lynxeyed_atsu | 0:63ed631d8c3a | 1305 | * @param[in] UARTx LPC_UART1 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1306 | * @param[in] pDatFrm Pointer to data frame. |
lynxeyed_atsu | 0:63ed631d8c3a | 1307 | * @param[in] size Size of data. |
lynxeyed_atsu | 0:63ed631d8c3a | 1308 | * @param[in] ParityStick Parity Stick value, should be 0 or 1. |
lynxeyed_atsu | 0:63ed631d8c3a | 1309 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 1310 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1311 | uint32_t UART_RS485Send(LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, \ |
lynxeyed_atsu | 0:63ed631d8c3a | 1312 | uint32_t size, uint8_t ParityStick) |
lynxeyed_atsu | 0:63ed631d8c3a | 1313 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1314 | uint8_t tmp, save; |
lynxeyed_atsu | 0:63ed631d8c3a | 1315 | uint32_t cnt; |
lynxeyed_atsu | 0:63ed631d8c3a | 1316 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1317 | if (ParityStick){ |
lynxeyed_atsu | 0:63ed631d8c3a | 1318 | save = tmp = UARTx->LCR & UART_LCR_BITMASK; |
lynxeyed_atsu | 0:63ed631d8c3a | 1319 | tmp &= ~(UART_LCR_PARITY_EVEN); |
lynxeyed_atsu | 0:63ed631d8c3a | 1320 | UARTx->LCR = tmp; |
lynxeyed_atsu | 0:63ed631d8c3a | 1321 | cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING); |
lynxeyed_atsu | 0:63ed631d8c3a | 1322 | while (!(UARTx->LSR & UART_LSR_TEMT)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1323 | UARTx->LCR = save; |
lynxeyed_atsu | 0:63ed631d8c3a | 1324 | } else { |
lynxeyed_atsu | 0:63ed631d8c3a | 1325 | cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING); |
lynxeyed_atsu | 0:63ed631d8c3a | 1326 | while (!(UARTx->LSR & UART_LSR_TEMT)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1327 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1328 | return cnt; |
lynxeyed_atsu | 0:63ed631d8c3a | 1329 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1330 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1331 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1332 | * @brief Send Slave address frames on RS485 bus. |
lynxeyed_atsu | 0:63ed631d8c3a | 1333 | * @param[in] UARTx LPC_UART1 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1334 | * @param[in] SlvAddr Slave Address. |
lynxeyed_atsu | 0:63ed631d8c3a | 1335 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 1336 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1337 | void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr) |
lynxeyed_atsu | 0:63ed631d8c3a | 1338 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1339 | UART_RS485Send(UARTx, &SlvAddr, 1, 1); |
lynxeyed_atsu | 0:63ed631d8c3a | 1340 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1341 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1342 | /*********************************************************************//** |
lynxeyed_atsu | 0:63ed631d8c3a | 1343 | * @brief Send Data frames on RS485 bus. |
lynxeyed_atsu | 0:63ed631d8c3a | 1344 | * @param[in] UARTx LPC_UART1 (only) |
lynxeyed_atsu | 0:63ed631d8c3a | 1345 | * @param[in] pData Pointer to data to be sent. |
lynxeyed_atsu | 0:63ed631d8c3a | 1346 | * @param[in] size Size of data frame to be sent. |
lynxeyed_atsu | 0:63ed631d8c3a | 1347 | * @return None |
lynxeyed_atsu | 0:63ed631d8c3a | 1348 | **********************************************************************/ |
lynxeyed_atsu | 0:63ed631d8c3a | 1349 | uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size) |
lynxeyed_atsu | 0:63ed631d8c3a | 1350 | { |
lynxeyed_atsu | 0:63ed631d8c3a | 1351 | return (UART_RS485Send(UARTx, pData, size, 0)); |
lynxeyed_atsu | 0:63ed631d8c3a | 1352 | } |
lynxeyed_atsu | 0:63ed631d8c3a | 1353 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1354 | #endif /* _UART1 */ |
lynxeyed_atsu | 0:63ed631d8c3a | 1355 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1356 | #endif /* _UART */ |
lynxeyed_atsu | 0:63ed631d8c3a | 1357 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1358 | /** |
lynxeyed_atsu | 0:63ed631d8c3a | 1359 | * @} |
lynxeyed_atsu | 0:63ed631d8c3a | 1360 | */ |
lynxeyed_atsu | 0:63ed631d8c3a | 1361 | |
lynxeyed_atsu | 0:63ed631d8c3a | 1362 | /** |
lynxeyed_atsu | 0:63ed631d8c3a | 1363 | * @} |
lynxeyed_atsu | 0:63ed631d8c3a | 1364 | */ |
lynxeyed_atsu | 0:63ed631d8c3a | 1365 | /* --------------------------------- End Of File ------------------------------ */ |
lynxeyed_atsu | 0:63ed631d8c3a | 1366 |