Dependencies:   mbed

Committer:
lynxeyed_atsu
Date:
Fri Jan 21 08:39:48 2011 +0000
Revision:
0:63ed631d8c3a

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lynxeyed_atsu 0:63ed631d8c3a 1 /***********************************************************************//**
lynxeyed_atsu 0:63ed631d8c3a 2 * @file i2s_irq_test.c
lynxeyed_atsu 0:63ed631d8c3a 3 * @purpose This example describes how to use I2S transfer in interrupt
lynxeyed_atsu 0:63ed631d8c3a 4 * mode
lynxeyed_atsu 0:63ed631d8c3a 5 * @version 2.0
lynxeyed_atsu 0:63ed631d8c3a 6 * @date 21. May. 2010
lynxeyed_atsu 0:63ed631d8c3a 7 * @author NXP MCU SW Application Team
lynxeyed_atsu 0:63ed631d8c3a 8 *---------------------------------------------------------------------
lynxeyed_atsu 0:63ed631d8c3a 9 * Software that is described herein is for illustrative purposes only
lynxeyed_atsu 0:63ed631d8c3a 10 * which provides customers with programming information regarding the
lynxeyed_atsu 0:63ed631d8c3a 11 * products. This software is supplied "AS IS" without any warranties.
lynxeyed_atsu 0:63ed631d8c3a 12 * NXP Semiconductors assumes no responsibility or liability for the
lynxeyed_atsu 0:63ed631d8c3a 13 * use of the software, conveys no license or title under any patent,
lynxeyed_atsu 0:63ed631d8c3a 14 * copyright, or mask work right to the product. NXP Semiconductors
lynxeyed_atsu 0:63ed631d8c3a 15 * reserves the right to make changes in the software without
lynxeyed_atsu 0:63ed631d8c3a 16 * notification. NXP Semiconductors also make no representation or
lynxeyed_atsu 0:63ed631d8c3a 17 * warranty that such application will be suitable for the specified
lynxeyed_atsu 0:63ed631d8c3a 18 * use without further testing or modification.
lynxeyed_atsu 0:63ed631d8c3a 19 **********************************************************************/
lynxeyed_atsu 0:63ed631d8c3a 20 #include "lpc17xx_i2s.h"
lynxeyed_atsu 0:63ed631d8c3a 21 #include "lpc17xx_libcfg.h"
lynxeyed_atsu 0:63ed631d8c3a 22 #include "lpc17xx_pinsel.h"
lynxeyed_atsu 0:63ed631d8c3a 23 #include "debug_frmwrk.h"
lynxeyed_atsu 0:63ed631d8c3a 24 #include "lpc17xx_clkpwr.h"
lynxeyed_atsu 0:63ed631d8c3a 25 #include "i2s_irq_test.h"
lynxeyed_atsu 0:63ed631d8c3a 26 #include "mbed.h"
lynxeyed_atsu 0:63ed631d8c3a 27
lynxeyed_atsu 0:63ed631d8c3a 28
lynxeyed_atsu 0:63ed631d8c3a 29
lynxeyed_atsu 0:63ed631d8c3a 30 /* Example group ----------------------------------------------------------- */
lynxeyed_atsu 0:63ed631d8c3a 31 /** @defgroup I2S_IRQ I2S_IRQ
lynxeyed_atsu 0:63ed631d8c3a 32 * @ingroup I2S_Examples
lynxeyed_atsu 0:63ed631d8c3a 33 * @{
lynxeyed_atsu 0:63ed631d8c3a 34 */
lynxeyed_atsu 0:63ed631d8c3a 35
lynxeyed_atsu 0:63ed631d8c3a 36
lynxeyed_atsu 0:63ed631d8c3a 37 /************************** PRIVATE VARIABLES ***********************/
lynxeyed_atsu 0:63ed631d8c3a 38 uint8_t menu[]=
lynxeyed_atsu 0:63ed631d8c3a 39 "********************************************************************************\n\r"
lynxeyed_atsu 0:63ed631d8c3a 40 "Hello NXP Semiconductors \n\r"
lynxeyed_atsu 0:63ed631d8c3a 41 " I2S interrupt mode demo \n\r"
lynxeyed_atsu 0:63ed631d8c3a 42 "\t - MCU: mbed-005.1 LPC1768 \n\r"
lynxeyed_atsu 0:63ed631d8c3a 43 "\t - Core: ARM CORTEX-M3 \n\r"
lynxeyed_atsu 0:63ed631d8c3a 44 "\t - Communicate via: UART0 - 9600 bps \n\r"
lynxeyed_atsu 0:63ed631d8c3a 45 " Use two I2S channels in the same board to transfer data in interrupt mode\n\r"
lynxeyed_atsu 0:63ed631d8c3a 46 "********************************************************************************\n\r";
lynxeyed_atsu 0:63ed631d8c3a 47
lynxeyed_atsu 0:63ed631d8c3a 48 volatile uint8_t I2STXDone = 0;
lynxeyed_atsu 0:63ed631d8c3a 49 volatile uint8_t I2SRXDone = 0;
lynxeyed_atsu 0:63ed631d8c3a 50
lynxeyed_atsu 0:63ed631d8c3a 51 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
lynxeyed_atsu 0:63ed631d8c3a 52 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
lynxeyed_atsu 0:63ed631d8c3a 53
lynxeyed_atsu 0:63ed631d8c3a 54 volatile uint32_t I2SReadLength = 0;
lynxeyed_atsu 0:63ed631d8c3a 55 volatile uint32_t I2SWriteLength = 0;
lynxeyed_atsu 0:63ed631d8c3a 56
lynxeyed_atsu 0:63ed631d8c3a 57 uint8_t tx_depth_irq = 0;
lynxeyed_atsu 0:63ed631d8c3a 58 uint8_t rx_depth_irq = 0;
lynxeyed_atsu 0:63ed631d8c3a 59 uint8_t dummy=0;
lynxeyed_atsu 0:63ed631d8c3a 60
lynxeyed_atsu 0:63ed631d8c3a 61
lynxeyed_atsu 0:63ed631d8c3a 62 /************************** PRIVATE FUNCTIONS *************************/
lynxeyed_atsu 0:63ed631d8c3a 63 void I2S_IRQHandler(void);
lynxeyed_atsu 0:63ed631d8c3a 64
lynxeyed_atsu 0:63ed631d8c3a 65 void Buffer_Init(void);
lynxeyed_atsu 0:63ed631d8c3a 66 Bool Buffer_Verify(void);
lynxeyed_atsu 0:63ed631d8c3a 67
lynxeyed_atsu 0:63ed631d8c3a 68
lynxeyed_atsu 0:63ed631d8c3a 69 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
lynxeyed_atsu 0:63ed631d8c3a 70 /*********************************************************************//**
lynxeyed_atsu 0:63ed631d8c3a 71 * @brief I2S IRQ Handler
lynxeyed_atsu 0:63ed631d8c3a 72 * @param[in] None
lynxeyed_atsu 0:63ed631d8c3a 73 * @return None
lynxeyed_atsu 0:63ed631d8c3a 74 **********************************************************************/
lynxeyed_atsu 0:63ed631d8c3a 75 /*void I2S_IRQHandler()
lynxeyed_atsu 0:63ed631d8c3a 76 {
lynxeyed_atsu 0:63ed631d8c3a 77 uint32_t RXLevel = 0;
lynxeyed_atsu 0:63ed631d8c3a 78
lynxeyed_atsu 0:63ed631d8c3a 79 //Check RX interrupt
lynxeyed_atsu 0:63ed631d8c3a 80 if(I2S_GetIRQStatus(LPC_I2S, I2S_RX_MODE))
lynxeyed_atsu 0:63ed631d8c3a 81 {
lynxeyed_atsu 0:63ed631d8c3a 82 RXLevel = I2S_GetLevel(LPC_I2S, I2S_RX_MODE);
lynxeyed_atsu 0:63ed631d8c3a 83 if ( (RXLevel != RXFIFO_EMPTY) && !I2SRXDone )
lynxeyed_atsu 0:63ed631d8c3a 84 {
lynxeyed_atsu 0:63ed631d8c3a 85 while ( RXLevel > 0 )
lynxeyed_atsu 0:63ed631d8c3a 86 {
lynxeyed_atsu 0:63ed631d8c3a 87 if ( I2SReadLength == BUFFER_SIZE )
lynxeyed_atsu 0:63ed631d8c3a 88 {
lynxeyed_atsu 0:63ed631d8c3a 89 //Stop RX
lynxeyed_atsu 0:63ed631d8c3a 90 I2S_Stop(LPC_I2S, I2S_RX_MODE);
lynxeyed_atsu 0:63ed631d8c3a 91 // Disable RX
lynxeyed_atsu 0:63ed631d8c3a 92 I2S_IRQCmd(LPC_I2S, I2S_RX_MODE, DISABLE);
lynxeyed_atsu 0:63ed631d8c3a 93 I2SRXDone = 1;
lynxeyed_atsu 0:63ed631d8c3a 94 break;
lynxeyed_atsu 0:63ed631d8c3a 95 }
lynxeyed_atsu 0:63ed631d8c3a 96 else
lynxeyed_atsu 0:63ed631d8c3a 97 {
lynxeyed_atsu 0:63ed631d8c3a 98 I2SRXBuffer[I2SReadLength++] = LPC_I2S->I2SRXFIFO;
lynxeyed_atsu 0:63ed631d8c3a 99 }
lynxeyed_atsu 0:63ed631d8c3a 100 RXLevel--;
lynxeyed_atsu 0:63ed631d8c3a 101 }
lynxeyed_atsu 0:63ed631d8c3a 102 }
lynxeyed_atsu 0:63ed631d8c3a 103 }
lynxeyed_atsu 0:63ed631d8c3a 104 return;
lynxeyed_atsu 0:63ed631d8c3a 105 }
lynxeyed_atsu 0:63ed631d8c3a 106 */
lynxeyed_atsu 0:63ed631d8c3a 107 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
lynxeyed_atsu 0:63ed631d8c3a 108 /*********************************************************************//**
lynxeyed_atsu 0:63ed631d8c3a 109 * @brief Initialize buffer
lynxeyed_atsu 0:63ed631d8c3a 110 * @param[in] None
lynxeyed_atsu 0:63ed631d8c3a 111 * @return None
lynxeyed_atsu 0:63ed631d8c3a 112 **********************************************************************/
lynxeyed_atsu 0:63ed631d8c3a 113 void Buffer_Init(void) {
lynxeyed_atsu 0:63ed631d8c3a 114 uint32_t i;
lynxeyed_atsu 0:63ed631d8c3a 115 for ( i = 0; i < BUFFER_SIZE; i++ )
lynxeyed_atsu 0:63ed631d8c3a 116 {
lynxeyed_atsu 0:63ed631d8c3a 117 I2STXBuffer[i] = i |(i << 16);
lynxeyed_atsu 0:63ed631d8c3a 118 I2SRXBuffer[i] = 0;
lynxeyed_atsu 0:63ed631d8c3a 119 }
lynxeyed_atsu 0:63ed631d8c3a 120
lynxeyed_atsu 0:63ed631d8c3a 121 }
lynxeyed_atsu 0:63ed631d8c3a 122
lynxeyed_atsu 0:63ed631d8c3a 123 /*-------------------------MAIN FUNCTION------------------------------*/
lynxeyed_atsu 0:63ed631d8c3a 124 /*********************************************************************//**
lynxeyed_atsu 0:63ed631d8c3a 125 * @brief mbed_i2s_init: Main program body
lynxeyed_atsu 0:63ed631d8c3a 126 * @param[in] None
lynxeyed_atsu 0:63ed631d8c3a 127 * @return int
lynxeyed_atsu 0:63ed631d8c3a 128 **********************************************************************/
lynxeyed_atsu 0:63ed631d8c3a 129 // for mbed
lynxeyed_atsu 0:63ed631d8c3a 130 void mbed_i2s_init(void){
lynxeyed_atsu 0:63ed631d8c3a 131
lynxeyed_atsu 0:63ed631d8c3a 132 I2S_MODEConf_Type I2S_ClkConfig;
lynxeyed_atsu 0:63ed631d8c3a 133 I2S_CFG_Type I2S_ConfigStruct;
lynxeyed_atsu 0:63ed631d8c3a 134 PINSEL_CFG_Type PinCfg;
lynxeyed_atsu 0:63ed631d8c3a 135 // uint32_t i;
lynxeyed_atsu 0:63ed631d8c3a 136 /* Initialize debug via UART0
lynxeyed_atsu 0:63ed631d8c3a 137 * ? 115200bps
lynxeyed_atsu 0:63ed631d8c3a 138 * ? 8 data bit
lynxeyed_atsu 0:63ed631d8c3a 139 * ? No parity
lynxeyed_atsu 0:63ed631d8c3a 140 * ? 1 stop bit
lynxeyed_atsu 0:63ed631d8c3a 141 * ? No flow control
lynxeyed_atsu 0:63ed631d8c3a 142 */
lynxeyed_atsu 0:63ed631d8c3a 143 debug_frmwrk_init();
lynxeyed_atsu 0:63ed631d8c3a 144
lynxeyed_atsu 0:63ed631d8c3a 145 //print menu screen
lynxeyed_atsu 0:63ed631d8c3a 146 //print_menu();
lynxeyed_atsu 0:63ed631d8c3a 147
lynxeyed_atsu 0:63ed631d8c3a 148 /* Initialize I2S peripheral ------------------------------------*/
lynxeyed_atsu 0:63ed631d8c3a 149 /* Pin configuration:
lynxeyed_atsu 0:63ed631d8c3a 150 * Assign: - P0.4 as I2SRX_CLK
lynxeyed_atsu 0:63ed631d8c3a 151 * - P0.5 as I2SRX_WS
lynxeyed_atsu 0:63ed631d8c3a 152 * - P0.6 as I2SRX_SDA
lynxeyed_atsu 0:63ed631d8c3a 153 * - P0.7 as I2STX_CLK
lynxeyed_atsu 0:63ed631d8c3a 154 * - P0.8 as I2STX_WS
lynxeyed_atsu 0:63ed631d8c3a 155 * - P0.9 as I2STX_SDA
lynxeyed_atsu 0:63ed631d8c3a 156 */
lynxeyed_atsu 0:63ed631d8c3a 157
lynxeyed_atsu 0:63ed631d8c3a 158
lynxeyed_atsu 0:63ed631d8c3a 159
lynxeyed_atsu 0:63ed631d8c3a 160 PinCfg.Funcnum = 1;
lynxeyed_atsu 0:63ed631d8c3a 161 PinCfg.OpenDrain = 0;
lynxeyed_atsu 0:63ed631d8c3a 162 PinCfg.Pinmode = 0;
lynxeyed_atsu 0:63ed631d8c3a 163 PinCfg.Pinnum = 4;
lynxeyed_atsu 0:63ed631d8c3a 164 PinCfg.Portnum = 0;
lynxeyed_atsu 0:63ed631d8c3a 165 PINSEL_ConfigPin(&PinCfg);
lynxeyed_atsu 0:63ed631d8c3a 166 PinCfg.Pinnum = 5;
lynxeyed_atsu 0:63ed631d8c3a 167 PINSEL_ConfigPin(&PinCfg);
lynxeyed_atsu 0:63ed631d8c3a 168 PinCfg.Pinnum = 6;
lynxeyed_atsu 0:63ed631d8c3a 169 PINSEL_ConfigPin(&PinCfg);
lynxeyed_atsu 0:63ed631d8c3a 170 PinCfg.Pinnum = 7;
lynxeyed_atsu 0:63ed631d8c3a 171 PINSEL_ConfigPin(&PinCfg);
lynxeyed_atsu 0:63ed631d8c3a 172 PinCfg.Pinnum = 8;
lynxeyed_atsu 0:63ed631d8c3a 173 PINSEL_ConfigPin(&PinCfg);
lynxeyed_atsu 0:63ed631d8c3a 174 PinCfg.Pinnum = 9;
lynxeyed_atsu 0:63ed631d8c3a 175 PINSEL_ConfigPin(&PinCfg);
lynxeyed_atsu 0:63ed631d8c3a 176
lynxeyed_atsu 0:63ed631d8c3a 177 Buffer_Init();
lynxeyed_atsu 0:63ed631d8c3a 178 I2S_Init(LPC_I2S);
lynxeyed_atsu 0:63ed631d8c3a 179
lynxeyed_atsu 0:63ed631d8c3a 180 /* setup:
lynxeyed_atsu 0:63ed631d8c3a 181 * - wordwidth: 16 bits
lynxeyed_atsu 0:63ed631d8c3a 182 * - stereo mode
lynxeyed_atsu 0:63ed631d8c3a 183 * - master mode for I2S_TX and slave for I2S_RX
lynxeyed_atsu 0:63ed631d8c3a 184 * - ws_halfperiod is 31
lynxeyed_atsu 0:63ed631d8c3a 185 * - not use mute mode
lynxeyed_atsu 0:63ed631d8c3a 186 * - use reset and stop mode
lynxeyed_atsu 0:63ed631d8c3a 187 * - select the fractional rate divider clock output as the source,
lynxeyed_atsu 0:63ed631d8c3a 188 * - disable 4-pin mode
lynxeyed_atsu 0:63ed631d8c3a 189 * - MCLK ouput is disable
lynxeyed_atsu 0:63ed631d8c3a 190 * - Frequency = 44.1 kHz
lynxeyed_atsu 0:63ed631d8c3a 191 * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
lynxeyed_atsu 0:63ed631d8c3a 192 * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
lynxeyed_atsu 0:63ed631d8c3a 193 * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
lynxeyed_atsu 0:63ed631d8c3a 194 */
lynxeyed_atsu 0:63ed631d8c3a 195
lynxeyed_atsu 0:63ed631d8c3a 196 /* Audio Config*/
lynxeyed_atsu 0:63ed631d8c3a 197 I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
lynxeyed_atsu 0:63ed631d8c3a 198 I2S_ConfigStruct.mono = I2S_STEREO;
lynxeyed_atsu 0:63ed631d8c3a 199 I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
lynxeyed_atsu 0:63ed631d8c3a 200 I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
lynxeyed_atsu 0:63ed631d8c3a 201 I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
lynxeyed_atsu 0:63ed631d8c3a 202 I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
lynxeyed_atsu 0:63ed631d8c3a 203 I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
lynxeyed_atsu 0:63ed631d8c3a 204
lynxeyed_atsu 0:63ed631d8c3a 205 I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
lynxeyed_atsu 0:63ed631d8c3a 206 I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
lynxeyed_atsu 0:63ed631d8c3a 207
lynxeyed_atsu 0:63ed631d8c3a 208 /* Clock Mode Config*/
lynxeyed_atsu 0:63ed631d8c3a 209 CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2S,CLKPWR_PCLKSEL_CCLK_DIV_4);
lynxeyed_atsu 0:63ed631d8c3a 210
lynxeyed_atsu 0:63ed631d8c3a 211 I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
lynxeyed_atsu 0:63ed631d8c3a 212 I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
lynxeyed_atsu 0:63ed631d8c3a 213 I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
lynxeyed_atsu 0:63ed631d8c3a 214 I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
lynxeyed_atsu 0:63ed631d8c3a 215 I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
lynxeyed_atsu 0:63ed631d8c3a 216
lynxeyed_atsu 0:63ed631d8c3a 217
lynxeyed_atsu 0:63ed631d8c3a 218 //I2S_FreqConfig(LPC_I2S, (uint16_t)44100, I2S_TX_MODE);
lynxeyed_atsu 0:63ed631d8c3a 219 I2S_SetBitRate(LPC_I2S, 0, I2S_TX_MODE); //FOR SLAVE MODE TX
lynxeyed_atsu 0:63ed631d8c3a 220 I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
lynxeyed_atsu 0:63ed631d8c3a 221
lynxeyed_atsu 0:63ed631d8c3a 222 I2S_Stop(LPC_I2S, I2S_TX_MODE);
lynxeyed_atsu 0:63ed631d8c3a 223 I2S_Stop(LPC_I2S, I2S_RX_MODE);
lynxeyed_atsu 0:63ed631d8c3a 224
lynxeyed_atsu 0:63ed631d8c3a 225
lynxeyed_atsu 0:63ed631d8c3a 226
lynxeyed_atsu 0:63ed631d8c3a 227
lynxeyed_atsu 0:63ed631d8c3a 228 NVIC_EnableIRQ(I2S_IRQn);
lynxeyed_atsu 0:63ed631d8c3a 229
lynxeyed_atsu 0:63ed631d8c3a 230 /* RX FIFO depth is 1, TX FIFO depth is 8. */
lynxeyed_atsu 0:63ed631d8c3a 231 I2S_IRQConfig(LPC_I2S,I2S_TX_MODE,8);
lynxeyed_atsu 0:63ed631d8c3a 232 I2S_IRQConfig(LPC_I2S,I2S_RX_MODE,1);
lynxeyed_atsu 0:63ed631d8c3a 233 //I2S_IRQCmd(LPC_I2S,I2S_TX_MODE,ENABLE);
lynxeyed_atsu 0:63ed631d8c3a 234
lynxeyed_atsu 0:63ed631d8c3a 235
lynxeyed_atsu 0:63ed631d8c3a 236
lynxeyed_atsu 0:63ed631d8c3a 237
lynxeyed_atsu 0:63ed631d8c3a 238
lynxeyed_atsu 0:63ed631d8c3a 239 I2S_Start(LPC_I2S);
lynxeyed_atsu 0:63ed631d8c3a 240
lynxeyed_atsu 0:63ed631d8c3a 241 }
lynxeyed_atsu 0:63ed631d8c3a 242
lynxeyed_atsu 0:63ed631d8c3a 243
lynxeyed_atsu 0:63ed631d8c3a 244
lynxeyed_atsu 0:63ed631d8c3a 245
lynxeyed_atsu 0:63ed631d8c3a 246
lynxeyed_atsu 0:63ed631d8c3a 247
lynxeyed_atsu 0:63ed631d8c3a 248
lynxeyed_atsu 0:63ed631d8c3a 249
lynxeyed_atsu 0:63ed631d8c3a 250
lynxeyed_atsu 0:63ed631d8c3a 251
lynxeyed_atsu 0:63ed631d8c3a 252
lynxeyed_atsu 0:63ed631d8c3a 253 #ifdef DEBUG
lynxeyed_atsu 0:63ed631d8c3a 254 /*******************************************************************************
lynxeyed_atsu 0:63ed631d8c3a 255 * @brief Reports the name of the source file and the source line number
lynxeyed_atsu 0:63ed631d8c3a 256 * where the CHECK_PARAM error has occurred.
lynxeyed_atsu 0:63ed631d8c3a 257 * @param[in] file Pointer to the source file name
lynxeyed_atsu 0:63ed631d8c3a 258 * @param[in] line assert_param error line source number
lynxeyed_atsu 0:63ed631d8c3a 259 * @return None
lynxeyed_atsu 0:63ed631d8c3a 260 *******************************************************************************/
lynxeyed_atsu 0:63ed631d8c3a 261 void check_failed(uint8_t *file, uint32_t line)
lynxeyed_atsu 0:63ed631d8c3a 262 {
lynxeyed_atsu 0:63ed631d8c3a 263 /* User can add his own implementation to report the file name and line number,
lynxeyed_atsu 0:63ed631d8c3a 264 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
lynxeyed_atsu 0:63ed631d8c3a 265
lynxeyed_atsu 0:63ed631d8c3a 266 /* Infinite loop */
lynxeyed_atsu 0:63ed631d8c3a 267 while(1);
lynxeyed_atsu 0:63ed631d8c3a 268 }
lynxeyed_atsu 0:63ed631d8c3a 269 #endif
lynxeyed_atsu 0:63ed631d8c3a 270
lynxeyed_atsu 0:63ed631d8c3a 271 /*
lynxeyed_atsu 0:63ed631d8c3a 272 * @}
lynxeyed_atsu 0:63ed631d8c3a 273 */