I2S_AIC23B_32khz_wavtest -

Users » lynxeyed_atsu » Code » I2S_AIC23B_32khz_wavtest

xeye_ atsu / Mbed 2 deprecated I2S_AIC23B_32khz_wavtest

I2S_Example/core_cm3.c@0:63ed631d8c3a, 2011-01-21 (annotated)

Committer:: lynxeyed_atsu
Date:: Fri Jan 21 08:39:48 2011 +0000
Revision:: 0:63ed631d8c3a

Who changed what in which revision?

User	Revision	Line number	New contents of line
lynxeyed_atsu	0:63ed631d8c3a	1	/************************************************************************//
lynxeyed_atsu	0:63ed631d8c3a	2	* @file core_cm3.c
lynxeyed_atsu	0:63ed631d8c3a	3	* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
lynxeyed_atsu	0:63ed631d8c3a	4	* @version V1.30
lynxeyed_atsu	0:63ed631d8c3a	5	* @date 30. October 2009
lynxeyed_atsu	0:63ed631d8c3a	6	*
lynxeyed_atsu	0:63ed631d8c3a	7	* @note
lynxeyed_atsu	0:63ed631d8c3a	8	* Copyright (C) 2009 ARM Limited. All rights reserved.
lynxeyed_atsu	0:63ed631d8c3a	9	*
lynxeyed_atsu	0:63ed631d8c3a	10	* @par
lynxeyed_atsu	0:63ed631d8c3a	11	* ARM Limited (ARM) is supplying this software for use with Cortex-M
lynxeyed_atsu	0:63ed631d8c3a	12	* processor based microcontrollers. This file can be freely distributed
lynxeyed_atsu	0:63ed631d8c3a	13	* within development tools that are supporting such ARM based processors.
lynxeyed_atsu	0:63ed631d8c3a	14	*
lynxeyed_atsu	0:63ed631d8c3a	15	* @par
lynxeyed_atsu	0:63ed631d8c3a	16	* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
lynxeyed_atsu	0:63ed631d8c3a	17	* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
lynxeyed_atsu	0:63ed631d8c3a	18	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
lynxeyed_atsu	0:63ed631d8c3a	19	* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
lynxeyed_atsu	0:63ed631d8c3a	20	* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
lynxeyed_atsu	0:63ed631d8c3a	21	*
lynxeyed_atsu	0:63ed631d8c3a	22	******************************************************************************/
lynxeyed_atsu	0:63ed631d8c3a	23
lynxeyed_atsu	0:63ed631d8c3a	24	#include <stdint.h>
lynxeyed_atsu	0:63ed631d8c3a	25
lynxeyed_atsu	0:63ed631d8c3a	26
lynxeyed_atsu	0:63ed631d8c3a	27	/** @addtogroup CMSIS
lynxeyed_atsu	0:63ed631d8c3a	28	* @{
lynxeyed_atsu	0:63ed631d8c3a	29	*/
lynxeyed_atsu	0:63ed631d8c3a	30
lynxeyed_atsu	0:63ed631d8c3a	31	/* define compiler specific symbols */
lynxeyed_atsu	0:63ed631d8c3a	32	#if defined ( __CC_ARM )
lynxeyed_atsu	0:63ed631d8c3a	33	#define __ASM __asm /!< asm keyword for ARM Compiler /
lynxeyed_atsu	0:63ed631d8c3a	34	#define __INLINE __inline /!< inline keyword for ARM Compiler /
lynxeyed_atsu	0:63ed631d8c3a	35
lynxeyed_atsu	0:63ed631d8c3a	36	#elif defined ( __ICCARM__ )
lynxeyed_atsu	0:63ed631d8c3a	37	#define __ASM __asm /!< asm keyword for IAR Compiler /
lynxeyed_atsu	0:63ed631d8c3a	38	#define __INLINE inline /!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! /
lynxeyed_atsu	0:63ed631d8c3a	39
lynxeyed_atsu	0:63ed631d8c3a	40	#elif defined ( __GNUC__ )
lynxeyed_atsu	0:63ed631d8c3a	41	#define __ASM __asm /!< asm keyword for GNU Compiler /
lynxeyed_atsu	0:63ed631d8c3a	42	#define __INLINE inline /!< inline keyword for GNU Compiler /
lynxeyed_atsu	0:63ed631d8c3a	43
lynxeyed_atsu	0:63ed631d8c3a	44	#elif defined ( __TASKING__ )
lynxeyed_atsu	0:63ed631d8c3a	45	#define __ASM __asm /!< asm keyword for TASKING Compiler /
lynxeyed_atsu	0:63ed631d8c3a	46	#define __INLINE inline /!< inline keyword for TASKING Compiler /
lynxeyed_atsu	0:63ed631d8c3a	47
lynxeyed_atsu	0:63ed631d8c3a	48	#endif
lynxeyed_atsu	0:63ed631d8c3a	49
lynxeyed_atsu	0:63ed631d8c3a	50
lynxeyed_atsu	0:63ed631d8c3a	51	/* ################### Compiler specific Intrinsics ########################### */
lynxeyed_atsu	0:63ed631d8c3a	52
lynxeyed_atsu	0:63ed631d8c3a	53	#if defined ( __CC_ARM ) /------------------RealView Compiler -----------------/
lynxeyed_atsu	0:63ed631d8c3a	54	/* ARM armcc specific functions */
lynxeyed_atsu	0:63ed631d8c3a	55
lynxeyed_atsu	0:63ed631d8c3a	56	/**
lynxeyed_atsu	0:63ed631d8c3a	57	* @brief Return the Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	58	*
lynxeyed_atsu	0:63ed631d8c3a	59	* @return ProcessStackPointer
lynxeyed_atsu	0:63ed631d8c3a	60	*
lynxeyed_atsu	0:63ed631d8c3a	61	* Return the actual process stack pointer
lynxeyed_atsu	0:63ed631d8c3a	62	*/
lynxeyed_atsu	0:63ed631d8c3a	63	__ASM uint32_t __get_PSP(void)
lynxeyed_atsu	0:63ed631d8c3a	64	{
lynxeyed_atsu	0:63ed631d8c3a	65	mrs r0, psp
lynxeyed_atsu	0:63ed631d8c3a	66	bx lr
lynxeyed_atsu	0:63ed631d8c3a	67	}
lynxeyed_atsu	0:63ed631d8c3a	68
lynxeyed_atsu	0:63ed631d8c3a	69	/**
lynxeyed_atsu	0:63ed631d8c3a	70	* @brief Set the Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	71	*
lynxeyed_atsu	0:63ed631d8c3a	72	* @param topOfProcStack Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	73	*
lynxeyed_atsu	0:63ed631d8c3a	74	* Assign the value ProcessStackPointer to the MSP
lynxeyed_atsu	0:63ed631d8c3a	75	* (process stack pointer) Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	76	*/
lynxeyed_atsu	0:63ed631d8c3a	77	__ASM void __set_PSP(uint32_t topOfProcStack)
lynxeyed_atsu	0:63ed631d8c3a	78	{
lynxeyed_atsu	0:63ed631d8c3a	79	msr psp, r0
lynxeyed_atsu	0:63ed631d8c3a	80	bx lr
lynxeyed_atsu	0:63ed631d8c3a	81	}
lynxeyed_atsu	0:63ed631d8c3a	82
lynxeyed_atsu	0:63ed631d8c3a	83	/**
lynxeyed_atsu	0:63ed631d8c3a	84	* @brief Return the Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	85	*
lynxeyed_atsu	0:63ed631d8c3a	86	* @return Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	87	*
lynxeyed_atsu	0:63ed631d8c3a	88	* Return the current value of the MSP (main stack pointer)
lynxeyed_atsu	0:63ed631d8c3a	89	* Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	90	*/
lynxeyed_atsu	0:63ed631d8c3a	91	__ASM uint32_t __get_MSP(void)
lynxeyed_atsu	0:63ed631d8c3a	92	{
lynxeyed_atsu	0:63ed631d8c3a	93	mrs r0, msp
lynxeyed_atsu	0:63ed631d8c3a	94	bx lr
lynxeyed_atsu	0:63ed631d8c3a	95	}
lynxeyed_atsu	0:63ed631d8c3a	96
lynxeyed_atsu	0:63ed631d8c3a	97	/**
lynxeyed_atsu	0:63ed631d8c3a	98	* @brief Set the Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	99	*
lynxeyed_atsu	0:63ed631d8c3a	100	* @param topOfMainStack Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	101	*
lynxeyed_atsu	0:63ed631d8c3a	102	* Assign the value mainStackPointer to the MSP
lynxeyed_atsu	0:63ed631d8c3a	103	* (main stack pointer) Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	104	*/
lynxeyed_atsu	0:63ed631d8c3a	105	__ASM void __set_MSP(uint32_t mainStackPointer)
lynxeyed_atsu	0:63ed631d8c3a	106	{
lynxeyed_atsu	0:63ed631d8c3a	107	msr msp, r0
lynxeyed_atsu	0:63ed631d8c3a	108	bx lr
lynxeyed_atsu	0:63ed631d8c3a	109	}
lynxeyed_atsu	0:63ed631d8c3a	110
lynxeyed_atsu	0:63ed631d8c3a	111	/**
lynxeyed_atsu	0:63ed631d8c3a	112	* @brief Reverse byte order in unsigned short value
lynxeyed_atsu	0:63ed631d8c3a	113	*
lynxeyed_atsu	0:63ed631d8c3a	114	* @param value value to reverse
lynxeyed_atsu	0:63ed631d8c3a	115	* @return reversed value
lynxeyed_atsu	0:63ed631d8c3a	116	*
lynxeyed_atsu	0:63ed631d8c3a	117	* Reverse byte order in unsigned short value
lynxeyed_atsu	0:63ed631d8c3a	118	*/
lynxeyed_atsu	0:63ed631d8c3a	119	__ASM uint32_t __REV16(uint16_t value)
lynxeyed_atsu	0:63ed631d8c3a	120	{
lynxeyed_atsu	0:63ed631d8c3a	121	rev16 r0, r0
lynxeyed_atsu	0:63ed631d8c3a	122	bx lr
lynxeyed_atsu	0:63ed631d8c3a	123	}
lynxeyed_atsu	0:63ed631d8c3a	124
lynxeyed_atsu	0:63ed631d8c3a	125	/**
lynxeyed_atsu	0:63ed631d8c3a	126	* @brief Reverse byte order in signed short value with sign extension to integer
lynxeyed_atsu	0:63ed631d8c3a	127	*
lynxeyed_atsu	0:63ed631d8c3a	128	* @param value value to reverse
lynxeyed_atsu	0:63ed631d8c3a	129	* @return reversed value
lynxeyed_atsu	0:63ed631d8c3a	130	*
lynxeyed_atsu	0:63ed631d8c3a	131	* Reverse byte order in signed short value with sign extension to integer
lynxeyed_atsu	0:63ed631d8c3a	132	*/
lynxeyed_atsu	0:63ed631d8c3a	133	__ASM int32_t __REVSH(int16_t value)
lynxeyed_atsu	0:63ed631d8c3a	134	{
lynxeyed_atsu	0:63ed631d8c3a	135	revsh r0, r0
lynxeyed_atsu	0:63ed631d8c3a	136	bx lr
lynxeyed_atsu	0:63ed631d8c3a	137	}
lynxeyed_atsu	0:63ed631d8c3a	138
lynxeyed_atsu	0:63ed631d8c3a	139
lynxeyed_atsu	0:63ed631d8c3a	140	#if (__ARMCC_VERSION < 400000)
lynxeyed_atsu	0:63ed631d8c3a	141
lynxeyed_atsu	0:63ed631d8c3a	142	/**
lynxeyed_atsu	0:63ed631d8c3a	143	* @brief Remove the exclusive lock created by ldrex
lynxeyed_atsu	0:63ed631d8c3a	144	*
lynxeyed_atsu	0:63ed631d8c3a	145	* Removes the exclusive lock which is created by ldrex.
lynxeyed_atsu	0:63ed631d8c3a	146	*/
lynxeyed_atsu	0:63ed631d8c3a	147	__ASM void __CLREX(void)
lynxeyed_atsu	0:63ed631d8c3a	148	{
lynxeyed_atsu	0:63ed631d8c3a	149	clrex
lynxeyed_atsu	0:63ed631d8c3a	150	}
lynxeyed_atsu	0:63ed631d8c3a	151
lynxeyed_atsu	0:63ed631d8c3a	152	/**
lynxeyed_atsu	0:63ed631d8c3a	153	* @brief Return the Base Priority value
lynxeyed_atsu	0:63ed631d8c3a	154	*
lynxeyed_atsu	0:63ed631d8c3a	155	* @return BasePriority
lynxeyed_atsu	0:63ed631d8c3a	156	*
lynxeyed_atsu	0:63ed631d8c3a	157	* Return the content of the base priority register
lynxeyed_atsu	0:63ed631d8c3a	158	*/
lynxeyed_atsu	0:63ed631d8c3a	159	__ASM uint32_t __get_BASEPRI(void)
lynxeyed_atsu	0:63ed631d8c3a	160	{
lynxeyed_atsu	0:63ed631d8c3a	161	mrs r0, basepri
lynxeyed_atsu	0:63ed631d8c3a	162	bx lr
lynxeyed_atsu	0:63ed631d8c3a	163	}
lynxeyed_atsu	0:63ed631d8c3a	164
lynxeyed_atsu	0:63ed631d8c3a	165	/**
lynxeyed_atsu	0:63ed631d8c3a	166	* @brief Set the Base Priority value
lynxeyed_atsu	0:63ed631d8c3a	167	*
lynxeyed_atsu	0:63ed631d8c3a	168	* @param basePri BasePriority
lynxeyed_atsu	0:63ed631d8c3a	169	*
lynxeyed_atsu	0:63ed631d8c3a	170	* Set the base priority register
lynxeyed_atsu	0:63ed631d8c3a	171	*/
lynxeyed_atsu	0:63ed631d8c3a	172	__ASM void __set_BASEPRI(uint32_t basePri)
lynxeyed_atsu	0:63ed631d8c3a	173	{
lynxeyed_atsu	0:63ed631d8c3a	174	msr basepri, r0
lynxeyed_atsu	0:63ed631d8c3a	175	bx lr
lynxeyed_atsu	0:63ed631d8c3a	176	}
lynxeyed_atsu	0:63ed631d8c3a	177
lynxeyed_atsu	0:63ed631d8c3a	178	/**
lynxeyed_atsu	0:63ed631d8c3a	179	* @brief Return the Priority Mask value
lynxeyed_atsu	0:63ed631d8c3a	180	*
lynxeyed_atsu	0:63ed631d8c3a	181	* @return PriMask
lynxeyed_atsu	0:63ed631d8c3a	182	*
lynxeyed_atsu	0:63ed631d8c3a	183	* Return state of the priority mask bit from the priority mask register
lynxeyed_atsu	0:63ed631d8c3a	184	*/
lynxeyed_atsu	0:63ed631d8c3a	185	__ASM uint32_t __get_PRIMASK(void)
lynxeyed_atsu	0:63ed631d8c3a	186	{
lynxeyed_atsu	0:63ed631d8c3a	187	mrs r0, primask
lynxeyed_atsu	0:63ed631d8c3a	188	bx lr
lynxeyed_atsu	0:63ed631d8c3a	189	}
lynxeyed_atsu	0:63ed631d8c3a	190
lynxeyed_atsu	0:63ed631d8c3a	191	/**
lynxeyed_atsu	0:63ed631d8c3a	192	* @brief Set the Priority Mask value
lynxeyed_atsu	0:63ed631d8c3a	193	*
lynxeyed_atsu	0:63ed631d8c3a	194	* @param priMask PriMask
lynxeyed_atsu	0:63ed631d8c3a	195	*
lynxeyed_atsu	0:63ed631d8c3a	196	* Set the priority mask bit in the priority mask register
lynxeyed_atsu	0:63ed631d8c3a	197	*/
lynxeyed_atsu	0:63ed631d8c3a	198	__ASM void __set_PRIMASK(uint32_t priMask)
lynxeyed_atsu	0:63ed631d8c3a	199	{
lynxeyed_atsu	0:63ed631d8c3a	200	msr primask, r0
lynxeyed_atsu	0:63ed631d8c3a	201	bx lr
lynxeyed_atsu	0:63ed631d8c3a	202	}
lynxeyed_atsu	0:63ed631d8c3a	203
lynxeyed_atsu	0:63ed631d8c3a	204	/**
lynxeyed_atsu	0:63ed631d8c3a	205	* @brief Return the Fault Mask value
lynxeyed_atsu	0:63ed631d8c3a	206	*
lynxeyed_atsu	0:63ed631d8c3a	207	* @return FaultMask
lynxeyed_atsu	0:63ed631d8c3a	208	*
lynxeyed_atsu	0:63ed631d8c3a	209	* Return the content of the fault mask register
lynxeyed_atsu	0:63ed631d8c3a	210	*/
lynxeyed_atsu	0:63ed631d8c3a	211	__ASM uint32_t __get_FAULTMASK(void)
lynxeyed_atsu	0:63ed631d8c3a	212	{
lynxeyed_atsu	0:63ed631d8c3a	213	mrs r0, faultmask
lynxeyed_atsu	0:63ed631d8c3a	214	bx lr
lynxeyed_atsu	0:63ed631d8c3a	215	}
lynxeyed_atsu	0:63ed631d8c3a	216
lynxeyed_atsu	0:63ed631d8c3a	217	/**
lynxeyed_atsu	0:63ed631d8c3a	218	* @brief Set the Fault Mask value
lynxeyed_atsu	0:63ed631d8c3a	219	*
lynxeyed_atsu	0:63ed631d8c3a	220	* @param faultMask faultMask value
lynxeyed_atsu	0:63ed631d8c3a	221	*
lynxeyed_atsu	0:63ed631d8c3a	222	* Set the fault mask register
lynxeyed_atsu	0:63ed631d8c3a	223	*/
lynxeyed_atsu	0:63ed631d8c3a	224	__ASM void __set_FAULTMASK(uint32_t faultMask)
lynxeyed_atsu	0:63ed631d8c3a	225	{
lynxeyed_atsu	0:63ed631d8c3a	226	msr faultmask, r0
lynxeyed_atsu	0:63ed631d8c3a	227	bx lr
lynxeyed_atsu	0:63ed631d8c3a	228	}
lynxeyed_atsu	0:63ed631d8c3a	229
lynxeyed_atsu	0:63ed631d8c3a	230	/**
lynxeyed_atsu	0:63ed631d8c3a	231	* @brief Return the Control Register value
lynxeyed_atsu	0:63ed631d8c3a	232	*
lynxeyed_atsu	0:63ed631d8c3a	233	* @return Control value
lynxeyed_atsu	0:63ed631d8c3a	234	*
lynxeyed_atsu	0:63ed631d8c3a	235	* Return the content of the control register
lynxeyed_atsu	0:63ed631d8c3a	236	*/
lynxeyed_atsu	0:63ed631d8c3a	237	__ASM uint32_t __get_CONTROL(void)
lynxeyed_atsu	0:63ed631d8c3a	238	{
lynxeyed_atsu	0:63ed631d8c3a	239	mrs r0, control
lynxeyed_atsu	0:63ed631d8c3a	240	bx lr
lynxeyed_atsu	0:63ed631d8c3a	241	}
lynxeyed_atsu	0:63ed631d8c3a	242
lynxeyed_atsu	0:63ed631d8c3a	243	/**
lynxeyed_atsu	0:63ed631d8c3a	244	* @brief Set the Control Register value
lynxeyed_atsu	0:63ed631d8c3a	245	*
lynxeyed_atsu	0:63ed631d8c3a	246	* @param control Control value
lynxeyed_atsu	0:63ed631d8c3a	247	*
lynxeyed_atsu	0:63ed631d8c3a	248	* Set the control register
lynxeyed_atsu	0:63ed631d8c3a	249	*/
lynxeyed_atsu	0:63ed631d8c3a	250	__ASM void __set_CONTROL(uint32_t control)
lynxeyed_atsu	0:63ed631d8c3a	251	{
lynxeyed_atsu	0:63ed631d8c3a	252	msr control, r0
lynxeyed_atsu	0:63ed631d8c3a	253	bx lr
lynxeyed_atsu	0:63ed631d8c3a	254	}
lynxeyed_atsu	0:63ed631d8c3a	255
lynxeyed_atsu	0:63ed631d8c3a	256	#endif /* __ARMCC_VERSION */
lynxeyed_atsu	0:63ed631d8c3a	257
lynxeyed_atsu	0:63ed631d8c3a	258
lynxeyed_atsu	0:63ed631d8c3a	259
lynxeyed_atsu	0:63ed631d8c3a	260	#elif (defined (__ICCARM__)) /------------------ ICC Compiler -------------------/
lynxeyed_atsu	0:63ed631d8c3a	261	/* IAR iccarm specific functions */
lynxeyed_atsu	0:63ed631d8c3a	262	#pragma diag_suppress=Pe940
lynxeyed_atsu	0:63ed631d8c3a	263
lynxeyed_atsu	0:63ed631d8c3a	264	/**
lynxeyed_atsu	0:63ed631d8c3a	265	* @brief Return the Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	266	*
lynxeyed_atsu	0:63ed631d8c3a	267	* @return ProcessStackPointer
lynxeyed_atsu	0:63ed631d8c3a	268	*
lynxeyed_atsu	0:63ed631d8c3a	269	* Return the actual process stack pointer
lynxeyed_atsu	0:63ed631d8c3a	270	*/
lynxeyed_atsu	0:63ed631d8c3a	271	uint32_t __get_PSP(void)
lynxeyed_atsu	0:63ed631d8c3a	272	{
lynxeyed_atsu	0:63ed631d8c3a	273	__ASM("mrs r0, psp");
lynxeyed_atsu	0:63ed631d8c3a	274	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	275	}
lynxeyed_atsu	0:63ed631d8c3a	276
lynxeyed_atsu	0:63ed631d8c3a	277	/**
lynxeyed_atsu	0:63ed631d8c3a	278	* @brief Set the Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	279	*
lynxeyed_atsu	0:63ed631d8c3a	280	* @param topOfProcStack Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	281	*
lynxeyed_atsu	0:63ed631d8c3a	282	* Assign the value ProcessStackPointer to the MSP
lynxeyed_atsu	0:63ed631d8c3a	283	* (process stack pointer) Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	284	*/
lynxeyed_atsu	0:63ed631d8c3a	285	void __set_PSP(uint32_t topOfProcStack)
lynxeyed_atsu	0:63ed631d8c3a	286	{
lynxeyed_atsu	0:63ed631d8c3a	287	__ASM("msr psp, r0");
lynxeyed_atsu	0:63ed631d8c3a	288	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	289	}
lynxeyed_atsu	0:63ed631d8c3a	290
lynxeyed_atsu	0:63ed631d8c3a	291	/**
lynxeyed_atsu	0:63ed631d8c3a	292	* @brief Return the Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	293	*
lynxeyed_atsu	0:63ed631d8c3a	294	* @return Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	295	*
lynxeyed_atsu	0:63ed631d8c3a	296	* Return the current value of the MSP (main stack pointer)
lynxeyed_atsu	0:63ed631d8c3a	297	* Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	298	*/
lynxeyed_atsu	0:63ed631d8c3a	299	uint32_t __get_MSP(void)
lynxeyed_atsu	0:63ed631d8c3a	300	{
lynxeyed_atsu	0:63ed631d8c3a	301	__ASM("mrs r0, msp");
lynxeyed_atsu	0:63ed631d8c3a	302	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	303	}
lynxeyed_atsu	0:63ed631d8c3a	304
lynxeyed_atsu	0:63ed631d8c3a	305	/**
lynxeyed_atsu	0:63ed631d8c3a	306	* @brief Set the Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	307	*
lynxeyed_atsu	0:63ed631d8c3a	308	* @param topOfMainStack Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	309	*
lynxeyed_atsu	0:63ed631d8c3a	310	* Assign the value mainStackPointer to the MSP
lynxeyed_atsu	0:63ed631d8c3a	311	* (main stack pointer) Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	312	*/
lynxeyed_atsu	0:63ed631d8c3a	313	void __set_MSP(uint32_t topOfMainStack)
lynxeyed_atsu	0:63ed631d8c3a	314	{
lynxeyed_atsu	0:63ed631d8c3a	315	__ASM("msr msp, r0");
lynxeyed_atsu	0:63ed631d8c3a	316	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	317	}
lynxeyed_atsu	0:63ed631d8c3a	318
lynxeyed_atsu	0:63ed631d8c3a	319	/**
lynxeyed_atsu	0:63ed631d8c3a	320	* @brief Reverse byte order in unsigned short value
lynxeyed_atsu	0:63ed631d8c3a	321	*
lynxeyed_atsu	0:63ed631d8c3a	322	* @param value value to reverse
lynxeyed_atsu	0:63ed631d8c3a	323	* @return reversed value
lynxeyed_atsu	0:63ed631d8c3a	324	*
lynxeyed_atsu	0:63ed631d8c3a	325	* Reverse byte order in unsigned short value
lynxeyed_atsu	0:63ed631d8c3a	326	*/
lynxeyed_atsu	0:63ed631d8c3a	327	uint32_t __REV16(uint16_t value)
lynxeyed_atsu	0:63ed631d8c3a	328	{
lynxeyed_atsu	0:63ed631d8c3a	329	__ASM("rev16 r0, r0");
lynxeyed_atsu	0:63ed631d8c3a	330	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	331	}
lynxeyed_atsu	0:63ed631d8c3a	332
lynxeyed_atsu	0:63ed631d8c3a	333	/**
lynxeyed_atsu	0:63ed631d8c3a	334	* @brief Reverse bit order of value
lynxeyed_atsu	0:63ed631d8c3a	335	*
lynxeyed_atsu	0:63ed631d8c3a	336	* @param value value to reverse
lynxeyed_atsu	0:63ed631d8c3a	337	* @return reversed value
lynxeyed_atsu	0:63ed631d8c3a	338	*
lynxeyed_atsu	0:63ed631d8c3a	339	* Reverse bit order of value
lynxeyed_atsu	0:63ed631d8c3a	340	*/
lynxeyed_atsu	0:63ed631d8c3a	341	uint32_t __RBIT(uint32_t value)
lynxeyed_atsu	0:63ed631d8c3a	342	{
lynxeyed_atsu	0:63ed631d8c3a	343	__ASM("rbit r0, r0");
lynxeyed_atsu	0:63ed631d8c3a	344	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	345	}
lynxeyed_atsu	0:63ed631d8c3a	346
lynxeyed_atsu	0:63ed631d8c3a	347	/**
lynxeyed_atsu	0:63ed631d8c3a	348	* @brief LDR Exclusive (8 bit)
lynxeyed_atsu	0:63ed631d8c3a	349	*
lynxeyed_atsu	0:63ed631d8c3a	350	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	351	* @return value of (*address)
lynxeyed_atsu	0:63ed631d8c3a	352	*
lynxeyed_atsu	0:63ed631d8c3a	353	* Exclusive LDR command for 8 bit values)
lynxeyed_atsu	0:63ed631d8c3a	354	*/
lynxeyed_atsu	0:63ed631d8c3a	355	uint8_t __LDREXB(uint8_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	356	{
lynxeyed_atsu	0:63ed631d8c3a	357	__ASM("ldrexb r0, [r0]");
lynxeyed_atsu	0:63ed631d8c3a	358	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	359	}
lynxeyed_atsu	0:63ed631d8c3a	360
lynxeyed_atsu	0:63ed631d8c3a	361	/**
lynxeyed_atsu	0:63ed631d8c3a	362	* @brief LDR Exclusive (16 bit)
lynxeyed_atsu	0:63ed631d8c3a	363	*
lynxeyed_atsu	0:63ed631d8c3a	364	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	365	* @return value of (*address)
lynxeyed_atsu	0:63ed631d8c3a	366	*
lynxeyed_atsu	0:63ed631d8c3a	367	* Exclusive LDR command for 16 bit values
lynxeyed_atsu	0:63ed631d8c3a	368	*/
lynxeyed_atsu	0:63ed631d8c3a	369	uint16_t __LDREXH(uint16_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	370	{
lynxeyed_atsu	0:63ed631d8c3a	371	__ASM("ldrexh r0, [r0]");
lynxeyed_atsu	0:63ed631d8c3a	372	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	373	}
lynxeyed_atsu	0:63ed631d8c3a	374
lynxeyed_atsu	0:63ed631d8c3a	375	/**
lynxeyed_atsu	0:63ed631d8c3a	376	* @brief LDR Exclusive (32 bit)
lynxeyed_atsu	0:63ed631d8c3a	377	*
lynxeyed_atsu	0:63ed631d8c3a	378	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	379	* @return value of (*address)
lynxeyed_atsu	0:63ed631d8c3a	380	*
lynxeyed_atsu	0:63ed631d8c3a	381	* Exclusive LDR command for 32 bit values
lynxeyed_atsu	0:63ed631d8c3a	382	*/
lynxeyed_atsu	0:63ed631d8c3a	383	uint32_t __LDREXW(uint32_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	384	{
lynxeyed_atsu	0:63ed631d8c3a	385	__ASM("ldrex r0, [r0]");
lynxeyed_atsu	0:63ed631d8c3a	386	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	387	}
lynxeyed_atsu	0:63ed631d8c3a	388
lynxeyed_atsu	0:63ed631d8c3a	389	/**
lynxeyed_atsu	0:63ed631d8c3a	390	* @brief STR Exclusive (8 bit)
lynxeyed_atsu	0:63ed631d8c3a	391	*
lynxeyed_atsu	0:63ed631d8c3a	392	* @param value value to store
lynxeyed_atsu	0:63ed631d8c3a	393	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	394	* @return successful / failed
lynxeyed_atsu	0:63ed631d8c3a	395	*
lynxeyed_atsu	0:63ed631d8c3a	396	* Exclusive STR command for 8 bit values
lynxeyed_atsu	0:63ed631d8c3a	397	*/
lynxeyed_atsu	0:63ed631d8c3a	398	uint32_t __STREXB(uint8_t value, uint8_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	399	{
lynxeyed_atsu	0:63ed631d8c3a	400	__ASM("strexb r0, r0, [r1]");
lynxeyed_atsu	0:63ed631d8c3a	401	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	402	}
lynxeyed_atsu	0:63ed631d8c3a	403
lynxeyed_atsu	0:63ed631d8c3a	404	/**
lynxeyed_atsu	0:63ed631d8c3a	405	* @brief STR Exclusive (16 bit)
lynxeyed_atsu	0:63ed631d8c3a	406	*
lynxeyed_atsu	0:63ed631d8c3a	407	* @param value value to store
lynxeyed_atsu	0:63ed631d8c3a	408	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	409	* @return successful / failed
lynxeyed_atsu	0:63ed631d8c3a	410	*
lynxeyed_atsu	0:63ed631d8c3a	411	* Exclusive STR command for 16 bit values
lynxeyed_atsu	0:63ed631d8c3a	412	*/
lynxeyed_atsu	0:63ed631d8c3a	413	uint32_t __STREXH(uint16_t value, uint16_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	414	{
lynxeyed_atsu	0:63ed631d8c3a	415	__ASM("strexh r0, r0, [r1]");
lynxeyed_atsu	0:63ed631d8c3a	416	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	417	}
lynxeyed_atsu	0:63ed631d8c3a	418
lynxeyed_atsu	0:63ed631d8c3a	419	/**
lynxeyed_atsu	0:63ed631d8c3a	420	* @brief STR Exclusive (32 bit)
lynxeyed_atsu	0:63ed631d8c3a	421	*
lynxeyed_atsu	0:63ed631d8c3a	422	* @param value value to store
lynxeyed_atsu	0:63ed631d8c3a	423	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	424	* @return successful / failed
lynxeyed_atsu	0:63ed631d8c3a	425	*
lynxeyed_atsu	0:63ed631d8c3a	426	* Exclusive STR command for 32 bit values
lynxeyed_atsu	0:63ed631d8c3a	427	*/
lynxeyed_atsu	0:63ed631d8c3a	428	uint32_t __STREXW(uint32_t value, uint32_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	429	{
lynxeyed_atsu	0:63ed631d8c3a	430	__ASM("strex r0, r0, [r1]");
lynxeyed_atsu	0:63ed631d8c3a	431	__ASM("bx lr");
lynxeyed_atsu	0:63ed631d8c3a	432	}
lynxeyed_atsu	0:63ed631d8c3a	433
lynxeyed_atsu	0:63ed631d8c3a	434	#pragma diag_default=Pe940
lynxeyed_atsu	0:63ed631d8c3a	435
lynxeyed_atsu	0:63ed631d8c3a	436
lynxeyed_atsu	0:63ed631d8c3a	437	#elif (defined (__GNUC__)) /------------------ GNU Compiler ---------------------/
lynxeyed_atsu	0:63ed631d8c3a	438	/* GNU gcc specific functions */
lynxeyed_atsu	0:63ed631d8c3a	439
lynxeyed_atsu	0:63ed631d8c3a	440	/**
lynxeyed_atsu	0:63ed631d8c3a	441	* @brief Return the Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	442	*
lynxeyed_atsu	0:63ed631d8c3a	443	* @return ProcessStackPointer
lynxeyed_atsu	0:63ed631d8c3a	444	*
lynxeyed_atsu	0:63ed631d8c3a	445	* Return the actual process stack pointer
lynxeyed_atsu	0:63ed631d8c3a	446	*/
lynxeyed_atsu	0:63ed631d8c3a	447	uint32_t __get_PSP(void) __attribute__( ( naked ) );
lynxeyed_atsu	0:63ed631d8c3a	448	uint32_t __get_PSP(void)
lynxeyed_atsu	0:63ed631d8c3a	449	{
lynxeyed_atsu	0:63ed631d8c3a	450	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	451
lynxeyed_atsu	0:63ed631d8c3a	452	__ASM volatile ("MRS %0, psp\n\t"
lynxeyed_atsu	0:63ed631d8c3a	453	"MOV r0, %0 \n\t"
lynxeyed_atsu	0:63ed631d8c3a	454	"BX lr \n\t" : "=r" (result) );
lynxeyed_atsu	0:63ed631d8c3a	455	return(result);
lynxeyed_atsu	0:63ed631d8c3a	456	}
lynxeyed_atsu	0:63ed631d8c3a	457
lynxeyed_atsu	0:63ed631d8c3a	458	/**
lynxeyed_atsu	0:63ed631d8c3a	459	* @brief Set the Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	460	*
lynxeyed_atsu	0:63ed631d8c3a	461	* @param topOfProcStack Process Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	462	*
lynxeyed_atsu	0:63ed631d8c3a	463	* Assign the value ProcessStackPointer to the MSP
lynxeyed_atsu	0:63ed631d8c3a	464	* (process stack pointer) Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	465	*/
lynxeyed_atsu	0:63ed631d8c3a	466	void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
lynxeyed_atsu	0:63ed631d8c3a	467	void __set_PSP(uint32_t topOfProcStack)
lynxeyed_atsu	0:63ed631d8c3a	468	{
lynxeyed_atsu	0:63ed631d8c3a	469	__ASM volatile ("MSR psp, %0\n\t"
lynxeyed_atsu	0:63ed631d8c3a	470	"BX lr \n\t" : : "r" (topOfProcStack) );
lynxeyed_atsu	0:63ed631d8c3a	471	}
lynxeyed_atsu	0:63ed631d8c3a	472
lynxeyed_atsu	0:63ed631d8c3a	473	/**
lynxeyed_atsu	0:63ed631d8c3a	474	* @brief Return the Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	475	*
lynxeyed_atsu	0:63ed631d8c3a	476	* @return Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	477	*
lynxeyed_atsu	0:63ed631d8c3a	478	* Return the current value of the MSP (main stack pointer)
lynxeyed_atsu	0:63ed631d8c3a	479	* Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	480	*/
lynxeyed_atsu	0:63ed631d8c3a	481	uint32_t __get_MSP(void) __attribute__( ( naked ) );
lynxeyed_atsu	0:63ed631d8c3a	482	uint32_t __get_MSP(void)
lynxeyed_atsu	0:63ed631d8c3a	483	{
lynxeyed_atsu	0:63ed631d8c3a	484	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	485
lynxeyed_atsu	0:63ed631d8c3a	486	__ASM volatile ("MRS %0, msp\n\t"
lynxeyed_atsu	0:63ed631d8c3a	487	"MOV r0, %0 \n\t"
lynxeyed_atsu	0:63ed631d8c3a	488	"BX lr \n\t" : "=r" (result) );
lynxeyed_atsu	0:63ed631d8c3a	489	return(result);
lynxeyed_atsu	0:63ed631d8c3a	490	}
lynxeyed_atsu	0:63ed631d8c3a	491
lynxeyed_atsu	0:63ed631d8c3a	492	/**
lynxeyed_atsu	0:63ed631d8c3a	493	* @brief Set the Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	494	*
lynxeyed_atsu	0:63ed631d8c3a	495	* @param topOfMainStack Main Stack Pointer
lynxeyed_atsu	0:63ed631d8c3a	496	*
lynxeyed_atsu	0:63ed631d8c3a	497	* Assign the value mainStackPointer to the MSP
lynxeyed_atsu	0:63ed631d8c3a	498	* (main stack pointer) Cortex processor register
lynxeyed_atsu	0:63ed631d8c3a	499	*/
lynxeyed_atsu	0:63ed631d8c3a	500	void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
lynxeyed_atsu	0:63ed631d8c3a	501	void __set_MSP(uint32_t topOfMainStack)
lynxeyed_atsu	0:63ed631d8c3a	502	{
lynxeyed_atsu	0:63ed631d8c3a	503	__ASM volatile ("MSR msp, %0\n\t"
lynxeyed_atsu	0:63ed631d8c3a	504	"BX lr \n\t" : : "r" (topOfMainStack) );
lynxeyed_atsu	0:63ed631d8c3a	505	}
lynxeyed_atsu	0:63ed631d8c3a	506
lynxeyed_atsu	0:63ed631d8c3a	507	/**
lynxeyed_atsu	0:63ed631d8c3a	508	* @brief Return the Base Priority value
lynxeyed_atsu	0:63ed631d8c3a	509	*
lynxeyed_atsu	0:63ed631d8c3a	510	* @return BasePriority
lynxeyed_atsu	0:63ed631d8c3a	511	*
lynxeyed_atsu	0:63ed631d8c3a	512	* Return the content of the base priority register
lynxeyed_atsu	0:63ed631d8c3a	513	*/
lynxeyed_atsu	0:63ed631d8c3a	514	uint32_t __get_BASEPRI(void)
lynxeyed_atsu	0:63ed631d8c3a	515	{
lynxeyed_atsu	0:63ed631d8c3a	516	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	517
lynxeyed_atsu	0:63ed631d8c3a	518	__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
lynxeyed_atsu	0:63ed631d8c3a	519	return(result);
lynxeyed_atsu	0:63ed631d8c3a	520	}
lynxeyed_atsu	0:63ed631d8c3a	521
lynxeyed_atsu	0:63ed631d8c3a	522	/**
lynxeyed_atsu	0:63ed631d8c3a	523	* @brief Set the Base Priority value
lynxeyed_atsu	0:63ed631d8c3a	524	*
lynxeyed_atsu	0:63ed631d8c3a	525	* @param basePri BasePriority
lynxeyed_atsu	0:63ed631d8c3a	526	*
lynxeyed_atsu	0:63ed631d8c3a	527	* Set the base priority register
lynxeyed_atsu	0:63ed631d8c3a	528	*/
lynxeyed_atsu	0:63ed631d8c3a	529	void __set_BASEPRI(uint32_t value)
lynxeyed_atsu	0:63ed631d8c3a	530	{
lynxeyed_atsu	0:63ed631d8c3a	531	__ASM volatile ("MSR basepri, %0" : : "r" (value) );
lynxeyed_atsu	0:63ed631d8c3a	532	}
lynxeyed_atsu	0:63ed631d8c3a	533
lynxeyed_atsu	0:63ed631d8c3a	534	/**
lynxeyed_atsu	0:63ed631d8c3a	535	* @brief Return the Priority Mask value
lynxeyed_atsu	0:63ed631d8c3a	536	*
lynxeyed_atsu	0:63ed631d8c3a	537	* @return PriMask
lynxeyed_atsu	0:63ed631d8c3a	538	*
lynxeyed_atsu	0:63ed631d8c3a	539	* Return state of the priority mask bit from the priority mask register
lynxeyed_atsu	0:63ed631d8c3a	540	*/
lynxeyed_atsu	0:63ed631d8c3a	541	uint32_t __get_PRIMASK(void)
lynxeyed_atsu	0:63ed631d8c3a	542	{
lynxeyed_atsu	0:63ed631d8c3a	543	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	544
lynxeyed_atsu	0:63ed631d8c3a	545	__ASM volatile ("MRS %0, primask" : "=r" (result) );
lynxeyed_atsu	0:63ed631d8c3a	546	return(result);
lynxeyed_atsu	0:63ed631d8c3a	547	}
lynxeyed_atsu	0:63ed631d8c3a	548
lynxeyed_atsu	0:63ed631d8c3a	549	/**
lynxeyed_atsu	0:63ed631d8c3a	550	* @brief Set the Priority Mask value
lynxeyed_atsu	0:63ed631d8c3a	551	*
lynxeyed_atsu	0:63ed631d8c3a	552	* @param priMask PriMask
lynxeyed_atsu	0:63ed631d8c3a	553	*
lynxeyed_atsu	0:63ed631d8c3a	554	* Set the priority mask bit in the priority mask register
lynxeyed_atsu	0:63ed631d8c3a	555	*/
lynxeyed_atsu	0:63ed631d8c3a	556	void __set_PRIMASK(uint32_t priMask)
lynxeyed_atsu	0:63ed631d8c3a	557	{
lynxeyed_atsu	0:63ed631d8c3a	558	__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
lynxeyed_atsu	0:63ed631d8c3a	559	}
lynxeyed_atsu	0:63ed631d8c3a	560
lynxeyed_atsu	0:63ed631d8c3a	561	/**
lynxeyed_atsu	0:63ed631d8c3a	562	* @brief Return the Fault Mask value
lynxeyed_atsu	0:63ed631d8c3a	563	*
lynxeyed_atsu	0:63ed631d8c3a	564	* @return FaultMask
lynxeyed_atsu	0:63ed631d8c3a	565	*
lynxeyed_atsu	0:63ed631d8c3a	566	* Return the content of the fault mask register
lynxeyed_atsu	0:63ed631d8c3a	567	*/
lynxeyed_atsu	0:63ed631d8c3a	568	uint32_t __get_FAULTMASK(void)
lynxeyed_atsu	0:63ed631d8c3a	569	{
lynxeyed_atsu	0:63ed631d8c3a	570	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	571
lynxeyed_atsu	0:63ed631d8c3a	572	__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
lynxeyed_atsu	0:63ed631d8c3a	573	return(result);
lynxeyed_atsu	0:63ed631d8c3a	574	}
lynxeyed_atsu	0:63ed631d8c3a	575
lynxeyed_atsu	0:63ed631d8c3a	576	/**
lynxeyed_atsu	0:63ed631d8c3a	577	* @brief Set the Fault Mask value
lynxeyed_atsu	0:63ed631d8c3a	578	*
lynxeyed_atsu	0:63ed631d8c3a	579	* @param faultMask faultMask value
lynxeyed_atsu	0:63ed631d8c3a	580	*
lynxeyed_atsu	0:63ed631d8c3a	581	* Set the fault mask register
lynxeyed_atsu	0:63ed631d8c3a	582	*/
lynxeyed_atsu	0:63ed631d8c3a	583	void __set_FAULTMASK(uint32_t faultMask)
lynxeyed_atsu	0:63ed631d8c3a	584	{
lynxeyed_atsu	0:63ed631d8c3a	585	__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
lynxeyed_atsu	0:63ed631d8c3a	586	}
lynxeyed_atsu	0:63ed631d8c3a	587
lynxeyed_atsu	0:63ed631d8c3a	588	/**
lynxeyed_atsu	0:63ed631d8c3a	589	* @brief Return the Control Register value
lynxeyed_atsu	0:63ed631d8c3a	590	*
lynxeyed_atsu	0:63ed631d8c3a	591	* @return Control value
lynxeyed_atsu	0:63ed631d8c3a	592	*
lynxeyed_atsu	0:63ed631d8c3a	593	* Return the content of the control register
lynxeyed_atsu	0:63ed631d8c3a	594	*/
lynxeyed_atsu	0:63ed631d8c3a	595	uint32_t __get_CONTROL(void)
lynxeyed_atsu	0:63ed631d8c3a	596	{
lynxeyed_atsu	0:63ed631d8c3a	597	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	598
lynxeyed_atsu	0:63ed631d8c3a	599	__ASM volatile ("MRS %0, control" : "=r" (result) );
lynxeyed_atsu	0:63ed631d8c3a	600	return(result);
lynxeyed_atsu	0:63ed631d8c3a	601	}
lynxeyed_atsu	0:63ed631d8c3a	602
lynxeyed_atsu	0:63ed631d8c3a	603	/**
lynxeyed_atsu	0:63ed631d8c3a	604	* @brief Set the Control Register value
lynxeyed_atsu	0:63ed631d8c3a	605	*
lynxeyed_atsu	0:63ed631d8c3a	606	* @param control Control value
lynxeyed_atsu	0:63ed631d8c3a	607	*
lynxeyed_atsu	0:63ed631d8c3a	608	* Set the control register
lynxeyed_atsu	0:63ed631d8c3a	609	*/
lynxeyed_atsu	0:63ed631d8c3a	610	void __set_CONTROL(uint32_t control)
lynxeyed_atsu	0:63ed631d8c3a	611	{
lynxeyed_atsu	0:63ed631d8c3a	612	__ASM volatile ("MSR control, %0" : : "r" (control) );
lynxeyed_atsu	0:63ed631d8c3a	613	}
lynxeyed_atsu	0:63ed631d8c3a	614
lynxeyed_atsu	0:63ed631d8c3a	615
lynxeyed_atsu	0:63ed631d8c3a	616	/**
lynxeyed_atsu	0:63ed631d8c3a	617	* @brief Reverse byte order in integer value
lynxeyed_atsu	0:63ed631d8c3a	618	*
lynxeyed_atsu	0:63ed631d8c3a	619	* @param value value to reverse
lynxeyed_atsu	0:63ed631d8c3a	620	* @return reversed value
lynxeyed_atsu	0:63ed631d8c3a	621	*
lynxeyed_atsu	0:63ed631d8c3a	622	* Reverse byte order in integer value
lynxeyed_atsu	0:63ed631d8c3a	623	*/
lynxeyed_atsu	0:63ed631d8c3a	624	uint32_t __REV(uint32_t value)
lynxeyed_atsu	0:63ed631d8c3a	625	{
lynxeyed_atsu	0:63ed631d8c3a	626	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	627
lynxeyed_atsu	0:63ed631d8c3a	628	__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
lynxeyed_atsu	0:63ed631d8c3a	629	return(result);
lynxeyed_atsu	0:63ed631d8c3a	630	}
lynxeyed_atsu	0:63ed631d8c3a	631
lynxeyed_atsu	0:63ed631d8c3a	632	/**
lynxeyed_atsu	0:63ed631d8c3a	633	* @brief Reverse byte order in unsigned short value
lynxeyed_atsu	0:63ed631d8c3a	634	*
lynxeyed_atsu	0:63ed631d8c3a	635	* @param value value to reverse
lynxeyed_atsu	0:63ed631d8c3a	636	* @return reversed value
lynxeyed_atsu	0:63ed631d8c3a	637	*
lynxeyed_atsu	0:63ed631d8c3a	638	* Reverse byte order in unsigned short value
lynxeyed_atsu	0:63ed631d8c3a	639	*/
lynxeyed_atsu	0:63ed631d8c3a	640	uint32_t __REV16(uint16_t value)
lynxeyed_atsu	0:63ed631d8c3a	641	{
lynxeyed_atsu	0:63ed631d8c3a	642	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	643
lynxeyed_atsu	0:63ed631d8c3a	644	__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
lynxeyed_atsu	0:63ed631d8c3a	645	return(result);
lynxeyed_atsu	0:63ed631d8c3a	646	}
lynxeyed_atsu	0:63ed631d8c3a	647
lynxeyed_atsu	0:63ed631d8c3a	648	/**
lynxeyed_atsu	0:63ed631d8c3a	649	* @brief Reverse byte order in signed short value with sign extension to integer
lynxeyed_atsu	0:63ed631d8c3a	650	*
lynxeyed_atsu	0:63ed631d8c3a	651	* @param value value to reverse
lynxeyed_atsu	0:63ed631d8c3a	652	* @return reversed value
lynxeyed_atsu	0:63ed631d8c3a	653	*
lynxeyed_atsu	0:63ed631d8c3a	654	* Reverse byte order in signed short value with sign extension to integer
lynxeyed_atsu	0:63ed631d8c3a	655	*/
lynxeyed_atsu	0:63ed631d8c3a	656	int32_t __REVSH(int16_t value)
lynxeyed_atsu	0:63ed631d8c3a	657	{
lynxeyed_atsu	0:63ed631d8c3a	658	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	659
lynxeyed_atsu	0:63ed631d8c3a	660	__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
lynxeyed_atsu	0:63ed631d8c3a	661	return(result);
lynxeyed_atsu	0:63ed631d8c3a	662	}
lynxeyed_atsu	0:63ed631d8c3a	663
lynxeyed_atsu	0:63ed631d8c3a	664	/**
lynxeyed_atsu	0:63ed631d8c3a	665	* @brief Reverse bit order of value
lynxeyed_atsu	0:63ed631d8c3a	666	*
lynxeyed_atsu	0:63ed631d8c3a	667	* @param value value to reverse
lynxeyed_atsu	0:63ed631d8c3a	668	* @return reversed value
lynxeyed_atsu	0:63ed631d8c3a	669	*
lynxeyed_atsu	0:63ed631d8c3a	670	* Reverse bit order of value
lynxeyed_atsu	0:63ed631d8c3a	671	*/
lynxeyed_atsu	0:63ed631d8c3a	672	uint32_t __RBIT(uint32_t value)
lynxeyed_atsu	0:63ed631d8c3a	673	{
lynxeyed_atsu	0:63ed631d8c3a	674	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	675
lynxeyed_atsu	0:63ed631d8c3a	676	__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
lynxeyed_atsu	0:63ed631d8c3a	677	return(result);
lynxeyed_atsu	0:63ed631d8c3a	678	}
lynxeyed_atsu	0:63ed631d8c3a	679
lynxeyed_atsu	0:63ed631d8c3a	680	/**
lynxeyed_atsu	0:63ed631d8c3a	681	* @brief LDR Exclusive (8 bit)
lynxeyed_atsu	0:63ed631d8c3a	682	*
lynxeyed_atsu	0:63ed631d8c3a	683	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	684	* @return value of (*address)
lynxeyed_atsu	0:63ed631d8c3a	685	*
lynxeyed_atsu	0:63ed631d8c3a	686	* Exclusive LDR command for 8 bit value
lynxeyed_atsu	0:63ed631d8c3a	687	*/
lynxeyed_atsu	0:63ed631d8c3a	688	uint8_t __LDREXB(uint8_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	689	{
lynxeyed_atsu	0:63ed631d8c3a	690	uint8_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	691
lynxeyed_atsu	0:63ed631d8c3a	692	__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
lynxeyed_atsu	0:63ed631d8c3a	693	return(result);
lynxeyed_atsu	0:63ed631d8c3a	694	}
lynxeyed_atsu	0:63ed631d8c3a	695
lynxeyed_atsu	0:63ed631d8c3a	696	/**
lynxeyed_atsu	0:63ed631d8c3a	697	* @brief LDR Exclusive (16 bit)
lynxeyed_atsu	0:63ed631d8c3a	698	*
lynxeyed_atsu	0:63ed631d8c3a	699	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	700	* @return value of (*address)
lynxeyed_atsu	0:63ed631d8c3a	701	*
lynxeyed_atsu	0:63ed631d8c3a	702	* Exclusive LDR command for 16 bit values
lynxeyed_atsu	0:63ed631d8c3a	703	*/
lynxeyed_atsu	0:63ed631d8c3a	704	uint16_t __LDREXH(uint16_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	705	{
lynxeyed_atsu	0:63ed631d8c3a	706	uint16_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	707
lynxeyed_atsu	0:63ed631d8c3a	708	__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
lynxeyed_atsu	0:63ed631d8c3a	709	return(result);
lynxeyed_atsu	0:63ed631d8c3a	710	}
lynxeyed_atsu	0:63ed631d8c3a	711
lynxeyed_atsu	0:63ed631d8c3a	712	/**
lynxeyed_atsu	0:63ed631d8c3a	713	* @brief LDR Exclusive (32 bit)
lynxeyed_atsu	0:63ed631d8c3a	714	*
lynxeyed_atsu	0:63ed631d8c3a	715	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	716	* @return value of (*address)
lynxeyed_atsu	0:63ed631d8c3a	717	*
lynxeyed_atsu	0:63ed631d8c3a	718	* Exclusive LDR command for 32 bit values
lynxeyed_atsu	0:63ed631d8c3a	719	*/
lynxeyed_atsu	0:63ed631d8c3a	720	uint32_t __LDREXW(uint32_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	721	{
lynxeyed_atsu	0:63ed631d8c3a	722	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	723
lynxeyed_atsu	0:63ed631d8c3a	724	__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
lynxeyed_atsu	0:63ed631d8c3a	725	return(result);
lynxeyed_atsu	0:63ed631d8c3a	726	}
lynxeyed_atsu	0:63ed631d8c3a	727
lynxeyed_atsu	0:63ed631d8c3a	728	/**
lynxeyed_atsu	0:63ed631d8c3a	729	* @brief STR Exclusive (8 bit)
lynxeyed_atsu	0:63ed631d8c3a	730	*
lynxeyed_atsu	0:63ed631d8c3a	731	* @param value value to store
lynxeyed_atsu	0:63ed631d8c3a	732	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	733	* @return successful / failed
lynxeyed_atsu	0:63ed631d8c3a	734	*
lynxeyed_atsu	0:63ed631d8c3a	735	* Exclusive STR command for 8 bit values
lynxeyed_atsu	0:63ed631d8c3a	736	*/
lynxeyed_atsu	0:63ed631d8c3a	737	uint32_t __STREXB(uint8_t value, uint8_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	738	{
lynxeyed_atsu	0:63ed631d8c3a	739	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	740
lynxeyed_atsu	0:63ed631d8c3a	741	__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
lynxeyed_atsu	0:63ed631d8c3a	742	return(result);
lynxeyed_atsu	0:63ed631d8c3a	743	}
lynxeyed_atsu	0:63ed631d8c3a	744
lynxeyed_atsu	0:63ed631d8c3a	745	/**
lynxeyed_atsu	0:63ed631d8c3a	746	* @brief STR Exclusive (16 bit)
lynxeyed_atsu	0:63ed631d8c3a	747	*
lynxeyed_atsu	0:63ed631d8c3a	748	* @param value value to store
lynxeyed_atsu	0:63ed631d8c3a	749	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	750	* @return successful / failed
lynxeyed_atsu	0:63ed631d8c3a	751	*
lynxeyed_atsu	0:63ed631d8c3a	752	* Exclusive STR command for 16 bit values
lynxeyed_atsu	0:63ed631d8c3a	753	*/
lynxeyed_atsu	0:63ed631d8c3a	754	uint32_t __STREXH(uint16_t value, uint16_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	755	{
lynxeyed_atsu	0:63ed631d8c3a	756	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	757
lynxeyed_atsu	0:63ed631d8c3a	758	__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
lynxeyed_atsu	0:63ed631d8c3a	759	return(result);
lynxeyed_atsu	0:63ed631d8c3a	760	}
lynxeyed_atsu	0:63ed631d8c3a	761
lynxeyed_atsu	0:63ed631d8c3a	762	/**
lynxeyed_atsu	0:63ed631d8c3a	763	* @brief STR Exclusive (32 bit)
lynxeyed_atsu	0:63ed631d8c3a	764	*
lynxeyed_atsu	0:63ed631d8c3a	765	* @param value value to store
lynxeyed_atsu	0:63ed631d8c3a	766	* @param *addr address pointer
lynxeyed_atsu	0:63ed631d8c3a	767	* @return successful / failed
lynxeyed_atsu	0:63ed631d8c3a	768	*
lynxeyed_atsu	0:63ed631d8c3a	769	* Exclusive STR command for 32 bit values
lynxeyed_atsu	0:63ed631d8c3a	770	*/
lynxeyed_atsu	0:63ed631d8c3a	771	uint32_t __STREXW(uint32_t value, uint32_t *addr)
lynxeyed_atsu	0:63ed631d8c3a	772	{
lynxeyed_atsu	0:63ed631d8c3a	773	uint32_t result=0;
lynxeyed_atsu	0:63ed631d8c3a	774
lynxeyed_atsu	0:63ed631d8c3a	775	__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
lynxeyed_atsu	0:63ed631d8c3a	776	return(result);
lynxeyed_atsu	0:63ed631d8c3a	777	}
lynxeyed_atsu	0:63ed631d8c3a	778
lynxeyed_atsu	0:63ed631d8c3a	779
lynxeyed_atsu	0:63ed631d8c3a	780	#elif (defined (__TASKING__)) /------------------ TASKING Compiler ---------------------/
lynxeyed_atsu	0:63ed631d8c3a	781	/* TASKING carm specific functions */
lynxeyed_atsu	0:63ed631d8c3a	782
lynxeyed_atsu	0:63ed631d8c3a	783	/*
lynxeyed_atsu	0:63ed631d8c3a	784	* The CMSIS functions have been implemented as intrinsics in the compiler.
lynxeyed_atsu	0:63ed631d8c3a	785	* Please use "carm -?i" to get an up to date list of all instrinsics,
lynxeyed_atsu	0:63ed631d8c3a	786	* Including the CMSIS ones.
lynxeyed_atsu	0:63ed631d8c3a	787	*/
lynxeyed_atsu	0:63ed631d8c3a	788
lynxeyed_atsu	0:63ed631d8c3a	789	#endif
lynxeyed_atsu	0:63ed631d8c3a	790
lynxeyed_atsu	0:63ed631d8c3a	791	/**
lynxeyed_atsu	0:63ed631d8c3a	792	* @}
lynxeyed_atsu	0:63ed631d8c3a	793	*/
lynxeyed_atsu	0:63ed631d8c3a	794

Repository toolbox

Export to desktop IDE

Build repository

Repository details

Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	21 Jan 2011
Imports:	2
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	2

I2S_Example/core_cm3.c@0:63ed631d8c3a, 2011-01-21 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning