![](/media/cache/profiles/98c39996bf1543e974747a2549b3107c.50x50_q85.png)
LINKED LIST TEST on mbed
I2S_Example/system_LPC17xx.h
- Committer:
- lynxeyed_atsu
- Date:
- 2011-02-26
- Revision:
- 0:e8bfffbb3ab6
File content as of revision 0:e8bfffbb3ab6:
/**************************************************************************//** * @file system_LPC17xx.h * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File * for the NXP LPC17xx Device Series * @version V1.02 * @date 08. September 2009 * * @note * Copyright (C) 2009 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #ifndef __SYSTEM_LPC17xx_H #define __SYSTEM_LPC17xx_H #ifdef __cplusplus extern "C" { #endif #include <stdint.h> /** @addtogroup LPC17xx_System * @{ */ extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System and update the SystemCoreClock variable. */ extern void SystemInit (void); /** * Update SystemCoreClock variable * * @param none * @return none * * @brief Updates the SystemCoreClock with current core Clock * retrieved from cpu registers. */ extern void SystemCoreClockUpdate (void); #ifdef __cplusplus } #endif /** * @} */ #endif /* __SYSTEM_LPC17xx_H */