xeye_ atsu
LINKED LIST TEST on mbed
I2S_Example/core_cm3.c@0:e8bfffbb3ab6, 2011-02-26 (annotated)
- Committer:
- lynxeyed_atsu
- Date:
- Sat Feb 26 03:55:12 2011 +0000
- Revision:
- 0:e8bfffbb3ab6
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 1 | /**************************************************************************//** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 2 | * @file core_cm3.c |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 3 | * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 4 | * @version V1.30 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 5 | * @date 30. October 2009 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 6 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 7 | * @note |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 8 | * Copyright (C) 2009 ARM Limited. All rights reserved. |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 9 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 10 | * @par |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 11 | * ARM Limited (ARM) is supplying this software for use with Cortex-M |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 12 | * processor based microcontrollers. This file can be freely distributed |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 13 | * within development tools that are supporting such ARM based processors. |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 14 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 15 | * @par |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 16 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 17 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 18 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 19 | * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 20 | * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 21 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 22 | ******************************************************************************/ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 23 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 24 | #include <stdint.h> |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 25 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 26 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 27 | /** @addtogroup CMSIS |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 28 | * @{ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 29 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 30 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 31 | /* define compiler specific symbols */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 32 | #if defined ( __CC_ARM ) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 33 | #define __ASM __asm /*!< asm keyword for ARM Compiler */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 34 | #define __INLINE __inline /*!< inline keyword for ARM Compiler */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 35 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 36 | #elif defined ( __ICCARM__ ) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 37 | #define __ASM __asm /*!< asm keyword for IAR Compiler */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 38 | #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 39 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 40 | #elif defined ( __GNUC__ ) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 41 | #define __ASM __asm /*!< asm keyword for GNU Compiler */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 42 | #define __INLINE inline /*!< inline keyword for GNU Compiler */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 43 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 44 | #elif defined ( __TASKING__ ) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 45 | #define __ASM __asm /*!< asm keyword for TASKING Compiler */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 46 | #define __INLINE inline /*!< inline keyword for TASKING Compiler */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 47 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 48 | #endif |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 49 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 50 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 51 | /* ################### Compiler specific Intrinsics ########################### */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 52 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 53 | #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 54 | /* ARM armcc specific functions */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 55 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 56 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 57 | * @brief Return the Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 58 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 59 | * @return ProcessStackPointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 60 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 61 | * Return the actual process stack pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 62 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 63 | __ASM uint32_t __get_PSP(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 64 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 65 | mrs r0, psp |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 66 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 67 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 68 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 69 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 70 | * @brief Set the Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 71 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 72 | * @param topOfProcStack Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 73 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 74 | * Assign the value ProcessStackPointer to the MSP |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 75 | * (process stack pointer) Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 76 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 77 | __ASM void __set_PSP(uint32_t topOfProcStack) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 78 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 79 | msr psp, r0 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 80 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 81 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 82 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 83 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 84 | * @brief Return the Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 85 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 86 | * @return Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 87 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 88 | * Return the current value of the MSP (main stack pointer) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 89 | * Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 90 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 91 | __ASM uint32_t __get_MSP(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 92 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 93 | mrs r0, msp |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 94 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 95 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 96 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 97 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 98 | * @brief Set the Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 99 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 100 | * @param topOfMainStack Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 101 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 102 | * Assign the value mainStackPointer to the MSP |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 103 | * (main stack pointer) Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 104 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 105 | __ASM void __set_MSP(uint32_t mainStackPointer) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 106 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 107 | msr msp, r0 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 108 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 109 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 110 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 111 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 112 | * @brief Reverse byte order in unsigned short value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 113 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 114 | * @param value value to reverse |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 115 | * @return reversed value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 116 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 117 | * Reverse byte order in unsigned short value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 118 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 119 | __ASM uint32_t __REV16(uint16_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 120 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 121 | rev16 r0, r0 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 122 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 123 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 124 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 125 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 126 | * @brief Reverse byte order in signed short value with sign extension to integer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 127 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 128 | * @param value value to reverse |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 129 | * @return reversed value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 130 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 131 | * Reverse byte order in signed short value with sign extension to integer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 132 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 133 | __ASM int32_t __REVSH(int16_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 134 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 135 | revsh r0, r0 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 136 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 137 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 138 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 139 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 140 | #if (__ARMCC_VERSION < 400000) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 141 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 142 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 143 | * @brief Remove the exclusive lock created by ldrex |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 144 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 145 | * Removes the exclusive lock which is created by ldrex. |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 146 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 147 | __ASM void __CLREX(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 148 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 149 | clrex |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 150 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 151 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 152 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 153 | * @brief Return the Base Priority value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 154 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 155 | * @return BasePriority |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 156 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 157 | * Return the content of the base priority register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 158 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 159 | __ASM uint32_t __get_BASEPRI(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 160 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 161 | mrs r0, basepri |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 162 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 163 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 164 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 165 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 166 | * @brief Set the Base Priority value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 167 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 168 | * @param basePri BasePriority |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 169 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 170 | * Set the base priority register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 171 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 172 | __ASM void __set_BASEPRI(uint32_t basePri) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 173 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 174 | msr basepri, r0 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 175 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 176 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 177 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 178 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 179 | * @brief Return the Priority Mask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 180 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 181 | * @return PriMask |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 182 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 183 | * Return state of the priority mask bit from the priority mask register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 184 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 185 | __ASM uint32_t __get_PRIMASK(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 186 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 187 | mrs r0, primask |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 188 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 189 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 190 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 191 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 192 | * @brief Set the Priority Mask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 193 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 194 | * @param priMask PriMask |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 195 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 196 | * Set the priority mask bit in the priority mask register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 197 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 198 | __ASM void __set_PRIMASK(uint32_t priMask) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 199 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 200 | msr primask, r0 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 201 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 202 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 203 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 204 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 205 | * @brief Return the Fault Mask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 206 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 207 | * @return FaultMask |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 208 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 209 | * Return the content of the fault mask register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 210 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 211 | __ASM uint32_t __get_FAULTMASK(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 212 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 213 | mrs r0, faultmask |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 214 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 215 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 216 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 217 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 218 | * @brief Set the Fault Mask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 219 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 220 | * @param faultMask faultMask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 221 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 222 | * Set the fault mask register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 223 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 224 | __ASM void __set_FAULTMASK(uint32_t faultMask) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 225 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 226 | msr faultmask, r0 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 227 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 228 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 229 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 230 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 231 | * @brief Return the Control Register value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 232 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 233 | * @return Control value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 234 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 235 | * Return the content of the control register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 236 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 237 | __ASM uint32_t __get_CONTROL(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 238 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 239 | mrs r0, control |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 240 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 241 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 242 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 243 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 244 | * @brief Set the Control Register value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 245 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 246 | * @param control Control value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 247 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 248 | * Set the control register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 249 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 250 | __ASM void __set_CONTROL(uint32_t control) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 251 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 252 | msr control, r0 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 253 | bx lr |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 254 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 255 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 256 | #endif /* __ARMCC_VERSION */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 257 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 258 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 259 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 260 | #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 261 | /* IAR iccarm specific functions */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 262 | #pragma diag_suppress=Pe940 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 263 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 264 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 265 | * @brief Return the Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 266 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 267 | * @return ProcessStackPointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 268 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 269 | * Return the actual process stack pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 270 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 271 | uint32_t __get_PSP(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 272 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 273 | __ASM("mrs r0, psp"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 274 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 275 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 276 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 277 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 278 | * @brief Set the Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 279 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 280 | * @param topOfProcStack Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 281 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 282 | * Assign the value ProcessStackPointer to the MSP |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 283 | * (process stack pointer) Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 284 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 285 | void __set_PSP(uint32_t topOfProcStack) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 286 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 287 | __ASM("msr psp, r0"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 288 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 289 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 290 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 291 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 292 | * @brief Return the Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 293 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 294 | * @return Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 295 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 296 | * Return the current value of the MSP (main stack pointer) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 297 | * Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 298 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 299 | uint32_t __get_MSP(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 300 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 301 | __ASM("mrs r0, msp"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 302 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 303 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 304 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 305 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 306 | * @brief Set the Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 307 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 308 | * @param topOfMainStack Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 309 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 310 | * Assign the value mainStackPointer to the MSP |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 311 | * (main stack pointer) Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 312 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 313 | void __set_MSP(uint32_t topOfMainStack) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 314 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 315 | __ASM("msr msp, r0"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 316 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 317 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 318 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 319 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 320 | * @brief Reverse byte order in unsigned short value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 321 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 322 | * @param value value to reverse |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 323 | * @return reversed value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 324 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 325 | * Reverse byte order in unsigned short value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 326 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 327 | uint32_t __REV16(uint16_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 328 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 329 | __ASM("rev16 r0, r0"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 330 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 331 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 332 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 333 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 334 | * @brief Reverse bit order of value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 335 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 336 | * @param value value to reverse |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 337 | * @return reversed value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 338 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 339 | * Reverse bit order of value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 340 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 341 | uint32_t __RBIT(uint32_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 342 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 343 | __ASM("rbit r0, r0"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 344 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 345 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 346 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 347 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 348 | * @brief LDR Exclusive (8 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 349 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 350 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 351 | * @return value of (*address) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 352 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 353 | * Exclusive LDR command for 8 bit values) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 354 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 355 | uint8_t __LDREXB(uint8_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 356 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 357 | __ASM("ldrexb r0, [r0]"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 358 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 359 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 360 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 361 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 362 | * @brief LDR Exclusive (16 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 363 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 364 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 365 | * @return value of (*address) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 366 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 367 | * Exclusive LDR command for 16 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 368 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 369 | uint16_t __LDREXH(uint16_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 370 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 371 | __ASM("ldrexh r0, [r0]"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 372 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 373 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 374 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 375 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 376 | * @brief LDR Exclusive (32 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 377 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 378 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 379 | * @return value of (*address) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 380 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 381 | * Exclusive LDR command for 32 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 382 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 383 | uint32_t __LDREXW(uint32_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 384 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 385 | __ASM("ldrex r0, [r0]"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 386 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 387 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 388 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 389 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 390 | * @brief STR Exclusive (8 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 391 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 392 | * @param value value to store |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 393 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 394 | * @return successful / failed |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 395 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 396 | * Exclusive STR command for 8 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 397 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 398 | uint32_t __STREXB(uint8_t value, uint8_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 399 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 400 | __ASM("strexb r0, r0, [r1]"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 401 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 402 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 403 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 404 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 405 | * @brief STR Exclusive (16 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 406 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 407 | * @param value value to store |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 408 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 409 | * @return successful / failed |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 410 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 411 | * Exclusive STR command for 16 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 412 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 413 | uint32_t __STREXH(uint16_t value, uint16_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 414 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 415 | __ASM("strexh r0, r0, [r1]"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 416 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 417 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 418 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 419 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 420 | * @brief STR Exclusive (32 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 421 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 422 | * @param value value to store |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 423 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 424 | * @return successful / failed |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 425 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 426 | * Exclusive STR command for 32 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 427 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 428 | uint32_t __STREXW(uint32_t value, uint32_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 429 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 430 | __ASM("strex r0, r0, [r1]"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 431 | __ASM("bx lr"); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 432 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 433 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 434 | #pragma diag_default=Pe940 |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 435 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 436 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 437 | #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 438 | /* GNU gcc specific functions */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 439 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 440 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 441 | * @brief Return the Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 442 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 443 | * @return ProcessStackPointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 444 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 445 | * Return the actual process stack pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 446 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 447 | uint32_t __get_PSP(void) __attribute__( ( naked ) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 448 | uint32_t __get_PSP(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 449 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 450 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 451 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 452 | __ASM volatile ("MRS %0, psp\n\t" |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 453 | "MOV r0, %0 \n\t" |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 454 | "BX lr \n\t" : "=r" (result) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 455 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 456 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 457 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 458 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 459 | * @brief Set the Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 460 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 461 | * @param topOfProcStack Process Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 462 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 463 | * Assign the value ProcessStackPointer to the MSP |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 464 | * (process stack pointer) Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 465 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 466 | void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 467 | void __set_PSP(uint32_t topOfProcStack) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 468 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 469 | __ASM volatile ("MSR psp, %0\n\t" |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 470 | "BX lr \n\t" : : "r" (topOfProcStack) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 471 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 472 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 473 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 474 | * @brief Return the Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 475 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 476 | * @return Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 477 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 478 | * Return the current value of the MSP (main stack pointer) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 479 | * Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 480 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 481 | uint32_t __get_MSP(void) __attribute__( ( naked ) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 482 | uint32_t __get_MSP(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 483 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 484 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 485 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 486 | __ASM volatile ("MRS %0, msp\n\t" |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 487 | "MOV r0, %0 \n\t" |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 488 | "BX lr \n\t" : "=r" (result) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 489 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 490 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 491 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 492 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 493 | * @brief Set the Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 494 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 495 | * @param topOfMainStack Main Stack Pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 496 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 497 | * Assign the value mainStackPointer to the MSP |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 498 | * (main stack pointer) Cortex processor register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 499 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 500 | void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 501 | void __set_MSP(uint32_t topOfMainStack) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 502 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 503 | __ASM volatile ("MSR msp, %0\n\t" |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 504 | "BX lr \n\t" : : "r" (topOfMainStack) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 505 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 506 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 507 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 508 | * @brief Return the Base Priority value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 509 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 510 | * @return BasePriority |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 511 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 512 | * Return the content of the base priority register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 513 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 514 | uint32_t __get_BASEPRI(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 515 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 516 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 517 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 518 | __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 519 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 520 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 521 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 522 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 523 | * @brief Set the Base Priority value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 524 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 525 | * @param basePri BasePriority |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 526 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 527 | * Set the base priority register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 528 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 529 | void __set_BASEPRI(uint32_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 530 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 531 | __ASM volatile ("MSR basepri, %0" : : "r" (value) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 532 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 533 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 534 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 535 | * @brief Return the Priority Mask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 536 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 537 | * @return PriMask |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 538 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 539 | * Return state of the priority mask bit from the priority mask register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 540 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 541 | uint32_t __get_PRIMASK(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 542 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 543 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 544 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 545 | __ASM volatile ("MRS %0, primask" : "=r" (result) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 546 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 547 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 548 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 549 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 550 | * @brief Set the Priority Mask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 551 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 552 | * @param priMask PriMask |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 553 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 554 | * Set the priority mask bit in the priority mask register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 555 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 556 | void __set_PRIMASK(uint32_t priMask) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 557 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 558 | __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 559 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 560 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 561 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 562 | * @brief Return the Fault Mask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 563 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 564 | * @return FaultMask |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 565 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 566 | * Return the content of the fault mask register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 567 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 568 | uint32_t __get_FAULTMASK(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 569 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 570 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 571 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 572 | __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 573 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 574 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 575 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 576 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 577 | * @brief Set the Fault Mask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 578 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 579 | * @param faultMask faultMask value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 580 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 581 | * Set the fault mask register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 582 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 583 | void __set_FAULTMASK(uint32_t faultMask) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 584 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 585 | __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 586 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 587 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 588 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 589 | * @brief Return the Control Register value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 590 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 591 | * @return Control value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 592 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 593 | * Return the content of the control register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 594 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 595 | uint32_t __get_CONTROL(void) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 596 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 597 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 598 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 599 | __ASM volatile ("MRS %0, control" : "=r" (result) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 600 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 601 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 602 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 603 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 604 | * @brief Set the Control Register value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 605 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 606 | * @param control Control value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 607 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 608 | * Set the control register |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 609 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 610 | void __set_CONTROL(uint32_t control) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 611 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 612 | __ASM volatile ("MSR control, %0" : : "r" (control) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 613 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 614 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 615 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 616 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 617 | * @brief Reverse byte order in integer value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 618 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 619 | * @param value value to reverse |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 620 | * @return reversed value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 621 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 622 | * Reverse byte order in integer value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 623 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 624 | uint32_t __REV(uint32_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 625 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 626 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 627 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 628 | __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 629 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 630 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 631 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 632 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 633 | * @brief Reverse byte order in unsigned short value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 634 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 635 | * @param value value to reverse |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 636 | * @return reversed value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 637 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 638 | * Reverse byte order in unsigned short value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 639 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 640 | uint32_t __REV16(uint16_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 641 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 642 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 643 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 644 | __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 645 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 646 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 647 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 648 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 649 | * @brief Reverse byte order in signed short value with sign extension to integer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 650 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 651 | * @param value value to reverse |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 652 | * @return reversed value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 653 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 654 | * Reverse byte order in signed short value with sign extension to integer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 655 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 656 | int32_t __REVSH(int16_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 657 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 658 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 659 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 660 | __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 661 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 662 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 663 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 664 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 665 | * @brief Reverse bit order of value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 666 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 667 | * @param value value to reverse |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 668 | * @return reversed value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 669 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 670 | * Reverse bit order of value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 671 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 672 | uint32_t __RBIT(uint32_t value) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 673 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 674 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 675 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 676 | __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 677 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 678 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 679 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 680 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 681 | * @brief LDR Exclusive (8 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 682 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 683 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 684 | * @return value of (*address) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 685 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 686 | * Exclusive LDR command for 8 bit value |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 687 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 688 | uint8_t __LDREXB(uint8_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 689 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 690 | uint8_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 691 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 692 | __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 693 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 694 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 695 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 696 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 697 | * @brief LDR Exclusive (16 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 698 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 699 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 700 | * @return value of (*address) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 701 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 702 | * Exclusive LDR command for 16 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 703 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 704 | uint16_t __LDREXH(uint16_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 705 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 706 | uint16_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 707 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 708 | __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 709 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 710 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 711 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 712 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 713 | * @brief LDR Exclusive (32 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 714 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 715 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 716 | * @return value of (*address) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 717 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 718 | * Exclusive LDR command for 32 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 719 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 720 | uint32_t __LDREXW(uint32_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 721 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 722 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 723 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 724 | __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 725 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 726 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 727 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 728 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 729 | * @brief STR Exclusive (8 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 730 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 731 | * @param value value to store |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 732 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 733 | * @return successful / failed |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 734 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 735 | * Exclusive STR command for 8 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 736 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 737 | uint32_t __STREXB(uint8_t value, uint8_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 738 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 739 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 740 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 741 | __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 742 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 743 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 744 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 745 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 746 | * @brief STR Exclusive (16 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 747 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 748 | * @param value value to store |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 749 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 750 | * @return successful / failed |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 751 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 752 | * Exclusive STR command for 16 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 753 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 754 | uint32_t __STREXH(uint16_t value, uint16_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 755 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 756 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 757 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 758 | __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 759 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 760 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 761 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 762 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 763 | * @brief STR Exclusive (32 bit) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 764 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 765 | * @param value value to store |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 766 | * @param *addr address pointer |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 767 | * @return successful / failed |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 768 | * |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 769 | * Exclusive STR command for 32 bit values |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 770 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 771 | uint32_t __STREXW(uint32_t value, uint32_t *addr) |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 772 | { |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 773 | uint32_t result=0; |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 774 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 775 | __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 776 | return(result); |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 777 | } |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 778 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 779 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 780 | #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 781 | /* TASKING carm specific functions */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 782 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 783 | /* |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 784 | * The CMSIS functions have been implemented as intrinsics in the compiler. |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 785 | * Please use "carm -?i" to get an up to date list of all instrinsics, |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 786 | * Including the CMSIS ones. |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 787 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 788 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 789 | #endif |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 790 | |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 791 | /** |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 792 | * @} |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 793 | */ |
| lynxeyed_atsu | 0:e8bfffbb3ab6 | 794 |