Logan Rooper / Mbed 2 deprecated ltc2991_test

I2C not yet integrated

Dependencies:   mbed

Tested working with single and differential voltages.

Connect SCL (pin 11) to D15 Connect SDA (pin 10) to D14 Connect pin 16 to +5v Connect pin 9 to gnd

LT_I2C.cpp@0:1473318f27b6, 2016-11-16 (annotated)

Committer:
lrdawg99
Date:
Wed Nov 16 15:54:08 2016 +0000
Revision:
0:1473318f27b6
Child:
1:4e4194db7cd6
Ready to integrate I2C into LT_I2C

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lrdawg99 0:1473318f27b6 1
lrdawg99 0:1473318f27b6 2 /*!
lrdawg99 0:1473318f27b6 3 LT_I2C: Routines to communicate with ATmega328P's hardware I2C port.
lrdawg99 0:1473318f27b6 4
lrdawg99 0:1473318f27b6 5 @verbatim
lrdawg99 0:1473318f27b6 6
lrdawg99 0:1473318f27b6 7 LT_I2C contains the low level routines to communicate with devices using the
lrdawg99 0:1473318f27b6 8 ATMega328's onboard hardware I2C port. Each routine checks the Two Wire Status
lrdawg99 0:1473318f27b6 9 Register (TWSR) at the end of the transaction and returns 0 if successful and 1
lrdawg99 0:1473318f27b6 10 if not successful.
lrdawg99 0:1473318f27b6 11
lrdawg99 0:1473318f27b6 12 I2C Frequency = (CPU Clock frequency)/(16+2(TWBR)*Prescaler)
lrdawg99 0:1473318f27b6 13
lrdawg99 0:1473318f27b6 14 TWBR-Two Wire Bit Rate Register
lrdawg99 0:1473318f27b6 15 TWCR=Two Wire Control Register (TWINT TWEA TWSTA TWSTO TWWC TWEN - TWIE)
lrdawg99 0:1473318f27b6 16 TWSR=Two Wire Status Register
lrdawg99 0:1473318f27b6 17
lrdawg99 0:1473318f27b6 18 Prescaler Values:
lrdawg99 0:1473318f27b6 19 TWSR1 TWSR0 Prescaler
lrdawg99 0:1473318f27b6 20 0 0 1
lrdawg99 0:1473318f27b6 21 0 1 4
lrdawg99 0:1473318f27b6 22 1 0 16
lrdawg99 0:1473318f27b6 23 1 1 64
lrdawg99 0:1473318f27b6 24
lrdawg99 0:1473318f27b6 25 Examples:
lrdawg99 0:1473318f27b6 26 CPU Frequency = 16Mhz on Arduino Uno
lrdawg99 0:1473318f27b6 27 I2C Frequency Prescaler TWSR1 TWSR0 TWBR
lrdawg99 0:1473318f27b6 28 1khz 64 1 1 125
lrdawg99 0:1473318f27b6 29 10khz 64 1 1 12
lrdawg99 0:1473318f27b6 30 50khz 16 1 0 10
lrdawg99 0:1473318f27b6 31 100khz 4 0 1 18
lrdawg99 0:1473318f27b6 32 400khz 1 0 0 12
lrdawg99 0:1473318f27b6 33
lrdawg99 0:1473318f27b6 34 @endverbatim
lrdawg99 0:1473318f27b6 35
lrdawg99 0:1473318f27b6 36 REVISION HISTORY
lrdawg99 0:1473318f27b6 37 $Revision: 5469 $
lrdawg99 0:1473318f27b6 38 $Date: 2016-07-22 17:01:32 -0700 (Fri, 22 Jul 2016) $
lrdawg99 0:1473318f27b6 39
lrdawg99 0:1473318f27b6 40 Copyright (c) 2013, Linear Technology Corp.(LTC)
lrdawg99 0:1473318f27b6 41 All rights reserved.
lrdawg99 0:1473318f27b6 42
lrdawg99 0:1473318f27b6 43 Redistribution and use in source and binary forms, with or without
lrdawg99 0:1473318f27b6 44 modification, are permitted provided that the following conditions are met:
lrdawg99 0:1473318f27b6 45
lrdawg99 0:1473318f27b6 46 1. Redistributions of source code must retain the above copyright notice, this
lrdawg99 0:1473318f27b6 47 list of conditions and the following disclaimer.
lrdawg99 0:1473318f27b6 48 2. Redistributions in binary form must reproduce the above copyright notice,
lrdawg99 0:1473318f27b6 49 this list of conditions and the following disclaimer in the documentation
lrdawg99 0:1473318f27b6 50 and/or other materials provided with the distribution.
lrdawg99 0:1473318f27b6 51
lrdawg99 0:1473318f27b6 52 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
lrdawg99 0:1473318f27b6 53 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
lrdawg99 0:1473318f27b6 54 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lrdawg99 0:1473318f27b6 55 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
lrdawg99 0:1473318f27b6 56 ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
lrdawg99 0:1473318f27b6 57 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
lrdawg99 0:1473318f27b6 58 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
lrdawg99 0:1473318f27b6 59 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
lrdawg99 0:1473318f27b6 60 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
lrdawg99 0:1473318f27b6 61 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lrdawg99 0:1473318f27b6 62
lrdawg99 0:1473318f27b6 63 The views and conclusions contained in the software and documentation are those
lrdawg99 0:1473318f27b6 64 of the authors and should not be interpreted as representing official policies,
lrdawg99 0:1473318f27b6 65 either expressed or implied, of Linear Technology Corp.
lrdawg99 0:1473318f27b6 66
lrdawg99 0:1473318f27b6 67 The Linear Technology Linduino is not affiliated with the official Arduino team.
lrdawg99 0:1473318f27b6 68 However, the Linduino is only possible because of the Arduino team's commitment
lrdawg99 0:1473318f27b6 69 to the open-source community. Please, visit http://www.arduino.cc and
lrdawg99 0:1473318f27b6 70 http://store.arduino.cc , and consider a purchase that will help fund their
lrdawg99 0:1473318f27b6 71 ongoing work.
lrdawg99 0:1473318f27b6 72 */
lrdawg99 0:1473318f27b6 73
lrdawg99 0:1473318f27b6 74 //! @defgroup LT_I2C LT_I2C: Routines to Communicate With ATmega328P's hardware I2C port.
lrdawg99 0:1473318f27b6 75
lrdawg99 0:1473318f27b6 76 /*! @file
lrdawg99 0:1473318f27b6 77 @ingroup LT_I2C
lrdawg99 0:1473318f27b6 78 Library for LT_I2C: Routines to Communicate With ATmega328P's hardware I2C port.
lrdawg99 0:1473318f27b6 79 */
lrdawg99 0:1473318f27b6 80
lrdawg99 0:1473318f27b6 81 //#include <Arduino.h>
lrdawg99 0:1473318f27b6 82 #include <stdint.h>
lrdawg99 0:1473318f27b6 83 //#include <util/delay.h>
lrdawg99 0:1473318f27b6 84 #include "Linduino.h"
lrdawg99 0:1473318f27b6 85 #include "LT_I2C.h"
lrdawg99 0:1473318f27b6 86
lrdawg99 0:1473318f27b6 87 //! CPU master clock frequency
lrdawg99 0:1473318f27b6 88 #ifndef F_CPU
lrdawg99 0:1473318f27b6 89 #define F_CPU 16000000UL
lrdawg99 0:1473318f27b6 90 #endif
lrdawg99 0:1473318f27b6 91
lrdawg99 0:1473318f27b6 92 // Read a byte, store in "value".
lrdawg99 0:1473318f27b6 93 int8_t i2c_read_byte(uint8_t address, uint8_t *value)
lrdawg99 0:1473318f27b6 94 {
lrdawg99 0:1473318f27b6 95 //uint8_t ret=0;
lrdawg99 0:1473318f27b6 96 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 97 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 98 // ret |= i2c_write((address<<1)|I2C_READ_BIT); // Write the I2C 7-bit address with R bit
lrdawg99 0:1473318f27b6 99 // if (ret != 0) // Returns 1 if failed
lrdawg99 0:1473318f27b6 100 // return(1);
lrdawg99 0:1473318f27b6 101 //
lrdawg99 0:1473318f27b6 102 // *value = i2c_read(WITH_NACK); // Read byte from I2C Bus with NAK
lrdawg99 0:1473318f27b6 103 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 104 // return(0); // Return success
lrdawg99 0:1473318f27b6 105 return 0;
lrdawg99 0:1473318f27b6 106
lrdawg99 0:1473318f27b6 107 }
lrdawg99 0:1473318f27b6 108
lrdawg99 0:1473318f27b6 109 // Write "value" byte to device at "address"
lrdawg99 0:1473318f27b6 110 int8_t i2c_write_byte(uint8_t address, uint8_t value)
lrdawg99 0:1473318f27b6 111 {
lrdawg99 0:1473318f27b6 112 //int8_t ret= 0 ;
lrdawg99 0:1473318f27b6 113 //
lrdawg99 0:1473318f27b6 114 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 115 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 116 // ret |= i2c_write((address<<1)|I2C_WRITE_BIT); //Write the I2C 7 bit address with W bit
lrdawg99 0:1473318f27b6 117 // ret |= i2c_write(value); //Write value
lrdawg99 0:1473318f27b6 118 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 119 // if (ret!=0) // Returns 1 if failed
lrdawg99 0:1473318f27b6 120 // return(1);
lrdawg99 0:1473318f27b6 121 // return(0); // Returns 0 if success
lrdawg99 0:1473318f27b6 122 return 0;
lrdawg99 0:1473318f27b6 123 }
lrdawg99 0:1473318f27b6 124
lrdawg99 0:1473318f27b6 125 // Read a byte of data at register specified by "command", store in "value"
lrdawg99 0:1473318f27b6 126 int8_t i2c_read_byte_data(uint8_t address, uint8_t command, uint8_t *value)
lrdawg99 0:1473318f27b6 127 {
lrdawg99 0:1473318f27b6 128 //int8_t ret = 0;
lrdawg99 0:1473318f27b6 129 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 130 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 131 // ret |= i2c_write((address<<1)|I2C_WRITE_BIT); // Write 7 bit address with W bit
lrdawg99 0:1473318f27b6 132 // ret|= i2c_write(command); // Set register to be read to command
lrdawg99 0:1473318f27b6 133 // if (i2c_start()!=0) //I2C repeated START
lrdawg99 0:1473318f27b6 134 // {
lrdawg99 0:1473318f27b6 135 // i2c_stop(); //Attempt to issue I2C STOP
lrdawg99 0:1473318f27b6 136 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 137 // }
lrdawg99 0:1473318f27b6 138 // ret |= i2c_write((address<<1)|I2C_READ_BIT); // Write 7 bit address with R bit
lrdawg99 0:1473318f27b6 139 // *value = i2c_read(WITH_NACK); // Read byte from buffer with NAK
lrdawg99 0:1473318f27b6 140 // i2c_stop(); // I2C STOP
lrdawg99 0:1473318f27b6 141 // if (ret!=0) //If there was a NAK return 1
lrdawg99 0:1473318f27b6 142 // return(1);
lrdawg99 0:1473318f27b6 143 // return(0); // Return success
lrdawg99 0:1473318f27b6 144 return 0;
lrdawg99 0:1473318f27b6 145 }
lrdawg99 0:1473318f27b6 146
lrdawg99 0:1473318f27b6 147 // Write a byte of data to register specified by "command"
lrdawg99 0:1473318f27b6 148 int8_t i2c_write_byte_data(uint8_t address, uint8_t command, uint8_t value)
lrdawg99 0:1473318f27b6 149 {
lrdawg99 0:1473318f27b6 150 //int8_t ret = 0;
lrdawg99 0:1473318f27b6 151 //
lrdawg99 0:1473318f27b6 152 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 153 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 154 // ret |= i2c_write((address<<1)|I2C_WRITE_BIT); // Write 7 bit address with W bit
lrdawg99 0:1473318f27b6 155 // ret|= i2c_write(command); // Set register to be read to command
lrdawg99 0:1473318f27b6 156 // ret|= i2c_write(value);
lrdawg99 0:1473318f27b6 157 // i2c_stop(); // I2C STOP
lrdawg99 0:1473318f27b6 158 //
lrdawg99 0:1473318f27b6 159 // if (ret!=0) //If there was a NAK return 1
lrdawg99 0:1473318f27b6 160 // return(1);
lrdawg99 0:1473318f27b6 161 // return(0); // Return success
lrdawg99 0:1473318f27b6 162 return 0;
lrdawg99 0:1473318f27b6 163 }
lrdawg99 0:1473318f27b6 164
lrdawg99 0:1473318f27b6 165 // Read a 16-bit word of data from register specified by "command"
lrdawg99 0:1473318f27b6 166 int8_t i2c_read_word_data(uint8_t address, uint8_t command, uint16_t *value)
lrdawg99 0:1473318f27b6 167 {
lrdawg99 0:1473318f27b6 168 //int8_t ret = 0;
lrdawg99 0:1473318f27b6 169 //
lrdawg99 0:1473318f27b6 170 // union
lrdawg99 0:1473318f27b6 171 // {
lrdawg99 0:1473318f27b6 172 // uint8_t b[2];
lrdawg99 0:1473318f27b6 173 // uint16_t w;
lrdawg99 0:1473318f27b6 174 // } data;
lrdawg99 0:1473318f27b6 175 //
lrdawg99 0:1473318f27b6 176 //
lrdawg99 0:1473318f27b6 177 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 178 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 179 // ret |= i2c_write((address<<1)|I2C_WRITE_BIT); // Write 7 bit address with W bit
lrdawg99 0:1473318f27b6 180 // ret |= i2c_write(command); // Set register to be read to command
lrdawg99 0:1473318f27b6 181 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 182 // {
lrdawg99 0:1473318f27b6 183 // i2c_stop(); //Attempt to issue I2C STOP
lrdawg99 0:1473318f27b6 184 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 185 // }
lrdawg99 0:1473318f27b6 186 // ret |= i2c_write((address<<1)|I2C_READ_BIT); // Write 7 bit address with R bit
lrdawg99 0:1473318f27b6 187 //
lrdawg99 0:1473318f27b6 188 // data.b[1] = i2c_read(WITH_ACK); // Read MSB from buffer
lrdawg99 0:1473318f27b6 189 // data.b[0] = i2c_read(WITH_NACK); // Read LSB from buffer
lrdawg99 0:1473318f27b6 190 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 191 //
lrdawg99 0:1473318f27b6 192 // *value = data.w;
lrdawg99 0:1473318f27b6 193 //
lrdawg99 0:1473318f27b6 194 // if (ret!=0) //If NAK
lrdawg99 0:1473318f27b6 195 // return (1); //return 1
lrdawg99 0:1473318f27b6 196 // return(0); // Return success
lrdawg99 0:1473318f27b6 197 return 0;
lrdawg99 0:1473318f27b6 198 }
lrdawg99 0:1473318f27b6 199
lrdawg99 0:1473318f27b6 200 // Write a 16-bit word of data to register specified by "command"
lrdawg99 0:1473318f27b6 201 int8_t i2c_write_word_data(uint8_t address, uint8_t command, uint16_t value)
lrdawg99 0:1473318f27b6 202 {
lrdawg99 0:1473318f27b6 203 //int8_t ret=0;
lrdawg99 0:1473318f27b6 204 //
lrdawg99 0:1473318f27b6 205 // union
lrdawg99 0:1473318f27b6 206 // {
lrdawg99 0:1473318f27b6 207 // uint8_t b[2];
lrdawg99 0:1473318f27b6 208 // uint16_t w;
lrdawg99 0:1473318f27b6 209 // } data;
lrdawg99 0:1473318f27b6 210 // data.w = value;
lrdawg99 0:1473318f27b6 211 //
lrdawg99 0:1473318f27b6 212 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 213 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 214 // ret |= i2c_write((address<<1)|I2C_WRITE_BIT); // Write 7 bit address with W bit
lrdawg99 0:1473318f27b6 215 // ret|= i2c_write(command); // Set register to be read to command
lrdawg99 0:1473318f27b6 216 // ret|= i2c_write(data.b[1]); //Write MSB
lrdawg99 0:1473318f27b6 217 // ret|= i2c_write(data.b[0]); //Write LSB;
lrdawg99 0:1473318f27b6 218 //
lrdawg99 0:1473318f27b6 219 // i2c_stop(); // I2C STOP
lrdawg99 0:1473318f27b6 220 //
lrdawg99 0:1473318f27b6 221 // if (ret!=0) //If there was a NAK return 1
lrdawg99 0:1473318f27b6 222 // return(1);
lrdawg99 0:1473318f27b6 223 // return(0);
lrdawg99 0:1473318f27b6 224
lrdawg99 0:1473318f27b6 225 return 0;
lrdawg99 0:1473318f27b6 226 }
lrdawg99 0:1473318f27b6 227
lrdawg99 0:1473318f27b6 228 // Read a block of data, starting at register specified by "command" and ending at (command + length - 1)
lrdawg99 0:1473318f27b6 229 int8_t i2c_read_block_data(uint8_t address, uint8_t command, uint8_t length, uint8_t *values)
lrdawg99 0:1473318f27b6 230 {
lrdawg99 0:1473318f27b6 231 //uint8_t i = (length-1);
lrdawg99 0:1473318f27b6 232 // int8_t ret = 0;
lrdawg99 0:1473318f27b6 233 //
lrdawg99 0:1473318f27b6 234 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 235 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 236 // ret |= i2c_write((address<<1)|I2C_WRITE_BIT); //Write 7-bit address with W bit
lrdawg99 0:1473318f27b6 237 // if (ret!=0) //If NACK return 1
lrdawg99 0:1473318f27b6 238 // {
lrdawg99 0:1473318f27b6 239 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 240 // return(1);
lrdawg99 0:1473318f27b6 241 // }
lrdawg99 0:1473318f27b6 242 // ret|= i2c_write(command); //Write 8 bit command word
lrdawg99 0:1473318f27b6 243 // if (ret!=0) //If NACK return 1
lrdawg99 0:1473318f27b6 244 // {
lrdawg99 0:1473318f27b6 245 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 246 // return(1);
lrdawg99 0:1473318f27b6 247 // }
lrdawg99 0:1473318f27b6 248 // if (i2c_start()!=0) //I2C repeated START
lrdawg99 0:1473318f27b6 249 // {
lrdawg99 0:1473318f27b6 250 // i2c_stop(); //Attempt to issue I2C STOP
lrdawg99 0:1473318f27b6 251 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 252 // }
lrdawg99 0:1473318f27b6 253 // ret |= i2c_write((address<<1)|I2C_READ_BIT); //Write 7-bit address with R bit
lrdawg99 0:1473318f27b6 254 //
lrdawg99 0:1473318f27b6 255 // if (ret!=0) //If NACK return 1
lrdawg99 0:1473318f27b6 256 // {
lrdawg99 0:1473318f27b6 257 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 258 // return(1);
lrdawg99 0:1473318f27b6 259 // }
lrdawg99 0:1473318f27b6 260 // while (i>0) //Begin read loop
lrdawg99 0:1473318f27b6 261 // {
lrdawg99 0:1473318f27b6 262 // values[i] = i2c_read(WITH_ACK); //Read from bus with ACK
lrdawg99 0:1473318f27b6 263 // i--;
lrdawg99 0:1473318f27b6 264 // }
lrdawg99 0:1473318f27b6 265 //
lrdawg99 0:1473318f27b6 266 // values[0] = i2c_read(WITH_NACK); //Read from bus with NACK for the last one;
lrdawg99 0:1473318f27b6 267 //
lrdawg99 0:1473318f27b6 268 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 269 //
lrdawg99 0:1473318f27b6 270 //
lrdawg99 0:1473318f27b6 271 // return(0); // Success!
lrdawg99 0:1473318f27b6 272 return 0;
lrdawg99 0:1473318f27b6 273 }
lrdawg99 0:1473318f27b6 274
lrdawg99 0:1473318f27b6 275
lrdawg99 0:1473318f27b6 276 // Read a block of data, no command byte, reads length number of bytes and stores it in values.
lrdawg99 0:1473318f27b6 277 int8_t i2c_read_block_data(uint8_t address, uint8_t length, uint8_t *values)
lrdawg99 0:1473318f27b6 278 {
lrdawg99 0:1473318f27b6 279 //uint8_t i = (length-1);
lrdawg99 0:1473318f27b6 280 // int8_t ret = 0;
lrdawg99 0:1473318f27b6 281 //
lrdawg99 0:1473318f27b6 282 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 283 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 284 // ret |= i2c_write((address<<1)|I2C_READ_BIT); //Write 7-bit address with R bit
lrdawg99 0:1473318f27b6 285 //
lrdawg99 0:1473318f27b6 286 // if (ret!=0) //If NACK return 1
lrdawg99 0:1473318f27b6 287 // {
lrdawg99 0:1473318f27b6 288 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 289 // return(1);
lrdawg99 0:1473318f27b6 290 // }
lrdawg99 0:1473318f27b6 291 // while (i>0) //Begin read loop
lrdawg99 0:1473318f27b6 292 // {
lrdawg99 0:1473318f27b6 293 // values[i] = i2c_read(WITH_ACK); //Read from bus with ACK
lrdawg99 0:1473318f27b6 294 // i--;
lrdawg99 0:1473318f27b6 295 // }
lrdawg99 0:1473318f27b6 296 //
lrdawg99 0:1473318f27b6 297 // values[0] = i2c_read(WITH_NACK); //Read from bus with NACK for the last one;
lrdawg99 0:1473318f27b6 298 //
lrdawg99 0:1473318f27b6 299 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 300 //
lrdawg99 0:1473318f27b6 301 //
lrdawg99 0:1473318f27b6 302 // return(0); // Success!
lrdawg99 0:1473318f27b6 303 return 0;
lrdawg99 0:1473318f27b6 304 }
lrdawg99 0:1473318f27b6 305
lrdawg99 0:1473318f27b6 306
lrdawg99 0:1473318f27b6 307 // Write a block of data, starting at register specified by "command" and ending at (command + length - 1)
lrdawg99 0:1473318f27b6 308 int8_t i2c_write_block_data(uint8_t address, uint8_t command, uint8_t length, uint8_t *values)
lrdawg99 0:1473318f27b6 309 {
lrdawg99 0:1473318f27b6 310 // int8_t i = length-1;
lrdawg99 0:1473318f27b6 311 // int8_t ret = 0;
lrdawg99 0:1473318f27b6 312 //
lrdawg99 0:1473318f27b6 313 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 314 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 315 // ret |= i2c_write((address<<1)|I2C_WRITE_BIT); // Write 7 bit address with W bit
lrdawg99 0:1473318f27b6 316 // ret|= i2c_write(command); // Set register to be read to command
lrdawg99 0:1473318f27b6 317 //
lrdawg99 0:1473318f27b6 318 // while (i>=0)
lrdawg99 0:1473318f27b6 319 // {
lrdawg99 0:1473318f27b6 320 // ret|= i2c_write(values[i]); //Write Value
lrdawg99 0:1473318f27b6 321 // i--;
lrdawg99 0:1473318f27b6 322 // }
lrdawg99 0:1473318f27b6 323 // i2c_stop(); // I2C STOP
lrdawg99 0:1473318f27b6 324 //
lrdawg99 0:1473318f27b6 325 // if (ret!=0)
lrdawg99 0:1473318f27b6 326 // return(1);
lrdawg99 0:1473318f27b6 327 // else
lrdawg99 0:1473318f27b6 328 // return(0); // Success!
lrdawg99 0:1473318f27b6 329 return 0;
lrdawg99 0:1473318f27b6 330 }
lrdawg99 0:1473318f27b6 331
lrdawg99 0:1473318f27b6 332 // Write two command bytes, then receive a block of data
lrdawg99 0:1473318f27b6 333 int8_t i2c_two_byte_command_read_block(uint8_t address, uint16_t command, uint8_t length, uint8_t *values)
lrdawg99 0:1473318f27b6 334 {
lrdawg99 0:1473318f27b6 335 //
lrdawg99 0:1473318f27b6 336 // int8_t ret = 0;
lrdawg99 0:1473318f27b6 337 //
lrdawg99 0:1473318f27b6 338 // union
lrdawg99 0:1473318f27b6 339 // {
lrdawg99 0:1473318f27b6 340 // uint8_t b[2];
lrdawg99 0:1473318f27b6 341 // uint16_t w;
lrdawg99 0:1473318f27b6 342 // } comm;
lrdawg99 0:1473318f27b6 343 // comm.w = command;
lrdawg99 0:1473318f27b6 344 //
lrdawg99 0:1473318f27b6 345 // uint8_t i = (length-1);
lrdawg99 0:1473318f27b6 346 //
lrdawg99 0:1473318f27b6 347 //
lrdawg99 0:1473318f27b6 348 // if (i2c_start()!=0) //I2C START
lrdawg99 0:1473318f27b6 349 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 350 // ret |= i2c_write((address<<1)|I2C_WRITE_BIT); //Write 7-bit address with W bit
lrdawg99 0:1473318f27b6 351 // ret |= i2c_write(comm.b[1]); //Write MSB command word
lrdawg99 0:1473318f27b6 352 // ret |= i2c_write(comm.b[0]); // Write LSB of command
lrdawg99 0:1473318f27b6 353 // if (i2c_start()!=0) //I2C repeated START
lrdawg99 0:1473318f27b6 354 // {
lrdawg99 0:1473318f27b6 355 // i2c_stop(); //Attempt to issue I2C STOP
lrdawg99 0:1473318f27b6 356 // return(1); //Stop and return 0 if START fail
lrdawg99 0:1473318f27b6 357 // }
lrdawg99 0:1473318f27b6 358 // ret |= i2c_write((address<<1)|I2C_READ_BIT); //Write 7-bit address with R bit
lrdawg99 0:1473318f27b6 359 // if (ret!=0) //If NACK return 1
lrdawg99 0:1473318f27b6 360 // {
lrdawg99 0:1473318f27b6 361 // i2c_stop();
lrdawg99 0:1473318f27b6 362 // return(1);
lrdawg99 0:1473318f27b6 363 // }
lrdawg99 0:1473318f27b6 364 // while (i> 0) //Begin read loop
lrdawg99 0:1473318f27b6 365 // {
lrdawg99 0:1473318f27b6 366 // values[i] = i2c_read(WITH_ACK); //Read from bus with ACK
lrdawg99 0:1473318f27b6 367 // i--;
lrdawg99 0:1473318f27b6 368 // }
lrdawg99 0:1473318f27b6 369 //
lrdawg99 0:1473318f27b6 370 // values[0] = i2c_read(WITH_NACK); //Read from bus with NACK for the last one;
lrdawg99 0:1473318f27b6 371 // i2c_stop(); //I2C STOP
lrdawg99 0:1473318f27b6 372 //
lrdawg99 0:1473318f27b6 373 //
lrdawg99 0:1473318f27b6 374 // return(0); // Success!
lrdawg99 0:1473318f27b6 375 return 0;
lrdawg99 0:1473318f27b6 376 }
lrdawg99 0:1473318f27b6 377
lrdawg99 0:1473318f27b6 378 // Initializes Linduino I2C port.
lrdawg99 0:1473318f27b6 379 // Before communicating to the I2C port throught the QuikEval connector, you must also run
lrdawg99 0:1473318f27b6 380 // quikeval_I2C_connect to connect the I2C port to the QuikEval connector throught the
lrdawg99 0:1473318f27b6 381 // QuikEval MUX (and disconnect SPI).
lrdawg99 0:1473318f27b6 382 void quikeval_I2C_init(void)
lrdawg99 0:1473318f27b6 383 {
lrdawg99 0:1473318f27b6 384 // i2c_enable(); //! 1) Enable the I2C port;
lrdawg99 0:1473318f27b6 385 }
lrdawg99 0:1473318f27b6 386
lrdawg99 0:1473318f27b6 387 // Switch MUX to connect I2C pins to QuikEval connector.
lrdawg99 0:1473318f27b6 388 // This will disconnect SPI pins.
lrdawg99 0:1473318f27b6 389 void quikeval_I2C_connect(void)
lrdawg99 0:1473318f27b6 390 {
lrdawg99 0:1473318f27b6 391 //// Enable I2C
lrdawg99 0:1473318f27b6 392 // pinMode(QUIKEVAL_MUX_MODE_PIN, OUTPUT); //! 1) Set Mux pin as an output
lrdawg99 0:1473318f27b6 393 // if (digitalRead(QUIKEVAL_MUX_MODE_PIN) == LOW) //! 2) If pin is already high, do nothing
lrdawg99 0:1473318f27b6 394 // {
lrdawg99 0:1473318f27b6 395 // digitalWrite(QUIKEVAL_MUX_MODE_PIN, HIGH); //! 3) Set the Mux pin to high
lrdawg99 0:1473318f27b6 396 // delay(55); //! 4) And wait for LTC4315 to connect (required for rev B)
lrdawg99 0:1473318f27b6 397 // }
lrdawg99 0:1473318f27b6 398 }
lrdawg99 0:1473318f27b6 399
lrdawg99 0:1473318f27b6 400 // Setup the hardware I2C interface.
lrdawg99 0:1473318f27b6 401 // i2c_enable or quikeval_I2C_init must be called before using any of the other I2C routines.
lrdawg99 0:1473318f27b6 402 void i2c_enable()
lrdawg99 0:1473318f27b6 403 {
lrdawg99 0:1473318f27b6 404 // // set these for 100KHz to match the DC590
lrdawg99 0:1473318f27b6 405 // TWSR = (HARDWARE_I2C_PRESCALER_4 & 0x03); //! 1) set the prescaler bits
lrdawg99 0:1473318f27b6 406 // TWBR = 18; //! 2) set the bit rate
lrdawg99 0:1473318f27b6 407
lrdawg99 0:1473318f27b6 408 }
lrdawg99 0:1473318f27b6 409
lrdawg99 0:1473318f27b6 410
lrdawg99 0:1473318f27b6 411 // Write start bit to the hardware I2C port
lrdawg99 0:1473318f27b6 412 // return 0 if successful, 1 if not successful
lrdawg99 0:1473318f27b6 413 int8_t i2c_start()
lrdawg99 0:1473318f27b6 414 {
lrdawg99 0:1473318f27b6 415 //uint8_t result;
lrdawg99 0:1473318f27b6 416 // uint16_t timeout;
lrdawg99 0:1473318f27b6 417 // TWCR=(1<<TWINT) | (1<<TWSTA) | (1<<TWEN); //! 1) I2C start
lrdawg99 0:1473318f27b6 418 // for (timeout = 0; timeout < HW_I2C_TIMEOUT; timeout++) //! 2) START the timeout loop
lrdawg99 0:1473318f27b6 419 // {
lrdawg99 0:1473318f27b6 420 // _delay_us(1);
lrdawg99 0:1473318f27b6 421 // if (TWCR & (1 << TWINT)) break; //! 3) Check the TWINT bit in TWCR
lrdawg99 0:1473318f27b6 422 // }
lrdawg99 0:1473318f27b6 423 // result=(TWSR & 0xF8); //! 4) Mask the status
lrdawg99 0:1473318f27b6 424 // if ((result == STATUS_START) || (result == STATUS_REPEATED_START))
lrdawg99 0:1473318f27b6 425 // return(0); //! 5) Return status
lrdawg99 0:1473318f27b6 426 // else
lrdawg99 0:1473318f27b6 427 // return(1);
lrdawg99 0:1473318f27b6 428 return 0;
lrdawg99 0:1473318f27b6 429 }
lrdawg99 0:1473318f27b6 430
lrdawg99 0:1473318f27b6 431 // Write a repeat start bit to the hardware I2C port
lrdawg99 0:1473318f27b6 432 // return 0 if successful, 1 if not successful
lrdawg99 0:1473318f27b6 433 int8_t i2c_repeated_start()
lrdawg99 0:1473318f27b6 434 {
lrdawg99 0:1473318f27b6 435 //uint8_t result;
lrdawg99 0:1473318f27b6 436 // uint16_t timeout;
lrdawg99 0:1473318f27b6 437 // TWCR=(1<<TWINT) | (1<<TWSTA) | (1<<TWEN); //! 1) I2C repeated start
lrdawg99 0:1473318f27b6 438 // for (timeout = 0; timeout < HW_I2C_TIMEOUT; timeout++) //! 2) START the timeout loop
lrdawg99 0:1473318f27b6 439 // {
lrdawg99 0:1473318f27b6 440 // _delay_us(1);
lrdawg99 0:1473318f27b6 441 // if (TWCR & (1 << TWINT)) break; //! 3) Check the TWINT bit in TWCR
lrdawg99 0:1473318f27b6 442 // }
lrdawg99 0:1473318f27b6 443 // result=(TWSR & 0xF8); //! 4) Mask the status
lrdawg99 0:1473318f27b6 444 // if (result == STATUS_REPEATED_START)
lrdawg99 0:1473318f27b6 445 // return(0); //! 5) Return status
lrdawg99 0:1473318f27b6 446 // else
lrdawg99 0:1473318f27b6 447 // return(1);
lrdawg99 0:1473318f27b6 448 return 0;
lrdawg99 0:1473318f27b6 449 }
lrdawg99 0:1473318f27b6 450
lrdawg99 0:1473318f27b6 451 // Write stop bit to the hardware I2C port
lrdawg99 0:1473318f27b6 452 void i2c_stop()
lrdawg99 0:1473318f27b6 453 {
lrdawg99 0:1473318f27b6 454 //TWCR=(1<<TWINT) | (1<<TWEN) | (1<<TWSTO); //! 1) I2C stop
lrdawg99 0:1473318f27b6 455 // while (TWCR & (1<<TWSTO)); //! 2) Wait for stop to complete
lrdawg99 0:1473318f27b6 456 }
lrdawg99 0:1473318f27b6 457
lrdawg99 0:1473318f27b6 458 // Send a data byte to hardware I2C port
lrdawg99 0:1473318f27b6 459 // return 0 if successful, 1 if not successful
lrdawg99 0:1473318f27b6 460 int8_t i2c_write(uint8_t data)
lrdawg99 0:1473318f27b6 461 {
lrdawg99 0:1473318f27b6 462 // uint8_t result;
lrdawg99 0:1473318f27b6 463 // uint16_t timeout;
lrdawg99 0:1473318f27b6 464 // TWDR = data; //! 1) Load data register
lrdawg99 0:1473318f27b6 465 // TWCR =(1<<TWINT) | (1<<TWEN); //! 2) START transaction
lrdawg99 0:1473318f27b6 466 // for (timeout = 0; timeout < HW_I2C_TIMEOUT; timeout++) //! 3) START the timeout loop
lrdawg99 0:1473318f27b6 467 // {
lrdawg99 0:1473318f27b6 468 // _delay_us(1);
lrdawg99 0:1473318f27b6 469 // if (TWCR & (1 << TWINT)) break; //! 4) Check the TWINT bit in TWCR
lrdawg99 0:1473318f27b6 470 // }
lrdawg99 0:1473318f27b6 471 // result=(TWSR & 0xF8); //! 5) Update status
lrdawg99 0:1473318f27b6 472 // // For a generic write, need to consider all three of these cases (processor specific, some may not be this detailed.)
lrdawg99 0:1473318f27b6 473 // if ((result == STATUS_WRITE_ACK) || (result == STATUS_ADDRESS_WRITE_ACK) || (result == STATUS_ADDRESS_READ_ACK))
lrdawg99 0:1473318f27b6 474 // return(0); //! 6) Return status
lrdawg99 0:1473318f27b6 475 // else
lrdawg99 0:1473318f27b6 476 // return(1);
lrdawg99 0:1473318f27b6 477 return 0;
lrdawg99 0:1473318f27b6 478 }
lrdawg99 0:1473318f27b6 479
lrdawg99 0:1473318f27b6 480 // Read a data byte from the hardware I2C port.
lrdawg99 0:1473318f27b6 481 // Returns the data byte read.
lrdawg99 0:1473318f27b6 482 uint8_t i2c_read(int8_t ack)
lrdawg99 0:1473318f27b6 483 {
lrdawg99 0:1473318f27b6 484 //uint8_t result;
lrdawg99 0:1473318f27b6 485 // uint8_t return_value = 1;
lrdawg99 0:1473318f27b6 486 // uint16_t timeout;
lrdawg99 0:1473318f27b6 487 // uint8_t data;
lrdawg99 0:1473318f27b6 488 // if (ack == 0)
lrdawg99 0:1473318f27b6 489 // {
lrdawg99 0:1473318f27b6 490 // TWCR=(1<<TWINT) | (1<<TWEN) | (1<<TWEA); //! 1) START transaction with ack
lrdawg99 0:1473318f27b6 491 // for (timeout = 0; timeout < HW_I2C_TIMEOUT; timeout++) //! 2) START timeout loop
lrdawg99 0:1473318f27b6 492 // {
lrdawg99 0:1473318f27b6 493 // _delay_us(1);
lrdawg99 0:1473318f27b6 494 // if (TWCR & (1 << TWINT)) break; //! 3) Check the TWINT bit in TWCR
lrdawg99 0:1473318f27b6 495 // }
lrdawg99 0:1473318f27b6 496 // data = TWDR; //! 4) Get data
lrdawg99 0:1473318f27b6 497 // result = TWSR & 0xF8; //! 5) Update status
lrdawg99 0:1473318f27b6 498 // if (result == STATUS_READ_ACK) return_value = 0;
lrdawg99 0:1473318f27b6 499 // }
lrdawg99 0:1473318f27b6 500 // else
lrdawg99 0:1473318f27b6 501 // {
lrdawg99 0:1473318f27b6 502 // TWCR=(1<<TWINT) | (1<<TWEN); //! 6) START transaction with NACK
lrdawg99 0:1473318f27b6 503 // for (timeout = 0; timeout < HW_I2C_TIMEOUT; timeout++)
lrdawg99 0:1473318f27b6 504 // {
lrdawg99 0:1473318f27b6 505 // _delay_us(1);
lrdawg99 0:1473318f27b6 506 // if (TWCR & (1 << TWINT)) break; //! 7) Check the TWINT bit in TWCR
lrdawg99 0:1473318f27b6 507 // }
lrdawg99 0:1473318f27b6 508 // data = TWDR; //! 8) Get data
lrdawg99 0:1473318f27b6 509 // result = TWSR & 0xF8; //! 9) Update status
lrdawg99 0:1473318f27b6 510 // if (result == STATUS_READ_NACK) return_value = 0;
lrdawg99 0:1473318f27b6 511 // }
lrdawg99 0:1473318f27b6 512 // return(data);
lrdawg99 0:1473318f27b6 513 return 0;
lrdawg99 0:1473318f27b6 514 }
lrdawg99 0:1473318f27b6 515
lrdawg99 0:1473318f27b6 516 // Poll the I2C port and look for an acknowledge
lrdawg99 0:1473318f27b6 517 // Returns 0 if successful, 1 if not successful
lrdawg99 0:1473318f27b6 518 int8_t i2c_poll(uint8_t i2c_address)
lrdawg99 0:1473318f27b6 519
lrdawg99 0:1473318f27b6 520 {
lrdawg99 0:1473318f27b6 521 //int8_t ack=0;
lrdawg99 0:1473318f27b6 522 // ack |= i2c_start(); //! 1) I2C start
lrdawg99 0:1473318f27b6 523 // ack |= i2c_write((i2c_address<<1) | I2C_WRITE_BIT); //! 2) I2C address + !write
lrdawg99 0:1473318f27b6 524 // i2c_stop(); //! 3) I2C stop
lrdawg99 0:1473318f27b6 525 // return(ack); //! 4) Return ack status
lrdawg99 0:1473318f27b6 526 return 0;
lrdawg99 0:1473318f27b6 527 }