projet_pololu_et5_ees
Fork of FastIO by
Diff: Devices/FastIO_EFM32.h
- Revision:
- 16:a56c0e7ebf7f
- Parent:
- 15:e0c5a5216647
- Child:
- 17:87872fcf8586
--- a/Devices/FastIO_EFM32.h Thu Jul 09 21:11:39 2015 +0000 +++ b/Devices/FastIO_EFM32.h Sat Jul 11 14:27:43 2015 +0000 @@ -21,9 +21,9 @@ #define INIT_PIN container.mask = PINMASK; container.input_mode = PullDefault; container.output_mode = PushPull; CMU_ClockEnable(cmuClock_HFPER, true); CMU_ClockEnable(cmuClock_GPIO, true) #define DESTROY_PIN -#define SET_DIR_INPUT uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + (Input << MODE_SHIFT) +#define SET_DIR_INPUT uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + ((container.input_mode & 0xF) << MODE_SHIFT); if (container.input_mode > 0x10) WRITE_PIN_SET; else WRITE_PIN_CLR #define SET_DIR_OUTPUT uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + (container.output_mode << MODE_SHIFT) -#define SET_MODE(pull) (((pull <= 3) || (pull > 0x10)) ? container.input_mode = pull : container.output_mode = pull) +#define SET_MODE(pull) if ((pull <= 3) || (pull > 0x10)) {container.input_mode = pull; SET_DIR_INPUT; } else {container.output_mode = pull; SET_DIR_OUTPUT;} #define WRITE_PIN_SET GPIO->P[PORT_INDEX].DOUTSET = PINMASK #define WRITE_PIN_CLR GPIO->P[PORT_INDEX].DOUTCLR = PINMASK