Laxmi Kant Tiwari / mbed-dsp

CMSIS DSP Lib

Fork of mbed-dsp by mbed official

cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q31.c@4:9cee975aadce, 2014-06-23 (annotated)

Committer:
mbed_official
Date:
Mon Jun 23 09:30:09 2014 +0100
Revision:
4:9cee975aadce
Parent:
3:7a284390b0ce 
Synchronized with git revision 6e7c7bcec41226f536474daae3c13d49e4c0e865



Full URL: https://github.com/mbedmicro/mbed/commit/6e7c7bcec41226f536474daae3c13d49e4c0e865/



Fix signed unsigned compare in dsp library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_cmplx_mag_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 complex magnitude
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup cmplx_mag
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Q31 complex magnitude
emilmont 1:fdd22bb7aa52 54 * @param *pSrc points to the complex input vector
emilmont 1:fdd22bb7aa52 55 * @param *pDst points to the real output vector
emilmont 1:fdd22bb7aa52 56 * @param numSamples number of complex samples in the input vector
emilmont 1:fdd22bb7aa52 57 * @return none.
emilmont 1:fdd22bb7aa52 58 *
emilmont 1:fdd22bb7aa52 59 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 60 * \par
emilmont 1:fdd22bb7aa52 61 * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
emilmont 1:fdd22bb7aa52 62 * Input down scaling is not required.
emilmont 1:fdd22bb7aa52 63 */
emilmont 1:fdd22bb7aa52 64
emilmont 1:fdd22bb7aa52 65 void arm_cmplx_mag_q31(
emilmont 1:fdd22bb7aa52 66 q31_t * pSrc,
emilmont 1:fdd22bb7aa52 67 q31_t * pDst,
emilmont 1:fdd22bb7aa52 68 uint32_t numSamples)
emilmont 1:fdd22bb7aa52 69 {
emilmont 1:fdd22bb7aa52 70 q31_t real, imag; /* Temporary variables to hold input values */
emilmont 1:fdd22bb7aa52 71 q31_t acc0, acc1; /* Accumulators */
emilmont 1:fdd22bb7aa52 72 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 73
mbed_official 3:7a284390b0ce 74 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 77 q31_t real1, real2, imag1, imag2; /* Temporary variables to hold input values */
emilmont 1:fdd22bb7aa52 78 q31_t out1, out2, out3, out4; /* Accumulators */
emilmont 1:fdd22bb7aa52 79 q63_t mul1, mul2, mul3, mul4; /* Temporary variables */
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81
emilmont 1:fdd22bb7aa52 82 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 83 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 86 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 87 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 88 {
emilmont 1:fdd22bb7aa52 89 /* read complex input from source buffer */
emilmont 1:fdd22bb7aa52 90 real1 = pSrc[0];
emilmont 1:fdd22bb7aa52 91 imag1 = pSrc[1];
emilmont 1:fdd22bb7aa52 92 real2 = pSrc[2];
emilmont 1:fdd22bb7aa52 93 imag2 = pSrc[3];
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95 /* calculate power of input values */
emilmont 1:fdd22bb7aa52 96 mul1 = (q63_t) real1 *real1;
emilmont 1:fdd22bb7aa52 97 mul2 = (q63_t) imag1 *imag1;
emilmont 1:fdd22bb7aa52 98 mul3 = (q63_t) real2 *real2;
emilmont 1:fdd22bb7aa52 99 mul4 = (q63_t) imag2 *imag2;
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 /* get the result to 3.29 format */
emilmont 1:fdd22bb7aa52 102 out1 = (q31_t) (mul1 >> 33);
emilmont 1:fdd22bb7aa52 103 out2 = (q31_t) (mul2 >> 33);
emilmont 1:fdd22bb7aa52 104 out3 = (q31_t) (mul3 >> 33);
emilmont 1:fdd22bb7aa52 105 out4 = (q31_t) (mul4 >> 33);
emilmont 1:fdd22bb7aa52 106
emilmont 1:fdd22bb7aa52 107 /* add real and imaginary accumulators */
emilmont 1:fdd22bb7aa52 108 out1 = out1 + out2;
emilmont 1:fdd22bb7aa52 109 out3 = out3 + out4;
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 /* read complex input from source buffer */
emilmont 1:fdd22bb7aa52 112 real1 = pSrc[4];
emilmont 1:fdd22bb7aa52 113 imag1 = pSrc[5];
emilmont 1:fdd22bb7aa52 114 real2 = pSrc[6];
emilmont 1:fdd22bb7aa52 115 imag2 = pSrc[7];
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* calculate square root */
emilmont 1:fdd22bb7aa52 118 arm_sqrt_q31(out1, &pDst[0]);
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 /* calculate power of input values */
emilmont 1:fdd22bb7aa52 121 mul1 = (q63_t) real1 *real1;
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 /* calculate square root */
emilmont 1:fdd22bb7aa52 124 arm_sqrt_q31(out3, &pDst[1]);
emilmont 1:fdd22bb7aa52 125
emilmont 1:fdd22bb7aa52 126 /* calculate power of input values */
emilmont 1:fdd22bb7aa52 127 mul2 = (q63_t) imag1 *imag1;
emilmont 1:fdd22bb7aa52 128 mul3 = (q63_t) real2 *real2;
emilmont 1:fdd22bb7aa52 129 mul4 = (q63_t) imag2 *imag2;
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 /* get the result to 3.29 format */
emilmont 1:fdd22bb7aa52 132 out1 = (q31_t) (mul1 >> 33);
emilmont 1:fdd22bb7aa52 133 out2 = (q31_t) (mul2 >> 33);
emilmont 1:fdd22bb7aa52 134 out3 = (q31_t) (mul3 >> 33);
emilmont 1:fdd22bb7aa52 135 out4 = (q31_t) (mul4 >> 33);
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 /* add real and imaginary accumulators */
emilmont 1:fdd22bb7aa52 138 out1 = out1 + out2;
emilmont 1:fdd22bb7aa52 139 out3 = out3 + out4;
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 /* calculate square root */
emilmont 1:fdd22bb7aa52 142 arm_sqrt_q31(out1, &pDst[2]);
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 /* increment destination by 8 to process next samples */
emilmont 1:fdd22bb7aa52 145 pSrc += 8u;
emilmont 1:fdd22bb7aa52 146
emilmont 1:fdd22bb7aa52 147 /* calculate square root */
emilmont 1:fdd22bb7aa52 148 arm_sqrt_q31(out3, &pDst[3]);
emilmont 1:fdd22bb7aa52 149
emilmont 1:fdd22bb7aa52 150 /* increment destination by 4 to process next samples */
emilmont 1:fdd22bb7aa52 151 pDst += 4u;
emilmont 1:fdd22bb7aa52 152
emilmont 1:fdd22bb7aa52 153 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 154 blkCnt--;
emilmont 1:fdd22bb7aa52 155 }
emilmont 1:fdd22bb7aa52 156
emilmont 1:fdd22bb7aa52 157 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 158 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 159 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 160
emilmont 1:fdd22bb7aa52 161 #else
emilmont 1:fdd22bb7aa52 162
emilmont 1:fdd22bb7aa52 163 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 164 blkCnt = numSamples;
emilmont 1:fdd22bb7aa52 165
mbed_official 3:7a284390b0ce 166 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 167
emilmont 1:fdd22bb7aa52 168 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 169 {
emilmont 1:fdd22bb7aa52 170 /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
emilmont 1:fdd22bb7aa52 171 real = *pSrc++;
emilmont 1:fdd22bb7aa52 172 imag = *pSrc++;
emilmont 1:fdd22bb7aa52 173 acc0 = (q31_t) (((q63_t) real * real) >> 33);
emilmont 1:fdd22bb7aa52 174 acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
emilmont 1:fdd22bb7aa52 175 /* store the result in 2.30 format in the destination buffer. */
emilmont 1:fdd22bb7aa52 176 arm_sqrt_q31(acc0 + acc1, pDst++);
emilmont 1:fdd22bb7aa52 177
emilmont 1:fdd22bb7aa52 178 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 179 blkCnt--;
emilmont 1:fdd22bb7aa52 180 }
emilmont 1:fdd22bb7aa52 181 }
emilmont 1:fdd22bb7aa52 182
emilmont 1:fdd22bb7aa52 183 /**
emilmont 1:fdd22bb7aa52 184 * @} end of cmplx_mag group
emilmont 1:fdd22bb7aa52 185 */