Kimberly Lie / Mbed 2 deprecated ECE4180_MasterCode

ECE 4180 Project for Spring 2020

Dependencies:   mbed mbed-rtos SDFileSystem PinDetect ESP8266NodeMCUInterface

PowerControl/PowerControl.h@1:5ae291085f75, 2020-05-01 (annotated)

Committer:
kimberlylie99
Date:
Fri May 01 18:43:13 2020 +0000
Revision:
1:5ae291085f75
Parent:
0:b97c07227845 
Edit Main.cpp;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kimberlylie99 0:b97c07227845 1 /* mbed PowerControl Library
kimberlylie99 0:b97c07227845 2 * Copyright (c) 2010 Michael Wei
kimberlylie99 0:b97c07227845 3 */
kimberlylie99 0:b97c07227845 4
kimberlylie99 0:b97c07227845 5 #ifndef MBED_POWERCONTROL_H
kimberlylie99 0:b97c07227845 6 #define MBED_POWERCONTROL_H
kimberlylie99 0:b97c07227845 7
kimberlylie99 0:b97c07227845 8 //shouldn't have to include, but fixes weird problems with defines
kimberlylie99 0:b97c07227845 9 //#include "LPC1768/LPC17xx.h"
kimberlylie99 0:b97c07227845 10 //System Control Register
kimberlylie99 0:b97c07227845 11 // bit 0: Reserved
kimberlylie99 0:b97c07227845 12 // bit 1: Sleep on Exit
kimberlylie99 0:b97c07227845 13 #define LPC1768_SCR_SLEEPONEXIT 0x2
kimberlylie99 0:b97c07227845 14 // bit 2: Deep Sleep
kimberlylie99 0:b97c07227845 15 #define LPC1768_SCR_SLEEPDEEP 0x4
kimberlylie99 0:b97c07227845 16 // bit 3: Resereved
kimberlylie99 0:b97c07227845 17 // bit 4: Send on Pending
kimberlylie99 0:b97c07227845 18 #define LPC1768_SCR_SEVONPEND 0x10
kimberlylie99 0:b97c07227845 19 // bit 5-31: Reserved
kimberlylie99 0:b97c07227845 20
kimberlylie99 0:b97c07227845 21 //Power Control Register
kimberlylie99 0:b97c07227845 22 // bit 0: Power mode control bit 0 (power-down mode)
kimberlylie99 0:b97c07227845 23 #define LPC1768_PCON_PM0 0x1
kimberlylie99 0:b97c07227845 24 // bit 1: Power mode control bit 1 (deep power-down mode)
kimberlylie99 0:b97c07227845 25 #define LPC1768_PCON_PM1 0x2
kimberlylie99 0:b97c07227845 26 // bit 2: Brown-out reduced power mode
kimberlylie99 0:b97c07227845 27 #define LPC1768_PCON_BODRPM 0x4
kimberlylie99 0:b97c07227845 28 // bit 3: Brown-out global disable
kimberlylie99 0:b97c07227845 29 #define LPC1768_PCON_BOGD 0x8
kimberlylie99 0:b97c07227845 30 // bit 4: Brown-out reset disable
kimberlylie99 0:b97c07227845 31 #define LPC1768_PCON_BORD 0x10
kimberlylie99 0:b97c07227845 32 // bit 5-7 : Reserved
kimberlylie99 0:b97c07227845 33 // bit 8: Sleep Mode Entry Flag
kimberlylie99 0:b97c07227845 34 #define LPC1768_PCON_SMFLAG 0x100
kimberlylie99 0:b97c07227845 35 // bit 9: Deep Sleep Entry Flag
kimberlylie99 0:b97c07227845 36 #define LPC1768_PCON_DSFLAG 0x200
kimberlylie99 0:b97c07227845 37 // bit 10: Power Down Entry Flag
kimberlylie99 0:b97c07227845 38 #define LPC1768_PCON_PDFLAG 0x400
kimberlylie99 0:b97c07227845 39 // bit 11: Deep Power Down Entry Flag
kimberlylie99 0:b97c07227845 40 #define LPC1768_PCON_DPDFLAG 0x800
kimberlylie99 0:b97c07227845 41 // bit 12-31: Reserved
kimberlylie99 0:b97c07227845 42
kimberlylie99 0:b97c07227845 43 //"Sleep Mode" (WFI).
kimberlylie99 0:b97c07227845 44 inline void Sleep(void)
kimberlylie99 0:b97c07227845 45 {
kimberlylie99 0:b97c07227845 46 __WFI();
kimberlylie99 0:b97c07227845 47 }
kimberlylie99 0:b97c07227845 48
kimberlylie99 0:b97c07227845 49 //"Deep Sleep" Mode
kimberlylie99 0:b97c07227845 50 inline void DeepSleep(void)
kimberlylie99 0:b97c07227845 51 {
kimberlylie99 0:b97c07227845 52 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
kimberlylie99 0:b97c07227845 53 __WFI();
kimberlylie99 0:b97c07227845 54 }
kimberlylie99 0:b97c07227845 55
kimberlylie99 0:b97c07227845 56 //"Power-Down" Mode
kimberlylie99 0:b97c07227845 57 inline void PowerDown(void)
kimberlylie99 0:b97c07227845 58 {
kimberlylie99 0:b97c07227845 59 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
kimberlylie99 0:b97c07227845 60 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
kimberlylie99 0:b97c07227845 61 LPC_SC->PCON |= LPC1768_PCON_PM0;
kimberlylie99 0:b97c07227845 62 __WFI();
kimberlylie99 0:b97c07227845 63 //reset back to normal
kimberlylie99 0:b97c07227845 64 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
kimberlylie99 0:b97c07227845 65 }
kimberlylie99 0:b97c07227845 66
kimberlylie99 0:b97c07227845 67 //"Deep Power-Down" Mode
kimberlylie99 0:b97c07227845 68 inline void DeepPowerDown(void)
kimberlylie99 0:b97c07227845 69 {
kimberlylie99 0:b97c07227845 70 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
kimberlylie99 0:b97c07227845 71 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
kimberlylie99 0:b97c07227845 72 __WFI();
kimberlylie99 0:b97c07227845 73 //reset back to normal
kimberlylie99 0:b97c07227845 74 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
kimberlylie99 0:b97c07227845 75 }
kimberlylie99 0:b97c07227845 76
kimberlylie99 0:b97c07227845 77 //shut down BOD during power-down/deep sleep
kimberlylie99 0:b97c07227845 78 inline void BrownOut_ReducedPowerMode_Enable(void)
kimberlylie99 0:b97c07227845 79 {
kimberlylie99 0:b97c07227845 80 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
kimberlylie99 0:b97c07227845 81 }
kimberlylie99 0:b97c07227845 82
kimberlylie99 0:b97c07227845 83 //turn on BOD during power-down/deep sleep
kimberlylie99 0:b97c07227845 84 inline void BrownOut_ReducedPowerMode_Disable(void)
kimberlylie99 0:b97c07227845 85 {
kimberlylie99 0:b97c07227845 86 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
kimberlylie99 0:b97c07227845 87 }
kimberlylie99 0:b97c07227845 88
kimberlylie99 0:b97c07227845 89 //turn off brown out circutry
kimberlylie99 0:b97c07227845 90 inline void BrownOut_Global_Disable(void)
kimberlylie99 0:b97c07227845 91 {
kimberlylie99 0:b97c07227845 92 LPC_SC->PCON |= LPC1768_PCON_BOGD;
kimberlylie99 0:b97c07227845 93 }
kimberlylie99 0:b97c07227845 94
kimberlylie99 0:b97c07227845 95 //turn on brown out circutry
kimberlylie99 0:b97c07227845 96 inline void BrownOut_Global_Enable(void)
kimberlylie99 0:b97c07227845 97 {
kimberlylie99 0:b97c07227845 98 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
kimberlylie99 0:b97c07227845 99 }
kimberlylie99 0:b97c07227845 100
kimberlylie99 0:b97c07227845 101 //turn off brown out reset circutry
kimberlylie99 0:b97c07227845 102 inline void BrownOut_Reset_Disable(void)
kimberlylie99 0:b97c07227845 103 {
kimberlylie99 0:b97c07227845 104 LPC_SC->PCON |= LPC1768_PCON_BORD;
kimberlylie99 0:b97c07227845 105 }
kimberlylie99 0:b97c07227845 106
kimberlylie99 0:b97c07227845 107 //turn on brown outreset circutry
kimberlylie99 0:b97c07227845 108 inline void BrownOut_Reset_Enable(void)
kimberlylie99 0:b97c07227845 109 {
kimberlylie99 0:b97c07227845 110 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
kimberlylie99 0:b97c07227845 111 }
kimberlylie99 0:b97c07227845 112 //Peripheral Control Register
kimberlylie99 0:b97c07227845 113 // bit 0: Reserved
kimberlylie99 0:b97c07227845 114 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
kimberlylie99 0:b97c07227845 115 #define LPC1768_PCONP_PCTIM0 0x2
kimberlylie99 0:b97c07227845 116 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
kimberlylie99 0:b97c07227845 117 #define LPC1768_PCONP_PCTIM1 0x4
kimberlylie99 0:b97c07227845 118 // bit 3: PCUART0: UART 0 power/clock enable
kimberlylie99 0:b97c07227845 119 #define LPC1768_PCONP_PCUART0 0x8
kimberlylie99 0:b97c07227845 120 // bit 4: PCUART1: UART 1 power/clock enable
kimberlylie99 0:b97c07227845 121 #define LPC1768_PCONP_PCUART1 0x10
kimberlylie99 0:b97c07227845 122 // bit 5: Reserved
kimberlylie99 0:b97c07227845 123 // bit 6: PCPWM1: PWM 1 power/clock enable
kimberlylie99 0:b97c07227845 124 #define LPC1768_PCONP_PCPWM1 0x40
kimberlylie99 0:b97c07227845 125 // bit 7: PCI2C0: I2C interface 0 power/clock enable
kimberlylie99 0:b97c07227845 126 #define LPC1768_PCONP_PCI2C0 0x80
kimberlylie99 0:b97c07227845 127 // bit 8: PCSPI: SPI interface power/clock enable
kimberlylie99 0:b97c07227845 128 #define LPC1768_PCONP_PCSPI 0x100
kimberlylie99 0:b97c07227845 129 // bit 9: PCRTC: RTC power/clock enable
kimberlylie99 0:b97c07227845 130 #define LPC1768_PCONP_PCRTC 0x200
kimberlylie99 0:b97c07227845 131 // bit 10: PCSSP1: SSP interface 1 power/clock enable
kimberlylie99 0:b97c07227845 132 #define LPC1768_PCONP_PCSSP1 0x400
kimberlylie99 0:b97c07227845 133 // bit 11: Reserved
kimberlylie99 0:b97c07227845 134 // bit 12: PCADC: A/D converter power/clock enable
kimberlylie99 0:b97c07227845 135 #define LPC1768_PCONP_PCADC 0x1000
kimberlylie99 0:b97c07227845 136 // bit 13: PCCAN1: CAN controller 1 power/clock enable
kimberlylie99 0:b97c07227845 137 #define LPC1768_PCONP_PCCAN1 0x2000
kimberlylie99 0:b97c07227845 138 // bit 14: PCCAN2: CAN controller 2 power/clock enable
kimberlylie99 0:b97c07227845 139 #define LPC1768_PCONP_PCCAN2 0x4000
kimberlylie99 0:b97c07227845 140 // bit 15: PCGPIO: GPIOs power/clock enable
kimberlylie99 0:b97c07227845 141 #define LPC1768_PCONP_PCGPIO 0x8000
kimberlylie99 0:b97c07227845 142 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
kimberlylie99 0:b97c07227845 143 #define LPC1768_PCONP_PCRIT 0x10000
kimberlylie99 0:b97c07227845 144 // bit 17: PCMCPWM: Motor control PWM power/clock enable
kimberlylie99 0:b97c07227845 145 #define LPC1768_PCONP_PCMCPWM 0x20000
kimberlylie99 0:b97c07227845 146 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
kimberlylie99 0:b97c07227845 147 #define LPC1768_PCONP_PCQEI 0x40000
kimberlylie99 0:b97c07227845 148 // bit 19: PCI2C1: I2C interface 1 power/clock enable
kimberlylie99 0:b97c07227845 149 #define LPC1768_PCONP_PCI2C1 0x80000
kimberlylie99 0:b97c07227845 150 // bit 20: Reserved
kimberlylie99 0:b97c07227845 151 // bit 21: PCSSP0: SSP interface 0 power/clock enable
kimberlylie99 0:b97c07227845 152 #define LPC1768_PCONP_PCSSP0 0x200000
kimberlylie99 0:b97c07227845 153 // bit 22: PCTIM2: Timer 2 power/clock enable
kimberlylie99 0:b97c07227845 154 #define LPC1768_PCONP_PCTIM2 0x400000
kimberlylie99 0:b97c07227845 155 // bit 23: PCTIM3: Timer 3 power/clock enable
kimberlylie99 0:b97c07227845 156 #define LPC1768_PCONP_PCQTIM3 0x800000
kimberlylie99 0:b97c07227845 157 // bit 24: PCUART2: UART 2 power/clock enable
kimberlylie99 0:b97c07227845 158 #define LPC1768_PCONP_PCUART2 0x1000000
kimberlylie99 0:b97c07227845 159 // bit 25: PCUART3: UART 3 power/clock enable
kimberlylie99 0:b97c07227845 160 #define LPC1768_PCONP_PCUART3 0x2000000
kimberlylie99 0:b97c07227845 161 // bit 26: PCI2C2: I2C interface 2 power/clock enable
kimberlylie99 0:b97c07227845 162 #define LPC1768_PCONP_PCI2C2 0x4000000
kimberlylie99 0:b97c07227845 163 // bit 27: PCI2S: I2S interface power/clock enable
kimberlylie99 0:b97c07227845 164 #define LPC1768_PCONP_PCI2S 0x8000000
kimberlylie99 0:b97c07227845 165 // bit 28: Reserved
kimberlylie99 0:b97c07227845 166 // bit 29: PCGPDMA: GP DMA function power/clock enable
kimberlylie99 0:b97c07227845 167 #define LPC1768_PCONP_PCGPDMA 0x20000000
kimberlylie99 0:b97c07227845 168 // bit 30: PCENET: Ethernet block power/clock enable
kimberlylie99 0:b97c07227845 169 #define LPC1768_PCONP_PCENET 0x40000000
kimberlylie99 0:b97c07227845 170 // bit 31: PCUSB: USB interface power/clock enable
kimberlylie99 0:b97c07227845 171 #define LPC1768_PCONP_PCUSB 0x80000000
kimberlylie99 0:b97c07227845 172
kimberlylie99 0:b97c07227845 173 //Powers Up specified Peripheral(s)
kimberlylie99 0:b97c07227845 174 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
kimberlylie99 0:b97c07227845 175 {
kimberlylie99 0:b97c07227845 176 return LPC_SC->PCONP |= bitMask;
kimberlylie99 0:b97c07227845 177 }
kimberlylie99 0:b97c07227845 178
kimberlylie99 0:b97c07227845 179 //Powers Down specified Peripheral(s)
kimberlylie99 0:b97c07227845 180 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
kimberlylie99 0:b97c07227845 181 {
kimberlylie99 0:b97c07227845 182 return LPC_SC->PCONP &= ~bitMask;
kimberlylie99 0:b97c07227845 183 }
kimberlylie99 0:b97c07227845 184
kimberlylie99 0:b97c07227845 185 //returns if the peripheral is on or off
kimberlylie99 0:b97c07227845 186 inline bool Peripheral_GetStatus(unsigned int peripheral)
kimberlylie99 0:b97c07227845 187 {
kimberlylie99 0:b97c07227845 188 return (LPC_SC->PCONP & peripheral) ? true : false;
kimberlylie99 0:b97c07227845 189 }
kimberlylie99 0:b97c07227845 190
kimberlylie99 0:b97c07227845 191 #endif