Kenji Arai / mbed-os_TYBLE16

Dependents:   TYBLE16_simple_data_logger TYBLE16_MP3_Air

Committer:
kenjiArai
Date:
Tue Dec 31 06:02:27 2019 +0000
Revision:
1:9db0e321a9f4
Parent:
0:5b88d5760320
updated based on mbed-os5.15.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 0:5b88d5760320 1 /* mbed Microcontroller Library
kenjiArai 0:5b88d5760320 2 * Copyright (c) 2018 ARM Limited
kenjiArai 0:5b88d5760320 3 *
kenjiArai 0:5b88d5760320 4 * Licensed under the Apache License, Version 2.0 (the "License");
kenjiArai 0:5b88d5760320 5 * you may not use this file except in compliance with the License.
kenjiArai 0:5b88d5760320 6 * You may obtain a copy of the License at
kenjiArai 0:5b88d5760320 7 *
kenjiArai 0:5b88d5760320 8 * http://www.apache.org/licenses/LICENSE-2.0
kenjiArai 0:5b88d5760320 9 *
kenjiArai 0:5b88d5760320 10 * Unless required by applicable law or agreed to in writing, software
kenjiArai 0:5b88d5760320 11 * distributed under the License is distributed on an "AS IS" BASIS,
kenjiArai 0:5b88d5760320 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kenjiArai 0:5b88d5760320 13 * See the License for the specific language governing permissions and
kenjiArai 0:5b88d5760320 14 * limitations under the License.
kenjiArai 0:5b88d5760320 15 */
kenjiArai 0:5b88d5760320 16 #include "hal/mpu_api.h"
kenjiArai 0:5b88d5760320 17 #include "platform/mbed_assert.h"
kenjiArai 0:5b88d5760320 18 #include "cmsis.h"
kenjiArai 0:5b88d5760320 19
kenjiArai 0:5b88d5760320 20 #if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_6M__ == 1U)) && \
kenjiArai 0:5b88d5760320 21 defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) && \
kenjiArai 0:5b88d5760320 22 !defined(MBED_MPU_CUSTOM)
kenjiArai 0:5b88d5760320 23
kenjiArai 0:5b88d5760320 24 #if !DEVICE_MPU
kenjiArai 0:5b88d5760320 25 #error "Device has v7m MPU but it is not enabled. Add 'MPU' to device_has in targets.json"
kenjiArai 0:5b88d5760320 26 #endif
kenjiArai 0:5b88d5760320 27
kenjiArai 0:5b88d5760320 28 #ifdef MBED_CONF_TARGET_MPU_ROM_END
kenjiArai 0:5b88d5760320 29 #define MBED_MPU_ROM_END MBED_CONF_TARGET_MPU_ROM_END
kenjiArai 0:5b88d5760320 30 #else
kenjiArai 0:5b88d5760320 31 #define MBED_MPU_ROM_END (0x10000000 - 1)
kenjiArai 0:5b88d5760320 32 #endif
kenjiArai 0:5b88d5760320 33 #define MBED_MPU_RAM_START (MBED_MPU_ROM_END + 1)
kenjiArai 0:5b88d5760320 34
kenjiArai 0:5b88d5760320 35 MBED_STATIC_ASSERT(
kenjiArai 0:5b88d5760320 36 MBED_MPU_ROM_END == 0x04000000 - 1 ||
kenjiArai 0:5b88d5760320 37 MBED_MPU_ROM_END == 0x08000000 - 1 ||
kenjiArai 0:5b88d5760320 38 MBED_MPU_ROM_END == 0x0C000000 - 1 ||
kenjiArai 0:5b88d5760320 39 MBED_MPU_ROM_END == 0x10000000 - 1 ||
kenjiArai 0:5b88d5760320 40 MBED_MPU_ROM_END == 0x14000000 - 1 ||
kenjiArai 0:5b88d5760320 41 MBED_MPU_ROM_END == 0x18000000 - 1 ||
kenjiArai 0:5b88d5760320 42 MBED_MPU_ROM_END == 0x1C000000 - 1 ||
kenjiArai 0:5b88d5760320 43 MBED_MPU_ROM_END == 0x20000000 - 1,
kenjiArai 0:5b88d5760320 44 "Unsupported value for MBED_MPU_ROM_END");
kenjiArai 0:5b88d5760320 45
kenjiArai 0:5b88d5760320 46 void mbed_mpu_init()
kenjiArai 0:5b88d5760320 47 {
kenjiArai 0:5b88d5760320 48 // Flush memory writes before configuring the MPU.
kenjiArai 0:5b88d5760320 49 __DMB();
kenjiArai 0:5b88d5760320 50
kenjiArai 0:5b88d5760320 51 const uint32_t regions = (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos;
kenjiArai 0:5b88d5760320 52
kenjiArai 0:5b88d5760320 53 // Our MPU setup requires 3 or 4 regions - if this assert is hit, remove
kenjiArai 0:5b88d5760320 54 // a region by setting MPU_ROM_END to 0x1fffffff, or remove MPU from device_has
kenjiArai 0:5b88d5760320 55 #if MBED_MPU_RAM_START == 0x20000000
kenjiArai 0:5b88d5760320 56 MBED_ASSERT(regions >= 3);
kenjiArai 0:5b88d5760320 57 #else
kenjiArai 0:5b88d5760320 58 MBED_ASSERT(regions >= 4);
kenjiArai 0:5b88d5760320 59 #endif
kenjiArai 0:5b88d5760320 60
kenjiArai 0:5b88d5760320 61 // Disable the MCU
kenjiArai 0:5b88d5760320 62 MPU->CTRL = 0;
kenjiArai 0:5b88d5760320 63
kenjiArai 0:5b88d5760320 64 // Reset all mapping
kenjiArai 0:5b88d5760320 65 for (uint32_t i = 0; i < regions; i++) {
kenjiArai 0:5b88d5760320 66 ARM_MPU_ClrRegion(i);
kenjiArai 0:5b88d5760320 67 }
kenjiArai 0:5b88d5760320 68
kenjiArai 0:5b88d5760320 69 /*
kenjiArai 0:5b88d5760320 70 * ARMv6m and ARMv7-M memory map:
kenjiArai 0:5b88d5760320 71 *
kenjiArai 0:5b88d5760320 72 * Start End Name Executable by default Mbed MPU protection
kenjiArai 0:5b88d5760320 73 * 0x00000000 - 0x1FFFFFFF Code Yes Write disabled for first portion and execute disabled for the rest
kenjiArai 0:5b88d5760320 74 * 0x20000000 - 0x3FFFFFFF SRAM Yes Execute disabled
kenjiArai 0:5b88d5760320 75 * 0x40000000 - 0x5FFFFFFF Peripheral No
kenjiArai 0:5b88d5760320 76 * 0x60000000 - 0x7FFFFFFF RAM Yes Execute disabled
kenjiArai 0:5b88d5760320 77 * 0x80000000 - 0x9FFFFFFF RAM Yes Execute disabled
kenjiArai 0:5b88d5760320 78 * 0xA0000000 - 0xBFFFFFFF Device No
kenjiArai 0:5b88d5760320 79 * 0xC0000000 - 0xDFFFFFFF Device No
kenjiArai 0:5b88d5760320 80 * 0xE0000000 - 0xFFFFFFFF System No
kenjiArai 0:5b88d5760320 81 */
kenjiArai 0:5b88d5760320 82
kenjiArai 0:5b88d5760320 83 // Select region 0 and use it for the WT read-only rom region
kenjiArai 0:5b88d5760320 84 // - Code 0x00000000 to MBED_MPU_ROM_END
kenjiArai 0:5b88d5760320 85 ARM_MPU_SetRegion(
kenjiArai 0:5b88d5760320 86 ARM_MPU_RBAR(
kenjiArai 0:5b88d5760320 87 0, // Region
kenjiArai 0:5b88d5760320 88 0x00000000), // Base
kenjiArai 0:5b88d5760320 89 ARM_MPU_RASR(
kenjiArai 0:5b88d5760320 90 0, // DisableExec
kenjiArai 0:5b88d5760320 91 ARM_MPU_AP_RO, // AccessPermission
kenjiArai 0:5b88d5760320 92 0, // TypeExtField
kenjiArai 0:5b88d5760320 93 0, // IsShareable
kenjiArai 0:5b88d5760320 94 1, // IsCacheable
kenjiArai 0:5b88d5760320 95 0, // IsBufferable
kenjiArai 0:5b88d5760320 96 // SubRegionDisable - based on where ROM ends
kenjiArai 0:5b88d5760320 97 ((MBED_MPU_ROM_END >= 0x00000000) ? 0 : (1 << 0)) | // 0 to enable, 1 << n to disable
kenjiArai 0:5b88d5760320 98 ((MBED_MPU_ROM_END >= 0x04000000) ? 0 : (1 << 1)) |
kenjiArai 0:5b88d5760320 99 ((MBED_MPU_ROM_END >= 0x08000000) ? 0 : (1 << 2)) |
kenjiArai 0:5b88d5760320 100 ((MBED_MPU_ROM_END >= 0x0C000000) ? 0 : (1 << 3)) |
kenjiArai 0:5b88d5760320 101 ((MBED_MPU_ROM_END >= 0x10000000) ? 0 : (1 << 4)) |
kenjiArai 0:5b88d5760320 102 ((MBED_MPU_ROM_END >= 0x14000000) ? 0 : (1 << 5)) |
kenjiArai 0:5b88d5760320 103 ((MBED_MPU_ROM_END >= 0x18000000) ? 0 : (1 << 6)) |
kenjiArai 0:5b88d5760320 104 ((MBED_MPU_ROM_END >= 0x1C000000) ? 0 : (1 << 7)),
kenjiArai 0:5b88d5760320 105 ARM_MPU_REGION_SIZE_512MB) // Size
kenjiArai 0:5b88d5760320 106 );
kenjiArai 0:5b88d5760320 107
kenjiArai 0:5b88d5760320 108 #if MBED_MPU_RAM_START < 0x20000000
kenjiArai 0:5b88d5760320 109 // Select region 3 and use it for a WT ram region in the Code area
kenjiArai 0:5b88d5760320 110 // - Code MBED_MPU_ROM_END + 1 to 0x1FFFFFFF
kenjiArai 0:5b88d5760320 111 ARM_MPU_SetRegion(
kenjiArai 0:5b88d5760320 112 ARM_MPU_RBAR(
kenjiArai 0:5b88d5760320 113 3, // Region
kenjiArai 0:5b88d5760320 114 0x00000000), // Base
kenjiArai 0:5b88d5760320 115 ARM_MPU_RASR(
kenjiArai 0:5b88d5760320 116 1, // DisableExec
kenjiArai 0:5b88d5760320 117 ARM_MPU_AP_FULL, // AccessPermission
kenjiArai 0:5b88d5760320 118 0, // TypeExtField
kenjiArai 0:5b88d5760320 119 0, // IsShareable
kenjiArai 0:5b88d5760320 120 1, // IsCacheable
kenjiArai 0:5b88d5760320 121 0, // IsBufferable
kenjiArai 0:5b88d5760320 122 // SubRegionDisable - based on where RAM starts
kenjiArai 0:5b88d5760320 123 ((MBED_MPU_RAM_START <= 0x04000000) ? 0 : (1 << 0)) | // 0 to enable, 1 << n to disable
kenjiArai 0:5b88d5760320 124 ((MBED_MPU_RAM_START <= 0x08000000) ? 0 : (1 << 1)) |
kenjiArai 0:5b88d5760320 125 ((MBED_MPU_RAM_START <= 0x0C000000) ? 0 : (1 << 2)) |
kenjiArai 0:5b88d5760320 126 ((MBED_MPU_RAM_START <= 0x10000000) ? 0 : (1 << 3)) |
kenjiArai 0:5b88d5760320 127 ((MBED_MPU_RAM_START <= 0x14000000) ? 0 : (1 << 4)) |
kenjiArai 0:5b88d5760320 128 ((MBED_MPU_RAM_START <= 0x18000000) ? 0 : (1 << 5)) |
kenjiArai 0:5b88d5760320 129 ((MBED_MPU_RAM_START <= 0x1C000000) ? 0 : (1 << 6)) |
kenjiArai 0:5b88d5760320 130 ((MBED_MPU_RAM_START <= 0x20000000) ? 0 : (1 << 7)),
kenjiArai 0:5b88d5760320 131 ARM_MPU_REGION_SIZE_512MB) // Size
kenjiArai 0:5b88d5760320 132 );
kenjiArai 0:5b88d5760320 133 #define LAST_RAM_REGION 3
kenjiArai 0:5b88d5760320 134 #else
kenjiArai 0:5b88d5760320 135 #define LAST_RAM_REGION 2
kenjiArai 0:5b88d5760320 136 #endif
kenjiArai 0:5b88d5760320 137
kenjiArai 0:5b88d5760320 138 // Select region 1 and use it for WBWA ram regions
kenjiArai 0:5b88d5760320 139 // - SRAM 0x20000000 to 0x3FFFFFFF
kenjiArai 0:5b88d5760320 140 // - RAM 0x60000000 to 0x7FFFFFFF
kenjiArai 0:5b88d5760320 141 ARM_MPU_SetRegion(
kenjiArai 0:5b88d5760320 142 ARM_MPU_RBAR(
kenjiArai 0:5b88d5760320 143 1, // Region
kenjiArai 0:5b88d5760320 144 0x00000000), // Base
kenjiArai 0:5b88d5760320 145 ARM_MPU_RASR(
kenjiArai 0:5b88d5760320 146 1, // DisableExec
kenjiArai 0:5b88d5760320 147 ARM_MPU_AP_FULL, // AccessPermission
kenjiArai 0:5b88d5760320 148 1, // TypeExtField
kenjiArai 0:5b88d5760320 149 0, // IsShareable
kenjiArai 0:5b88d5760320 150 1, // IsCacheable
kenjiArai 0:5b88d5760320 151 1, // IsBufferable
kenjiArai 0:5b88d5760320 152 // SubRegionDisable
kenjiArai 0:5b88d5760320 153 (1 << 0) | // Disable Sub-region
kenjiArai 0:5b88d5760320 154 (0 << 1) | // Enable Sub-region SRAM 0x20000000 - 0x3FFFFFFF
kenjiArai 0:5b88d5760320 155 (1 << 2) | // Disable Sub-region
kenjiArai 0:5b88d5760320 156 (0 << 3) | // Enable Sub-region RAM 0x60000000 - 0x7FFFFFFF
kenjiArai 0:5b88d5760320 157 (1 << 4) | // Disable Sub-region
kenjiArai 0:5b88d5760320 158 (1 << 5) | // Disable Sub-region
kenjiArai 0:5b88d5760320 159 (1 << 6) | // Disable Sub-region
kenjiArai 0:5b88d5760320 160 (1 << 7), // Disable Sub-region
kenjiArai 0:5b88d5760320 161 ARM_MPU_REGION_SIZE_4GB) // Size
kenjiArai 0:5b88d5760320 162 );
kenjiArai 0:5b88d5760320 163
kenjiArai 0:5b88d5760320 164 // Select region 2 and use it for the WT ram region
kenjiArai 0:5b88d5760320 165 // - RAM 0x80000000 to 0x9FFFFFFF
kenjiArai 0:5b88d5760320 166 ARM_MPU_SetRegion(
kenjiArai 0:5b88d5760320 167 ARM_MPU_RBAR(
kenjiArai 0:5b88d5760320 168 2, // Region
kenjiArai 0:5b88d5760320 169 0x80000000), // Base
kenjiArai 0:5b88d5760320 170 ARM_MPU_RASR(
kenjiArai 0:5b88d5760320 171 1, // DisableExec
kenjiArai 0:5b88d5760320 172 ARM_MPU_AP_FULL, // AccessPermission
kenjiArai 0:5b88d5760320 173 0, // TypeExtField
kenjiArai 0:5b88d5760320 174 0, // IsShareable
kenjiArai 0:5b88d5760320 175 1, // IsCacheable
kenjiArai 0:5b88d5760320 176 0, // IsBufferable
kenjiArai 0:5b88d5760320 177 0U, // SubRegionDisable
kenjiArai 0:5b88d5760320 178 ARM_MPU_REGION_SIZE_512MB) // Size
kenjiArai 0:5b88d5760320 179 );
kenjiArai 0:5b88d5760320 180
kenjiArai 0:5b88d5760320 181 // Enable the MPU
kenjiArai 0:5b88d5760320 182 MPU->CTRL =
kenjiArai 0:5b88d5760320 183 (1 << MPU_CTRL_PRIVDEFENA_Pos) | // Use the default memory map for unmapped addresses
kenjiArai 0:5b88d5760320 184 (1 << MPU_CTRL_HFNMIENA_Pos) | // Keep MPU turned on for faults
kenjiArai 0:5b88d5760320 185 (1 << MPU_CTRL_ENABLE_Pos); // Enable MPU
kenjiArai 0:5b88d5760320 186
kenjiArai 0:5b88d5760320 187 // Ensure changes take effect
kenjiArai 0:5b88d5760320 188 __DSB();
kenjiArai 0:5b88d5760320 189 __ISB();
kenjiArai 0:5b88d5760320 190 }
kenjiArai 0:5b88d5760320 191
kenjiArai 0:5b88d5760320 192 void mbed_mpu_free()
kenjiArai 0:5b88d5760320 193 {
kenjiArai 0:5b88d5760320 194 // Flush memory writes before configuring the MPU.
kenjiArai 0:5b88d5760320 195 __DMB();
kenjiArai 0:5b88d5760320 196
kenjiArai 0:5b88d5760320 197 // Disable the MPU
kenjiArai 0:5b88d5760320 198 MPU->CTRL = 0;
kenjiArai 0:5b88d5760320 199
kenjiArai 0:5b88d5760320 200 // Ensure changes take effect
kenjiArai 0:5b88d5760320 201 __DSB();
kenjiArai 0:5b88d5760320 202 __ISB();
kenjiArai 0:5b88d5760320 203 }
kenjiArai 0:5b88d5760320 204
kenjiArai 0:5b88d5760320 205 static void enable_region(bool enable, uint32_t region)
kenjiArai 0:5b88d5760320 206 {
kenjiArai 0:5b88d5760320 207 MPU->RNR = region;
kenjiArai 0:5b88d5760320 208 MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable << MPU_RASR_ENABLE_Pos);
kenjiArai 0:5b88d5760320 209 }
kenjiArai 0:5b88d5760320 210
kenjiArai 0:5b88d5760320 211 void mbed_mpu_enable_rom_wn(bool enable)
kenjiArai 0:5b88d5760320 212 {
kenjiArai 0:5b88d5760320 213 // Flush memory writes before configuring the MPU.
kenjiArai 0:5b88d5760320 214 __DMB();
kenjiArai 0:5b88d5760320 215
kenjiArai 0:5b88d5760320 216 enable_region(enable, 0);
kenjiArai 0:5b88d5760320 217
kenjiArai 0:5b88d5760320 218 // Ensure changes take effect
kenjiArai 0:5b88d5760320 219 __DSB();
kenjiArai 0:5b88d5760320 220 __ISB();
kenjiArai 0:5b88d5760320 221 }
kenjiArai 0:5b88d5760320 222
kenjiArai 0:5b88d5760320 223 void mbed_mpu_enable_ram_xn(bool enable)
kenjiArai 0:5b88d5760320 224 {
kenjiArai 0:5b88d5760320 225 // Flush memory writes before configuring the MPU.
kenjiArai 0:5b88d5760320 226 __DMB();
kenjiArai 0:5b88d5760320 227
kenjiArai 0:5b88d5760320 228 for (uint32_t region = 1; region <= LAST_RAM_REGION; region++) {
kenjiArai 0:5b88d5760320 229 enable_region(enable, region);
kenjiArai 0:5b88d5760320 230 }
kenjiArai 0:5b88d5760320 231
kenjiArai 0:5b88d5760320 232 // Ensure changes take effect
kenjiArai 0:5b88d5760320 233 __DSB();
kenjiArai 0:5b88d5760320 234 __ISB();
kenjiArai 0:5b88d5760320 235 }
kenjiArai 0:5b88d5760320 236
kenjiArai 0:5b88d5760320 237 #endif