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Dependents: TYBLE16_simple_data_logger TYBLE16_MP3_Air
Diff: drivers/QSPI.h
- Revision:
- 1:9db0e321a9f4
- Parent:
- 0:5b88d5760320
--- a/drivers/QSPI.h Tue Dec 17 23:23:45 2019 +0000
+++ b/drivers/QSPI.h Tue Dec 31 06:02:27 2019 +0000
@@ -28,9 +28,22 @@
#define ONE_MHZ 1000000
+#define QSPI_NO_INST (-1)
+
namespace mbed {
+/** \defgroup drivers-public-api-spi SPI
+ * \ingroup drivers-public-api
+ */
-/** \addtogroup drivers */
+/**
+ * \defgroup drivers_QSPI QSPI class
+ * \ingroup drivers-public-api-spi
+ * @{
+ */
+
+/** Type representing a QSPI instruction
+ */
+typedef int qspi_inst_t;
/** A QSPI Driver, used for communicating with QSPI slave devices
*
@@ -69,7 +82,6 @@
*
* }
* @endcode
- * @ingroup drivers
*/
class QSPI : private NonCopyable<QSPI> {
@@ -90,6 +102,19 @@
*
*/
QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel = NC, int mode = 0);
+
+ /** Create a QSPI master connected to the specified pins
+ *
+ * io0-io3 is used to specify the Pins used for Quad SPI mode
+ *
+ * @param pinmap reference to structure which holds static pinmap
+ * @param mode Clock polarity and phase mode (0 - 3) of SPI
+ * (Default: Mode=0 uses CPOL=0, CPHA=0, Mode=1 uses CPOL=1, CPHA=1)
+ *
+ */
+ QSPI(const qspi_pinmap_t &pinmap, int mode = 0);
+ QSPI(const qspi_pinmap_t &&, int = 0) = delete; // prevent passing of temporary objects
+
virtual ~QSPI()
{
}
@@ -100,7 +125,7 @@
* @param address_width Bus width used by address phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD)
* @param address_size Size in bits used by address phase(Valid values are QSPI_CFG_ADDR_SIZE_8, QSPI_CFG_ADDR_SIZE_16, QSPI_CFG_ADDR_SIZE_24, QSPI_CFG_ADDR_SIZE_32)
* @param alt_width Bus width used by alt phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD)
- * @param alt_size Size in bits used by alt phase(Valid values are QSPI_CFG_ALT_SIZE_8, QSPI_CFG_ALT_SIZE_16, QSPI_CFG_ALT_SIZE_24, QSPI_CFG_ALT_SIZE_32)
+ * @param alt_size Size in bits used by alt phase (must be a multiple of the number of bus lines indicated in alt_width)
* @param data_width Bus width used by data phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD)
* @param dummy_cycles Number of dummy clock cycles to be used after alt phase
*
@@ -145,7 +170,7 @@
/** Read from QSPI peripheral using custom read instruction, alt values
*
- * @param instruction Instruction value to be used in instruction phase
+ * @param instruction Instruction value to be used in instruction phase. Use QSPI_NO_INST to skip the instruction phase
* @param alt Alt value to be used in Alternate-byte phase. Use -1 for ignoring Alternate-byte phase
* @param address Address to be accessed in QSPI peripheral
* @param rx_buffer Buffer for data to be read from the peripheral
@@ -154,11 +179,11 @@
* @returns
* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
*/
- qspi_status_t read(int instruction, int alt, int address, char *rx_buffer, size_t *rx_length);
+ qspi_status_t read(qspi_inst_t instruction, int alt, int address, char *rx_buffer, size_t *rx_length);
/** Write to QSPI peripheral using custom write instruction, alt values
*
- * @param instruction Instruction value to be used in instruction phase
+ * @param instruction Instruction value to be used in instruction phase. Use QSPI_NO_INST to skip the instruction phase
* @param alt Alt value to be used in Alternate-byte phase. Use -1 for ignoring Alternate-byte phase
* @param address Address to be accessed in QSPI peripheral
* @param tx_buffer Buffer containing data to be sent to peripheral
@@ -167,11 +192,11 @@
* @returns
* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
*/
- qspi_status_t write(int instruction, int alt, int address, const char *tx_buffer, size_t *tx_length);
+ qspi_status_t write(qspi_inst_t instruction, int alt, int address, const char *tx_buffer, size_t *tx_length);
/** Perform a transaction to write to an address(a control register) and get the status results
*
- * @param instruction Instruction value to be used in instruction phase
+ * @param instruction Instruction value to be used in instruction phase. Use QSPI_NO_INST to skip the instruction phase
* @param address Some instruction might require address. Use -1 if no address
* @param tx_buffer Buffer containing data to be sent to peripheral
* @param tx_length Pointer to a variable containing the length of data to be transmitted, and on return this variable will be updated with the actual number of bytes written
@@ -181,7 +206,7 @@
* @returns
* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
*/
- qspi_status_t command_transfer(int instruction, int address, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length);
+ qspi_status_t command_transfer(qspi_inst_t instruction, int address, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length);
#if !defined(DOXYGEN_ONLY)
protected:
@@ -210,6 +235,8 @@
int _mode; //SPI mode
bool _initialized;
PinName _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs; //IO lines, clock and chip select
+ const qspi_pinmap_t *_static_pinmap;
+ bool (QSPI::* _init_func)(void);
private:
/* Private acquire function without locking/unlocking
@@ -217,14 +244,17 @@
*/
bool _acquire(void);
bool _initialize();
+ bool _initialize_direct();
/*
* This function builds the qspi command struct to be send to Hal
*/
- inline void _build_qspi_command(int instruction, int address, int alt);
+ inline void _build_qspi_command(qspi_inst_t instruction, int address, int alt);
#endif
};
+/** @}*/
+
} // namespace mbed
#endif