Kenji Arai / mbed-os_TYBLE16

mbed-os5 only for TYBLE16

Dependents:   TYBLE16_simple_data_logger TYBLE16_MP3_Air

hal/spi_api.h@1:9db0e321a9f4, 2019-12-31 (annotated)

Committer:
kenjiArai
Date:
Tue Dec 31 06:02:27 2019 +0000
Revision:
1:9db0e321a9f4
Parent:
0:5b88d5760320 
updated based on mbed-os5.15.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 0:5b88d5760320 1
kenjiArai 0:5b88d5760320 2 /** \addtogroup hal */
kenjiArai 0:5b88d5760320 3 /** @{*/
kenjiArai 0:5b88d5760320 4 /* mbed Microcontroller Library
kenjiArai 0:5b88d5760320 5 * Copyright (c) 2006-2013 ARM Limited
kenjiArai 0:5b88d5760320 6 * SPDX-License-Identifier: Apache-2.0
kenjiArai 0:5b88d5760320 7 *
kenjiArai 0:5b88d5760320 8 * Licensed under the Apache License, Version 2.0 (the "License");
kenjiArai 0:5b88d5760320 9 * you may not use this file except in compliance with the License.
kenjiArai 0:5b88d5760320 10 * You may obtain a copy of the License at
kenjiArai 0:5b88d5760320 11 *
kenjiArai 0:5b88d5760320 12 * http://www.apache.org/licenses/LICENSE-2.0
kenjiArai 0:5b88d5760320 13 *
kenjiArai 0:5b88d5760320 14 * Unless required by applicable law or agreed to in writing, software
kenjiArai 0:5b88d5760320 15 * distributed under the License is distributed on an "AS IS" BASIS,
kenjiArai 0:5b88d5760320 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kenjiArai 0:5b88d5760320 17 * See the License for the specific language governing permissions and
kenjiArai 0:5b88d5760320 18 * limitations under the License.
kenjiArai 0:5b88d5760320 19 */
kenjiArai 0:5b88d5760320 20 #ifndef MBED_SPI_API_H
kenjiArai 0:5b88d5760320 21 #define MBED_SPI_API_H
kenjiArai 0:5b88d5760320 22
kenjiArai 0:5b88d5760320 23 #include "device.h"
kenjiArai 0:5b88d5760320 24 #include "pinmap.h"
kenjiArai 0:5b88d5760320 25 #include "hal/dma_api.h"
kenjiArai 0:5b88d5760320 26 #include "hal/buffer.h"
kenjiArai 0:5b88d5760320 27
kenjiArai 0:5b88d5760320 28 #if DEVICE_SPI
kenjiArai 0:5b88d5760320 29
kenjiArai 0:5b88d5760320 30 #define SPI_EVENT_ERROR (1 << 1)
kenjiArai 0:5b88d5760320 31 #define SPI_EVENT_COMPLETE (1 << 2)
kenjiArai 0:5b88d5760320 32 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
kenjiArai 0:5b88d5760320 33 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
kenjiArai 0:5b88d5760320 34
kenjiArai 0:5b88d5760320 35 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
kenjiArai 0:5b88d5760320 36
kenjiArai 0:5b88d5760320 37 #define SPI_FILL_WORD (0xFFFF)
kenjiArai 0:5b88d5760320 38 #define SPI_FILL_CHAR (0xFF)
kenjiArai 0:5b88d5760320 39
kenjiArai 0:5b88d5760320 40 #if DEVICE_SPI_ASYNCH
kenjiArai 0:5b88d5760320 41 /** Asynch SPI HAL structure
kenjiArai 0:5b88d5760320 42 */
kenjiArai 0:5b88d5760320 43 typedef struct {
kenjiArai 0:5b88d5760320 44 struct spi_s spi; /**< Target specific SPI structure */
kenjiArai 0:5b88d5760320 45 struct buffer_s tx_buff; /**< Tx buffer */
kenjiArai 0:5b88d5760320 46 struct buffer_s rx_buff; /**< Rx buffer */
kenjiArai 0:5b88d5760320 47 } spi_t;
kenjiArai 0:5b88d5760320 48
kenjiArai 0:5b88d5760320 49 #else
kenjiArai 0:5b88d5760320 50 /** Non-asynch SPI HAL structure
kenjiArai 0:5b88d5760320 51 */
kenjiArai 0:5b88d5760320 52 typedef struct spi_s spi_t;
kenjiArai 0:5b88d5760320 53
kenjiArai 0:5b88d5760320 54 #endif
kenjiArai 0:5b88d5760320 55
kenjiArai 1:9db0e321a9f4 56 typedef struct {
kenjiArai 1:9db0e321a9f4 57 int peripheral;
kenjiArai 1:9db0e321a9f4 58 PinName mosi_pin;
kenjiArai 1:9db0e321a9f4 59 int mosi_function;
kenjiArai 1:9db0e321a9f4 60 PinName miso_pin;
kenjiArai 1:9db0e321a9f4 61 int miso_function;
kenjiArai 1:9db0e321a9f4 62 PinName sclk_pin;
kenjiArai 1:9db0e321a9f4 63 int sclk_function;
kenjiArai 1:9db0e321a9f4 64 PinName ssel_pin;
kenjiArai 1:9db0e321a9f4 65 int ssel_function;
kenjiArai 1:9db0e321a9f4 66 } spi_pinmap_t;
kenjiArai 1:9db0e321a9f4 67
kenjiArai 1:9db0e321a9f4 68 /**
kenjiArai 1:9db0e321a9f4 69 * Describes the capabilities of a SPI peripherals
kenjiArai 1:9db0e321a9f4 70 */
kenjiArai 1:9db0e321a9f4 71 typedef struct {
kenjiArai 1:9db0e321a9f4 72 /** Minimum frequency supported must be set by target device and it will be assessed during
kenjiArai 1:9db0e321a9f4 73 * testing.
kenjiArai 1:9db0e321a9f4 74 */
kenjiArai 1:9db0e321a9f4 75 uint32_t minimum_frequency;
kenjiArai 1:9db0e321a9f4 76 /** Maximum frequency supported must be set by target device and it will be assessed during
kenjiArai 1:9db0e321a9f4 77 * testing.
kenjiArai 1:9db0e321a9f4 78 */
kenjiArai 1:9db0e321a9f4 79 uint32_t maximum_frequency;
kenjiArai 1:9db0e321a9f4 80 /** Each bit represents the corresponding word length. lsb => 1bit, msb => 32bit. */
kenjiArai 1:9db0e321a9f4 81 uint32_t word_length;
kenjiArai 1:9db0e321a9f4 82 uint16_t slave_delay_between_symbols_ns; /**< specifies required number of ns between transmission of successive symbols in slave mode. */
kenjiArai 1:9db0e321a9f4 83 uint8_t clk_modes; /**< specifies supported modes from spi_mode_t. Each bit represents the corresponding mode. */
kenjiArai 1:9db0e321a9f4 84 bool support_slave_mode; /**< If true, the device can handle SPI slave mode using hardware management on the specified ssel pin. */
kenjiArai 1:9db0e321a9f4 85 bool hw_cs_handle; /**< If true, in SPI master mode Chip Select can be handled by hardware. */
kenjiArai 1:9db0e321a9f4 86 bool async_mode; /**< If true, in async mode is supported. */
kenjiArai 1:9db0e321a9f4 87
kenjiArai 1:9db0e321a9f4 88 } spi_capabilities_t;
kenjiArai 1:9db0e321a9f4 89
kenjiArai 0:5b88d5760320 90 #ifdef __cplusplus
kenjiArai 0:5b88d5760320 91 extern "C" {
kenjiArai 0:5b88d5760320 92 #endif
kenjiArai 0:5b88d5760320 93
kenjiArai 0:5b88d5760320 94 /**
kenjiArai 0:5b88d5760320 95 * \defgroup hal_GeneralSPI SPI Configuration Functions
kenjiArai 1:9db0e321a9f4 96 *
kenjiArai 1:9db0e321a9f4 97 * # Defined behavior
kenjiArai 1:9db0e321a9f4 98 * * ::spi_init initializes the spi_t control structure
kenjiArai 1:9db0e321a9f4 99 * * ::spi_init configures the pins used by SPI
kenjiArai 1:9db0e321a9f4 100 * * ::spi_get_capabilities() fills the given `spi_capabilities_t` instance
kenjiArai 1:9db0e321a9f4 101 * * ::spi_get_capabilities() should consider the `ssel` pin when evaluation the `support_slave_mode` and `hw_cs_handle` capability
kenjiArai 1:9db0e321a9f4 102 * * ::spi_get_capabilities(): if the given `ssel` pin cannot be managed by hardware, `support_slave_mode` and `hw_cs_handle` should be false
kenjiArai 1:9db0e321a9f4 103 * * At least a symbol width of 8bit must be supported
kenjiArai 1:9db0e321a9f4 104 * * The supported frequency range must include the range [0.2..2] MHz
kenjiArai 1:9db0e321a9f4 105 * * ::spi_free returns the pins owned by the SPI object to their reset state
kenjiArai 1:9db0e321a9f4 106 * * ::spi_format sets the number of bits per frame
kenjiArai 1:9db0e321a9f4 107 * * ::spi_format configures clock polarity and phase
kenjiArai 1:9db0e321a9f4 108 * * ::spi_format configures master/slave mode
kenjiArai 1:9db0e321a9f4 109 * * ::spi_frequency sets the SPI baud rate
kenjiArai 1:9db0e321a9f4 110 * * ::spi_master_write writes a symbol out in master mode and receives a symbol
kenjiArai 1:9db0e321a9f4 111 * * ::spi_master_block_write writes `tx_length` words to the bus
kenjiArai 1:9db0e321a9f4 112 * * ::spi_master_block_write reads `rx_length` words from the bus
kenjiArai 1:9db0e321a9f4 113 * * ::spi_master_block_write returns the maximum of tx_length and rx_length
kenjiArai 1:9db0e321a9f4 114 * * ::spi_master_block_write specifies the write_fill which is default data transmitted while performing a read
kenjiArai 1:9db0e321a9f4 115 * * ::spi_get_module returns non-zero if a value is available to read from SPI channel, 0 otherwise
kenjiArai 1:9db0e321a9f4 116 * * ::spi_slave_read returns a received value out of the SPI receive buffer in slave mode
kenjiArai 1:9db0e321a9f4 117 * * ::spi_slave_read blocks until a value is available
kenjiArai 1:9db0e321a9f4 118 * * ::spi_slave_write writes a value to the SPI peripheral in slave mode
kenjiArai 1:9db0e321a9f4 119 * * ::spi_slave_write blocks until the SPI peripheral can be written to
kenjiArai 1:9db0e321a9f4 120 * * ::spi_busy returns non-zero if the peripheral is currently transmitting, 0 otherwise
kenjiArai 1:9db0e321a9f4 121 * * ::spi_master_transfer starts the SPI asynchronous transfer
kenjiArai 1:9db0e321a9f4 122 * * ::spi_master_transfer writes `tx_len` words to the bus
kenjiArai 1:9db0e321a9f4 123 * * ::spi_master_transfer reads `rx_len` words from the bus
kenjiArai 1:9db0e321a9f4 124 * * ::spi_master_transfer specifies the bit width of buffer words
kenjiArai 1:9db0e321a9f4 125 * * The callback given to ::spi_master_transfer is invoked when the transfer completes (with a success or an error)
kenjiArai 1:9db0e321a9f4 126 * * ::spi_master_transfer specifies the logical OR of events to be registered
kenjiArai 1:9db0e321a9f4 127 * * The ::spi_master_transfer function may use the `DMAUsage` hint to select the appropriate async algorithm
kenjiArai 1:9db0e321a9f4 128 * * ::spi_irq_handler_asynch reads the received values out of the RX FIFO
kenjiArai 1:9db0e321a9f4 129 * * ::spi_irq_handler_asynch writes values into the TX FIFO
kenjiArai 1:9db0e321a9f4 130 * * ::spi_irq_handler_asynch checks for transfer termination conditions, such as buffer overflows or transfer complete
kenjiArai 1:9db0e321a9f4 131 * * ::spi_irq_handler_asynch returns event flags if a transfer termination condition was met, otherwise 0
kenjiArai 1:9db0e321a9f4 132 * * ::spi_abort_asynch aborts an on-going async transfer
kenjiArai 1:9db0e321a9f4 133 * * ::spi_active returns non-zero if the SPI port is active or zero if it is not
kenjiArai 1:9db0e321a9f4 134 *
kenjiArai 1:9db0e321a9f4 135 * # Undefined behavior
kenjiArai 1:9db0e321a9f4 136 * * Calling ::spi_init multiple times on the same `spi_t` without ::spi_free
kenjiArai 1:9db0e321a9f4 137 * * Calling any function other than ::spi_init on a non-initialized or freed `spi_t`
kenjiArai 1:9db0e321a9f4 138 * * Passing pins that cannot be on the same peripheral
kenjiArai 1:9db0e321a9f4 139 * * Passing an invalid pointer as `obj` to any function
kenjiArai 1:9db0e321a9f4 140 * * Passing an invalid pointer as `handler` to ::spi_master_transfer
kenjiArai 1:9db0e321a9f4 141 * * Calling ::spi_abort while no async transfer is being processed (no transfer or a synchronous transfer)
kenjiArai 1:9db0e321a9f4 142 *
kenjiArai 0:5b88d5760320 143 * @{
kenjiArai 0:5b88d5760320 144 */
kenjiArai 0:5b88d5760320 145
kenjiArai 1:9db0e321a9f4 146 /**
kenjiArai 1:9db0e321a9f4 147 * \defgroup hal_GeneralSPI_tests SPI hal tests
kenjiArai 1:9db0e321a9f4 148 * The SPI HAL tests ensure driver conformance to defined behaviour.
kenjiArai 1:9db0e321a9f4 149 *
kenjiArai 1:9db0e321a9f4 150 * To run the SPI hal tests use the command:
kenjiArai 1:9db0e321a9f4 151 *
kenjiArai 1:9db0e321a9f4 152 * mbed test -t <toolchain> -m <target> -n tests-mbed_hal_fpga_ci_test_shield-spi
kenjiArai 1:9db0e321a9f4 153 *
kenjiArai 1:9db0e321a9f4 154 */
kenjiArai 1:9db0e321a9f4 155
kenjiArai 0:5b88d5760320 156 #ifdef DEVICE_SPI_COUNT
kenjiArai 0:5b88d5760320 157 /**
kenjiArai 0:5b88d5760320 158 * Returns a variant of the SPIName enum uniquely identifying a SPI peripheral of the device.
kenjiArai 0:5b88d5760320 159 * @param[in] mosi The pin to use for MOSI
kenjiArai 0:5b88d5760320 160 * @param[in] miso The pin to use for MISO
kenjiArai 0:5b88d5760320 161 * @param[in] sclk The pin to use for SCLK
kenjiArai 0:5b88d5760320 162 * @return An SPI peripheral identifier
kenjiArai 0:5b88d5760320 163 */
kenjiArai 0:5b88d5760320 164 SPIName spi_get_peripheral_name(PinName mosi, PinName miso, PinName mclk);
kenjiArai 0:5b88d5760320 165 #endif
kenjiArai 0:5b88d5760320 166
kenjiArai 1:9db0e321a9f4 167 /**
kenjiArai 1:9db0e321a9f4 168 * Fills the given spi_capabilities_t structure with the capabilities of the given peripheral.
kenjiArai 1:9db0e321a9f4 169 */
kenjiArai 1:9db0e321a9f4 170 void spi_get_capabilities(PinName ssel, bool slave, spi_capabilities_t *cap);
kenjiArai 1:9db0e321a9f4 171
kenjiArai 1:9db0e321a9f4 172 /** Initialize the SPI peripheral
kenjiArai 1:9db0e321a9f4 173 *
kenjiArai 1:9db0e321a9f4 174 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
kenjiArai 1:9db0e321a9f4 175 * @param[out] obj The SPI object to initialize
kenjiArai 1:9db0e321a9f4 176 * @param[in] pinmap pointer to structure which holds static pinmap
kenjiArai 1:9db0e321a9f4 177 */
kenjiArai 1:9db0e321a9f4 178 void spi_init_direct(spi_t *obj, const spi_pinmap_t *pinmap);
kenjiArai 1:9db0e321a9f4 179
kenjiArai 0:5b88d5760320 180 /** Initialize the SPI peripheral
kenjiArai 0:5b88d5760320 181 *
kenjiArai 0:5b88d5760320 182 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
kenjiArai 0:5b88d5760320 183 * @param[out] obj The SPI object to initialize
kenjiArai 0:5b88d5760320 184 * @param[in] mosi The pin to use for MOSI
kenjiArai 0:5b88d5760320 185 * @param[in] miso The pin to use for MISO
kenjiArai 0:5b88d5760320 186 * @param[in] sclk The pin to use for SCLK
kenjiArai 0:5b88d5760320 187 * @param[in] ssel The pin to use for SSEL
kenjiArai 0:5b88d5760320 188 */
kenjiArai 0:5b88d5760320 189 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
kenjiArai 0:5b88d5760320 190
kenjiArai 0:5b88d5760320 191 /** Release a SPI object
kenjiArai 0:5b88d5760320 192 *
kenjiArai 0:5b88d5760320 193 * TODO: spi_free is currently unimplemented
kenjiArai 0:5b88d5760320 194 * This will require reference counting at the C++ level to be safe
kenjiArai 0:5b88d5760320 195 *
kenjiArai 0:5b88d5760320 196 * Return the pins owned by the SPI object to their reset state
kenjiArai 0:5b88d5760320 197 * Disable the SPI peripheral
kenjiArai 0:5b88d5760320 198 * Disable the SPI clock
kenjiArai 0:5b88d5760320 199 * @param[in] obj The SPI object to deinitialize
kenjiArai 0:5b88d5760320 200 */
kenjiArai 0:5b88d5760320 201 void spi_free(spi_t *obj);
kenjiArai 0:5b88d5760320 202
kenjiArai 0:5b88d5760320 203 /** Configure the SPI format
kenjiArai 0:5b88d5760320 204 *
kenjiArai 0:5b88d5760320 205 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
kenjiArai 0:5b88d5760320 206 * The default bit order is MSB.
kenjiArai 0:5b88d5760320 207 * @param[in,out] obj The SPI object to configure
kenjiArai 0:5b88d5760320 208 * @param[in] bits The number of bits per frame
kenjiArai 0:5b88d5760320 209 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
kenjiArai 0:5b88d5760320 210 * @param[in] slave Zero for master mode or non-zero for slave mode
kenjiArai 0:5b88d5760320 211 */
kenjiArai 0:5b88d5760320 212 void spi_format(spi_t *obj, int bits, int mode, int slave);
kenjiArai 0:5b88d5760320 213
kenjiArai 0:5b88d5760320 214 /** Set the SPI baud rate
kenjiArai 0:5b88d5760320 215 *
kenjiArai 0:5b88d5760320 216 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
kenjiArai 0:5b88d5760320 217 * Configures the SPI peripheral's baud rate
kenjiArai 0:5b88d5760320 218 * @param[in,out] obj The SPI object to configure
kenjiArai 0:5b88d5760320 219 * @param[in] hz The baud rate in Hz
kenjiArai 0:5b88d5760320 220 */
kenjiArai 0:5b88d5760320 221 void spi_frequency(spi_t *obj, int hz);
kenjiArai 0:5b88d5760320 222
kenjiArai 0:5b88d5760320 223 /**@}*/
kenjiArai 0:5b88d5760320 224 /**
kenjiArai 0:5b88d5760320 225 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
kenjiArai 0:5b88d5760320 226 * @{
kenjiArai 0:5b88d5760320 227 */
kenjiArai 0:5b88d5760320 228
kenjiArai 0:5b88d5760320 229 /** Write a byte out in master mode and receive a value
kenjiArai 0:5b88d5760320 230 *
kenjiArai 0:5b88d5760320 231 * @param[in] obj The SPI peripheral to use for sending
kenjiArai 0:5b88d5760320 232 * @param[in] value The value to send
kenjiArai 0:5b88d5760320 233 * @return Returns the value received during send
kenjiArai 0:5b88d5760320 234 */
kenjiArai 0:5b88d5760320 235 int spi_master_write(spi_t *obj, int value);
kenjiArai 0:5b88d5760320 236
kenjiArai 0:5b88d5760320 237 /** Write a block out in master mode and receive a value
kenjiArai 0:5b88d5760320 238 *
kenjiArai 0:5b88d5760320 239 * The total number of bytes sent and received will be the maximum of
kenjiArai 0:5b88d5760320 240 * tx_length and rx_length. The bytes written will be padded with the
kenjiArai 0:5b88d5760320 241 * value 0xff.
kenjiArai 0:5b88d5760320 242 *
kenjiArai 0:5b88d5760320 243 * @param[in] obj The SPI peripheral to use for sending
kenjiArai 0:5b88d5760320 244 * @param[in] tx_buffer Pointer to the byte-array of data to write to the device
kenjiArai 0:5b88d5760320 245 * @param[in] tx_length Number of bytes to write, may be zero
kenjiArai 0:5b88d5760320 246 * @param[in] rx_buffer Pointer to the byte-array of data to read from the device
kenjiArai 0:5b88d5760320 247 * @param[in] rx_length Number of bytes to read, may be zero
kenjiArai 0:5b88d5760320 248 * @param[in] write_fill Default data transmitted while performing a read
kenjiArai 0:5b88d5760320 249 * @returns
kenjiArai 0:5b88d5760320 250 * The number of bytes written and read from the device. This is
kenjiArai 0:5b88d5760320 251 * maximum of tx_length and rx_length.
kenjiArai 0:5b88d5760320 252 */
kenjiArai 0:5b88d5760320 253 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill);
kenjiArai 0:5b88d5760320 254
kenjiArai 0:5b88d5760320 255 /** Check if a value is available to read
kenjiArai 0:5b88d5760320 256 *
kenjiArai 0:5b88d5760320 257 * @param[in] obj The SPI peripheral to check
kenjiArai 0:5b88d5760320 258 * @return non-zero if a value is available
kenjiArai 0:5b88d5760320 259 */
kenjiArai 0:5b88d5760320 260 int spi_slave_receive(spi_t *obj);
kenjiArai 0:5b88d5760320 261
kenjiArai 0:5b88d5760320 262 /** Get a received value out of the SPI receive buffer in slave mode
kenjiArai 0:5b88d5760320 263 *
kenjiArai 0:5b88d5760320 264 * Blocks until a value is available
kenjiArai 0:5b88d5760320 265 * @param[in] obj The SPI peripheral to read
kenjiArai 0:5b88d5760320 266 * @return The value received
kenjiArai 0:5b88d5760320 267 */
kenjiArai 0:5b88d5760320 268 int spi_slave_read(spi_t *obj);
kenjiArai 0:5b88d5760320 269
kenjiArai 0:5b88d5760320 270 /** Write a value to the SPI peripheral in slave mode
kenjiArai 0:5b88d5760320 271 *
kenjiArai 0:5b88d5760320 272 * Blocks until the SPI peripheral can be written to
kenjiArai 0:5b88d5760320 273 * @param[in] obj The SPI peripheral to write
kenjiArai 0:5b88d5760320 274 * @param[in] value The value to write
kenjiArai 0:5b88d5760320 275 */
kenjiArai 0:5b88d5760320 276 void spi_slave_write(spi_t *obj, int value);
kenjiArai 0:5b88d5760320 277
kenjiArai 0:5b88d5760320 278 /** Checks if the specified SPI peripheral is in use
kenjiArai 0:5b88d5760320 279 *
kenjiArai 0:5b88d5760320 280 * @param[in] obj The SPI peripheral to check
kenjiArai 0:5b88d5760320 281 * @return non-zero if the peripheral is currently transmitting
kenjiArai 0:5b88d5760320 282 */
kenjiArai 0:5b88d5760320 283 int spi_busy(spi_t *obj);
kenjiArai 0:5b88d5760320 284
kenjiArai 0:5b88d5760320 285 /** Get the module number
kenjiArai 0:5b88d5760320 286 *
kenjiArai 0:5b88d5760320 287 * @param[in] obj The SPI peripheral to check
kenjiArai 0:5b88d5760320 288 * @return The module number
kenjiArai 0:5b88d5760320 289 */
kenjiArai 0:5b88d5760320 290 uint8_t spi_get_module(spi_t *obj);
kenjiArai 0:5b88d5760320 291
kenjiArai 0:5b88d5760320 292 /** Get the pins that support SPI MOSI
kenjiArai 0:5b88d5760320 293 *
kenjiArai 0:5b88d5760320 294 * Return a PinMap array of pins that support SPI MOSI in
kenjiArai 0:5b88d5760320 295 * master mode. The array is terminated with {NC, NC, 0}.
kenjiArai 0:5b88d5760320 296 *
kenjiArai 0:5b88d5760320 297 * @return PinMap array
kenjiArai 0:5b88d5760320 298 */
kenjiArai 0:5b88d5760320 299 const PinMap *spi_master_mosi_pinmap(void);
kenjiArai 0:5b88d5760320 300
kenjiArai 0:5b88d5760320 301 /** Get the pins that support SPI MISO
kenjiArai 0:5b88d5760320 302 *
kenjiArai 0:5b88d5760320 303 * Return a PinMap array of pins that support SPI MISO in
kenjiArai 0:5b88d5760320 304 * master mode. The array is terminated with {NC, NC, 0}.
kenjiArai 0:5b88d5760320 305 *
kenjiArai 0:5b88d5760320 306 * @return PinMap array
kenjiArai 0:5b88d5760320 307 */
kenjiArai 0:5b88d5760320 308 const PinMap *spi_master_miso_pinmap(void);
kenjiArai 0:5b88d5760320 309
kenjiArai 0:5b88d5760320 310 /** Get the pins that support SPI CLK
kenjiArai 0:5b88d5760320 311 *
kenjiArai 0:5b88d5760320 312 * Return a PinMap array of pins that support SPI CLK in
kenjiArai 0:5b88d5760320 313 * master mode. The array is terminated with {NC, NC, 0}.
kenjiArai 0:5b88d5760320 314 *
kenjiArai 0:5b88d5760320 315 * @return PinMap array
kenjiArai 0:5b88d5760320 316 */
kenjiArai 0:5b88d5760320 317 const PinMap *spi_master_clk_pinmap(void);
kenjiArai 0:5b88d5760320 318
kenjiArai 0:5b88d5760320 319 /** Get the pins that support SPI CS
kenjiArai 0:5b88d5760320 320 *
kenjiArai 0:5b88d5760320 321 * Return a PinMap array of pins that support SPI CS in
kenjiArai 0:5b88d5760320 322 * master mode. The array is terminated with {NC, NC, 0}.
kenjiArai 0:5b88d5760320 323 *
kenjiArai 0:5b88d5760320 324 * @return PinMap array
kenjiArai 0:5b88d5760320 325 */
kenjiArai 0:5b88d5760320 326 const PinMap *spi_master_cs_pinmap(void);
kenjiArai 0:5b88d5760320 327
kenjiArai 0:5b88d5760320 328 /** Get the pins that support SPI MOSI
kenjiArai 0:5b88d5760320 329 *
kenjiArai 0:5b88d5760320 330 * Return a PinMap array of pins that support SPI MOSI in
kenjiArai 0:5b88d5760320 331 * slave mode. The array is terminated with {NC, NC, 0}.
kenjiArai 0:5b88d5760320 332 *
kenjiArai 0:5b88d5760320 333 * @return PinMap array
kenjiArai 0:5b88d5760320 334 */
kenjiArai 0:5b88d5760320 335 const PinMap *spi_slave_mosi_pinmap(void);
kenjiArai 0:5b88d5760320 336
kenjiArai 0:5b88d5760320 337 /** Get the pins that support SPI MISO
kenjiArai 0:5b88d5760320 338 *
kenjiArai 0:5b88d5760320 339 * Return a PinMap array of pins that support SPI MISO in
kenjiArai 0:5b88d5760320 340 * slave mode. The array is terminated with {NC, NC, 0}.
kenjiArai 0:5b88d5760320 341 *
kenjiArai 0:5b88d5760320 342 * @return PinMap array
kenjiArai 0:5b88d5760320 343 */
kenjiArai 0:5b88d5760320 344 const PinMap *spi_slave_miso_pinmap(void);
kenjiArai 0:5b88d5760320 345
kenjiArai 0:5b88d5760320 346 /** Get the pins that support SPI CLK
kenjiArai 0:5b88d5760320 347 *
kenjiArai 0:5b88d5760320 348 * Return a PinMap array of pins that support SPI CLK in
kenjiArai 0:5b88d5760320 349 * slave mode. The array is terminated with {NC, NC, 0}.
kenjiArai 0:5b88d5760320 350 *
kenjiArai 0:5b88d5760320 351 * @return PinMap array
kenjiArai 0:5b88d5760320 352 */
kenjiArai 0:5b88d5760320 353 const PinMap *spi_slave_clk_pinmap(void);
kenjiArai 0:5b88d5760320 354
kenjiArai 0:5b88d5760320 355 /** Get the pins that support SPI CS
kenjiArai 0:5b88d5760320 356 *
kenjiArai 0:5b88d5760320 357 * Return a PinMap array of pins that support SPI CS in
kenjiArai 0:5b88d5760320 358 * slave mode. The array is terminated with {NC, NC, 0}.
kenjiArai 0:5b88d5760320 359 *
kenjiArai 0:5b88d5760320 360 * @return PinMap array
kenjiArai 0:5b88d5760320 361 */
kenjiArai 0:5b88d5760320 362 const PinMap *spi_slave_cs_pinmap(void);
kenjiArai 0:5b88d5760320 363
kenjiArai 0:5b88d5760320 364 /**@}*/
kenjiArai 0:5b88d5760320 365
kenjiArai 0:5b88d5760320 366 #if DEVICE_SPI_ASYNCH
kenjiArai 0:5b88d5760320 367 /**
kenjiArai 0:5b88d5760320 368 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
kenjiArai 0:5b88d5760320 369 * @{
kenjiArai 0:5b88d5760320 370 */
kenjiArai 0:5b88d5760320 371
kenjiArai 0:5b88d5760320 372 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
kenjiArai 0:5b88d5760320 373 *
kenjiArai 0:5b88d5760320 374 * @param[in] obj The SPI object that holds the transfer information
kenjiArai 0:5b88d5760320 375 * @param[in] tx The transmit buffer
kenjiArai 0:5b88d5760320 376 * @param[in] tx_length The number of bytes to transmit
kenjiArai 0:5b88d5760320 377 * @param[in] rx The receive buffer
kenjiArai 0:5b88d5760320 378 * @param[in] rx_length The number of bytes to receive
kenjiArai 0:5b88d5760320 379 * @param[in] bit_width The bit width of buffer words
kenjiArai 0:5b88d5760320 380 * @param[in] event The logical OR of events to be registered
kenjiArai 0:5b88d5760320 381 * @param[in] handler SPI interrupt handler
kenjiArai 0:5b88d5760320 382 * @param[in] hint A suggestion for how to use DMA with this transfer
kenjiArai 0:5b88d5760320 383 */
kenjiArai 0:5b88d5760320 384 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
kenjiArai 0:5b88d5760320 385
kenjiArai 0:5b88d5760320 386 /** The asynchronous IRQ handler
kenjiArai 0:5b88d5760320 387 *
kenjiArai 0:5b88d5760320 388 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
kenjiArai 0:5b88d5760320 389 * conditions, such as buffer overflows or transfer complete.
kenjiArai 0:5b88d5760320 390 * @param[in] obj The SPI object that holds the transfer information
kenjiArai 0:5b88d5760320 391 * @return Event flags if a transfer termination condition was met; otherwise 0.
kenjiArai 0:5b88d5760320 392 */
kenjiArai 0:5b88d5760320 393 uint32_t spi_irq_handler_asynch(spi_t *obj);
kenjiArai 0:5b88d5760320 394
kenjiArai 0:5b88d5760320 395 /** Attempts to determine if the SPI peripheral is already in use
kenjiArai 0:5b88d5760320 396 *
kenjiArai 0:5b88d5760320 397 * If a temporary DMA channel has been allocated, peripheral is in use.
kenjiArai 0:5b88d5760320 398 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
kenjiArai 0:5b88d5760320 399 * channel were allocated.
kenjiArai 0:5b88d5760320 400 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
kenjiArai 0:5b88d5760320 401 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
kenjiArai 0:5b88d5760320 402 * there are any bytes in the FIFOs.
kenjiArai 0:5b88d5760320 403 * @param[in] obj The SPI object to check for activity
kenjiArai 0:5b88d5760320 404 * @return Non-zero if the SPI port is active or zero if it is not.
kenjiArai 0:5b88d5760320 405 */
kenjiArai 0:5b88d5760320 406 uint8_t spi_active(spi_t *obj);
kenjiArai 0:5b88d5760320 407
kenjiArai 0:5b88d5760320 408 /** Abort an SPI transfer
kenjiArai 0:5b88d5760320 409 *
kenjiArai 0:5b88d5760320 410 * @param obj The SPI peripheral to stop
kenjiArai 0:5b88d5760320 411 */
kenjiArai 0:5b88d5760320 412 void spi_abort_asynch(spi_t *obj);
kenjiArai 0:5b88d5760320 413
kenjiArai 0:5b88d5760320 414
kenjiArai 0:5b88d5760320 415 #endif
kenjiArai 0:5b88d5760320 416
kenjiArai 0:5b88d5760320 417 /**@}*/
kenjiArai 0:5b88d5760320 418
kenjiArai 0:5b88d5760320 419 #ifdef __cplusplus
kenjiArai 0:5b88d5760320 420 }
kenjiArai 0:5b88d5760320 421 #endif // __cplusplus
kenjiArai 0:5b88d5760320 422
kenjiArai 0:5b88d5760320 423 #endif // SPI_DEVICE
kenjiArai 0:5b88d5760320 424
kenjiArai 0:5b88d5760320 425 #endif // MBED_SPI_API_H
kenjiArai 0:5b88d5760320 426
kenjiArai 0:5b88d5760320 427 /** @}*/