This is a RTC additional function. This is only for Nucleo F401RE & F411RE mbed(Added L152RE, F334R8, L476RG & F746xx). If you connected battery backup circuit for internal RTC, you can make a power-off and reset condition. RTC still has proper time and date.

Dependents:   Nucleo_rtos_sample PB_Emma_Ethernet

Please refer following NOTE information.
/users/kenjiArai/notebook/nucleo-series-rtc-control-under-power-onoff-and-re/

Committer:
kenjiArai
Date:
Fri May 27 20:16:09 2016 +0000
Revision:
13:44e5327acb05
Parent:
10:16ee1c956319
Child:
14:78e453d7bb85
Added L476RG mbed.Changed SetRTC and rtc_api.c for F401RE & F411RE, F334R8 based on latest mbed-dev revision (141).

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 0:e4c20fd769f1 1 /*
kenjiArai 0:e4c20fd769f1 2 * mbed Library program
kenjiArai 0:e4c20fd769f1 3 * Check & set RTC function and set proper clock if we can set
kenjiArai 0:e4c20fd769f1 4 * ONLY FOR "Nucleo Board"
kenjiArai 0:e4c20fd769f1 5 *
kenjiArai 13:44e5327acb05 6 * Copyright (c) 2014,'15,'16 Kenji Arai / JH1PJL
kenjiArai 0:e4c20fd769f1 7 * http://www.page.sannet.ne.jp/kenjia/index.html
kenjiArai 0:e4c20fd769f1 8 * http://mbed.org/users/kenjiArai/
kenjiArai 13:44e5327acb05 9 * Created: October 24th, 2014
kenjiArai 13:44e5327acb05 10 * Revised: May 28th, 2016
kenjiArai 0:e4c20fd769f1 11 *
kenjiArai 0:e4c20fd769f1 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
kenjiArai 0:e4c20fd769f1 13 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
kenjiArai 0:e4c20fd769f1 14 * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
kenjiArai 0:e4c20fd769f1 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
kenjiArai 0:e4c20fd769f1 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
kenjiArai 0:e4c20fd769f1 17 */
kenjiArai 0:e4c20fd769f1 18
kenjiArai 13:44e5327acb05 19 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 13:44e5327acb05 20 || defined(TARGET_STM32L152RE) || defined(TARGET_STM32F334R8) \
kenjiArai 13:44e5327acb05 21 || defined(TARGET_STM32L476RG) )
kenjiArai 0:e4c20fd769f1 22
kenjiArai 0:e4c20fd769f1 23 //#define DEBUG // use Communication with PC(UART)
kenjiArai 0:e4c20fd769f1 24
kenjiArai 0:e4c20fd769f1 25 // Include ---------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 26 #include "mbed.h"
kenjiArai 0:e4c20fd769f1 27 #include "SetRTC.h"
kenjiArai 0:e4c20fd769f1 28
kenjiArai 0:e4c20fd769f1 29 // Definition ------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 30 #ifdef DEBUG
kenjiArai 0:e4c20fd769f1 31 #define BAUD(x) pcr.baud(x)
kenjiArai 0:e4c20fd769f1 32 #define GETC(x) pcr.getc(x)
kenjiArai 0:e4c20fd769f1 33 #define PUTC(x) pcr.putc(x)
kenjiArai 0:e4c20fd769f1 34 #define PRINTF(...) pcr.printf(__VA_ARGS__)
kenjiArai 0:e4c20fd769f1 35 #define READABLE(x) pcr.readable(x)
kenjiArai 0:e4c20fd769f1 36 #else
kenjiArai 0:e4c20fd769f1 37 #define BAUD(x) {;}
kenjiArai 0:e4c20fd769f1 38 #define GETC(x) {;}
kenjiArai 0:e4c20fd769f1 39 #define PUTC(x) {;}
kenjiArai 0:e4c20fd769f1 40 #define PRINTF(...) {;}
kenjiArai 0:e4c20fd769f1 41 #define READABLE(x) {;}
kenjiArai 0:e4c20fd769f1 42 #endif
kenjiArai 0:e4c20fd769f1 43
kenjiArai 0:e4c20fd769f1 44 // Object ----------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 45 Serial pcr(USBTX, USBRX);
kenjiArai 0:e4c20fd769f1 46
kenjiArai 0:e4c20fd769f1 47 // RAM -------------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 48
kenjiArai 0:e4c20fd769f1 49 // ROM / Constant data ---------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 50
kenjiArai 0:e4c20fd769f1 51 // Function prototypes ---------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 52 static int32_t set_RTC_LSI(void);
kenjiArai 0:e4c20fd769f1 53 static int32_t set_RTC_LSE(void);
kenjiArai 0:e4c20fd769f1 54 static int32_t rtc_external_osc_init(void);
kenjiArai 0:e4c20fd769f1 55 static uint32_t read_RTC_reg(uint32_t RTC_BKP_DR);
kenjiArai 0:e4c20fd769f1 56 static uint32_t check_RTC_backup_reg( void );
kenjiArai 0:e4c20fd769f1 57 static int xatoi (char **str, unsigned long *res);
kenjiArai 0:e4c20fd769f1 58 static void get_line (char *buff, int len);
kenjiArai 7:fa32602e23ec 59 static void set_5v_drop_detect(uint8_t function_use);
kenjiArai 0:e4c20fd769f1 60
kenjiArai 0:e4c20fd769f1 61 //-------------------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 62 // Control Program
kenjiArai 0:e4c20fd769f1 63 //-------------------------------------------------------------------------------------------------
kenjiArai 7:fa32602e23ec 64 int32_t SetRTC(uint8_t use_comparator)
kenjiArai 0:e4c20fd769f1 65 {
kenjiArai 6:ef7d2c83034d 66 if (rtc_external_osc_init() == 1) {
kenjiArai 7:fa32602e23ec 67 set_5v_drop_detect(use_comparator);
kenjiArai 6:ef7d2c83034d 68 return 1;
kenjiArai 0:e4c20fd769f1 69 } else {
kenjiArai 6:ef7d2c83034d 70 return 0;
kenjiArai 0:e4c20fd769f1 71 }
kenjiArai 0:e4c20fd769f1 72 }
kenjiArai 0:e4c20fd769f1 73
kenjiArai 0:e4c20fd769f1 74 int32_t set_RTC_LSE(void)
kenjiArai 0:e4c20fd769f1 75 {
kenjiArai 0:e4c20fd769f1 76 uint32_t timeout = 0;
kenjiArai 0:e4c20fd769f1 77
kenjiArai 0:e4c20fd769f1 78 //---------------------------- LSE Configuration -------------------------
kenjiArai 0:e4c20fd769f1 79 // Enable Power Clock
kenjiArai 0:e4c20fd769f1 80 __PWR_CLK_ENABLE();
kenjiArai 0:e4c20fd769f1 81 // Enable write access to Backup domain
kenjiArai 13:44e5327acb05 82 #if defined(TARGET_STM32L476RG)
kenjiArai 13:44e5327acb05 83 PWR->CR1 |= PWR_CR1_DBP;
kenjiArai 13:44e5327acb05 84 #else
kenjiArai 0:e4c20fd769f1 85 PWR->CR |= PWR_CR_DBP;
kenjiArai 13:44e5327acb05 86 #endif
kenjiArai 0:e4c20fd769f1 87 // Wait for Backup domain Write protection disable
kenjiArai 0:e4c20fd769f1 88 timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE;
kenjiArai 6:ef7d2c83034d 89 PRINTF("Time-Out %d\r\n", timeout);
kenjiArai 13:44e5327acb05 90 #if defined(TARGET_STM32L476RG)
kenjiArai 13:44e5327acb05 91 while((PWR->CR1 & PWR_CR1_DBP) == RESET) {
kenjiArai 13:44e5327acb05 92 #else
kenjiArai 0:e4c20fd769f1 93 while((PWR->CR & PWR_CR_DBP) == RESET) {
kenjiArai 13:44e5327acb05 94 #endif
kenjiArai 0:e4c20fd769f1 95 if(HAL_GetTick() >= timeout) {
kenjiArai 0:e4c20fd769f1 96 PRINTF("Time-Out 1\r\n");
kenjiArai 6:ef7d2c83034d 97 return 0;
kenjiArai 6:ef7d2c83034d 98 } else {
kenjiArai 6:ef7d2c83034d 99 PRINTF("GetTick: %d\r\n",HAL_GetTick());
kenjiArai 0:e4c20fd769f1 100 }
kenjiArai 0:e4c20fd769f1 101 }
kenjiArai 0:e4c20fd769f1 102 // Reset LSEON and LSEBYP bits before configuring the LSE ----------------
kenjiArai 0:e4c20fd769f1 103 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
kenjiArai 0:e4c20fd769f1 104 // Get timeout
kenjiArai 0:e4c20fd769f1 105 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 6:ef7d2c83034d 106 PRINTF("Time-Out %d\r\n", timeout);
kenjiArai 0:e4c20fd769f1 107 // Wait till LSE is ready
kenjiArai 0:e4c20fd769f1 108 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) {
kenjiArai 0:e4c20fd769f1 109 if(HAL_GetTick() >= timeout) {
kenjiArai 0:e4c20fd769f1 110 PRINTF("Time-Out 2\r\n");
kenjiArai 6:ef7d2c83034d 111 return 0;
kenjiArai 6:ef7d2c83034d 112 } else {
kenjiArai 6:ef7d2c83034d 113 PRINTF("GetTick: %d\r\n",HAL_GetTick());
kenjiArai 0:e4c20fd769f1 114 }
kenjiArai 0:e4c20fd769f1 115 }
kenjiArai 0:e4c20fd769f1 116 // Set the new LSE configuration -----------------------------------------
kenjiArai 0:e4c20fd769f1 117 __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
kenjiArai 0:e4c20fd769f1 118 // Get timeout
kenjiArai 0:e4c20fd769f1 119 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 6:ef7d2c83034d 120 PRINTF("Time-Out %d\r\n", timeout);
kenjiArai 0:e4c20fd769f1 121 // Wait till LSE is ready
kenjiArai 13:44e5327acb05 122 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 13:44e5327acb05 123 || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) )
kenjiArai 6:ef7d2c83034d 124 while((RCC->BDCR & 0x02) != 2){
kenjiArai 13:44e5327acb05 125 #elif defined(TARGET_STM32L152RE)
kenjiArai 0:e4c20fd769f1 126 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {
kenjiArai 6:ef7d2c83034d 127 #endif
kenjiArai 0:e4c20fd769f1 128 if(HAL_GetTick() >= timeout) {
kenjiArai 0:e4c20fd769f1 129 PRINTF("Time-Out 3\r\n");
kenjiArai 6:ef7d2c83034d 130 return 0;
kenjiArai 6:ef7d2c83034d 131 } else {
kenjiArai 6:ef7d2c83034d 132 PRINTF("GetTick: %d\r\n",HAL_GetTick());
kenjiArai 0:e4c20fd769f1 133 }
kenjiArai 0:e4c20fd769f1 134 }
kenjiArai 6:ef7d2c83034d 135 PRINTF("OK\r\n");
kenjiArai 6:ef7d2c83034d 136 return 1;
kenjiArai 0:e4c20fd769f1 137 }
kenjiArai 0:e4c20fd769f1 138
kenjiArai 0:e4c20fd769f1 139 int32_t set_RTC_LSI(void)
kenjiArai 0:e4c20fd769f1 140 {
kenjiArai 0:e4c20fd769f1 141 uint32_t timeout = 0;
kenjiArai 0:e4c20fd769f1 142
kenjiArai 0:e4c20fd769f1 143 // Enable Power clock
kenjiArai 0:e4c20fd769f1 144 __PWR_CLK_ENABLE();
kenjiArai 0:e4c20fd769f1 145 // Enable access to Backup domain
kenjiArai 0:e4c20fd769f1 146 HAL_PWR_EnableBkUpAccess();
kenjiArai 0:e4c20fd769f1 147 // Reset Backup domain
kenjiArai 0:e4c20fd769f1 148 __HAL_RCC_BACKUPRESET_FORCE();
kenjiArai 0:e4c20fd769f1 149 __HAL_RCC_BACKUPRESET_RELEASE();
kenjiArai 0:e4c20fd769f1 150 // Enable Power Clock
kenjiArai 0:e4c20fd769f1 151 __PWR_CLK_ENABLE();
kenjiArai 0:e4c20fd769f1 152 // Enable write access to Backup domain
kenjiArai 13:44e5327acb05 153 #if defined(TARGET_STM32L476RG)
kenjiArai 13:44e5327acb05 154 PWR->CR1 |= PWR_CR1_DBP;
kenjiArai 13:44e5327acb05 155 #else
kenjiArai 0:e4c20fd769f1 156 PWR->CR |= PWR_CR_DBP;
kenjiArai 13:44e5327acb05 157 #endif
kenjiArai 0:e4c20fd769f1 158 // Wait for Backup domain Write protection disable
kenjiArai 0:e4c20fd769f1 159 timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE;
kenjiArai 13:44e5327acb05 160 #if defined(TARGET_STM32L476RG)
kenjiArai 13:44e5327acb05 161 while((PWR->CR1 & PWR_CR1_DBP) == RESET) {
kenjiArai 13:44e5327acb05 162 #else
kenjiArai 0:e4c20fd769f1 163 while((PWR->CR & PWR_CR_DBP) == RESET) {
kenjiArai 13:44e5327acb05 164 #endif
kenjiArai 0:e4c20fd769f1 165 if(HAL_GetTick() >= timeout) {
kenjiArai 6:ef7d2c83034d 166 return 0;
kenjiArai 0:e4c20fd769f1 167 }
kenjiArai 0:e4c20fd769f1 168 }
kenjiArai 0:e4c20fd769f1 169 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
kenjiArai 0:e4c20fd769f1 170 // Enable LSI
kenjiArai 0:e4c20fd769f1 171 __HAL_RCC_LSI_ENABLE();
kenjiArai 0:e4c20fd769f1 172 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 0:e4c20fd769f1 173 // Wait till LSI is ready
kenjiArai 0:e4c20fd769f1 174 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) {
kenjiArai 0:e4c20fd769f1 175 if(HAL_GetTick() >= timeout) {
kenjiArai 6:ef7d2c83034d 176 return 0;
kenjiArai 0:e4c20fd769f1 177 }
kenjiArai 0:e4c20fd769f1 178 }
kenjiArai 0:e4c20fd769f1 179 // Connect LSI to RTC
kenjiArai 13:44e5327acb05 180 #if !(defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG))
kenjiArai 0:e4c20fd769f1 181 __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
kenjiArai 9:1af4e107ca7b 182 #endif
kenjiArai 0:e4c20fd769f1 183 __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
kenjiArai 6:ef7d2c83034d 184 return 1;
kenjiArai 0:e4c20fd769f1 185 }
kenjiArai 0:e4c20fd769f1 186
kenjiArai 0:e4c20fd769f1 187 int32_t rtc_external_osc_init(void)
kenjiArai 0:e4c20fd769f1 188 {
kenjiArai 6:ef7d2c83034d 189 uint32_t timeout = 0;
kenjiArai 6:ef7d2c83034d 190 time_t seconds;
kenjiArai 6:ef7d2c83034d 191 uint8_t external_ok = 1;
kenjiArai 6:ef7d2c83034d 192
kenjiArai 0:e4c20fd769f1 193 // Enable Power clock
kenjiArai 0:e4c20fd769f1 194 __PWR_CLK_ENABLE();
kenjiArai 0:e4c20fd769f1 195 // Enable access to Backup domain
kenjiArai 0:e4c20fd769f1 196 HAL_PWR_EnableBkUpAccess();
kenjiArai 0:e4c20fd769f1 197 // Check backup condition
kenjiArai 0:e4c20fd769f1 198 if ( check_RTC_backup_reg() ) {
kenjiArai 13:44e5327acb05 199 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 13:44e5327acb05 200 || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) )
kenjiArai 6:ef7d2c83034d 201 if ((RCC->BDCR & 0x8307) == 0x8103){
kenjiArai 6:ef7d2c83034d 202 #else
kenjiArai 6:ef7d2c83034d 203 if ((RCC->CSR & 0x430703) == 0x410300) {
kenjiArai 6:ef7d2c83034d 204 #endif
kenjiArai 6:ef7d2c83034d 205 //if (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) {
kenjiArai 6:ef7d2c83034d 206 timeout = HAL_GetTick() + TIMEOUT / 5;
kenjiArai 6:ef7d2c83034d 207 seconds = time(NULL);
kenjiArai 6:ef7d2c83034d 208 while (seconds == time(NULL)){
kenjiArai 6:ef7d2c83034d 209 if(HAL_GetTick() >= timeout) {
kenjiArai 6:ef7d2c83034d 210 PRINTF("Not available External Xtal\r\n");
kenjiArai 6:ef7d2c83034d 211 external_ok = 0;
kenjiArai 6:ef7d2c83034d 212 break;
kenjiArai 6:ef7d2c83034d 213 }
kenjiArai 6:ef7d2c83034d 214 }
kenjiArai 6:ef7d2c83034d 215 if (external_ok){
kenjiArai 6:ef7d2c83034d 216 PRINTF("OK everything\r\n");
kenjiArai 6:ef7d2c83034d 217 return 1;
kenjiArai 6:ef7d2c83034d 218 }
kenjiArai 6:ef7d2c83034d 219 }
kenjiArai 6:ef7d2c83034d 220 }
kenjiArai 6:ef7d2c83034d 221 PRINTF("Reset RTC LSE config.\r\n");
kenjiArai 6:ef7d2c83034d 222 // Reset Backup domain
kenjiArai 6:ef7d2c83034d 223 __HAL_RCC_BACKUPRESET_FORCE();
kenjiArai 6:ef7d2c83034d 224 __HAL_RCC_BACKUPRESET_RELEASE();
kenjiArai 6:ef7d2c83034d 225 // Enable LSE Oscillator
kenjiArai 6:ef7d2c83034d 226 if (set_RTC_LSE() == 1) {
kenjiArai 6:ef7d2c83034d 227 // Connect LSE to RTC
kenjiArai 13:44e5327acb05 228 #if !(defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG))
kenjiArai 6:ef7d2c83034d 229 __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
kenjiArai 9:1af4e107ca7b 230 #endif
kenjiArai 6:ef7d2c83034d 231 __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
kenjiArai 6:ef7d2c83034d 232 PRINTF("Set LSE/External\r\n");
kenjiArai 6:ef7d2c83034d 233 return 1;
kenjiArai 0:e4c20fd769f1 234 } else {
kenjiArai 6:ef7d2c83034d 235 set_RTC_LSI();
kenjiArai 6:ef7d2c83034d 236 PRINTF("Set LSI/Internal\r\n");
kenjiArai 6:ef7d2c83034d 237 return 0;
kenjiArai 0:e4c20fd769f1 238 }
kenjiArai 0:e4c20fd769f1 239 }
kenjiArai 0:e4c20fd769f1 240
kenjiArai 0:e4c20fd769f1 241 uint32_t read_RTC_reg(uint32_t RTC_BKP_DR)
kenjiArai 0:e4c20fd769f1 242 {
kenjiArai 0:e4c20fd769f1 243 __IO uint32_t tmp = 0;
kenjiArai 0:e4c20fd769f1 244
kenjiArai 0:e4c20fd769f1 245 // Check the parameters
kenjiArai 0:e4c20fd769f1 246 assert_param(IS_RTC_BKP(RTC_BKP_DR));
kenjiArai 0:e4c20fd769f1 247 tmp = RTC_BASE + 0x50;
kenjiArai 0:e4c20fd769f1 248 tmp += (RTC_BKP_DR * 4);
kenjiArai 0:e4c20fd769f1 249 // Read the specified register
kenjiArai 0:e4c20fd769f1 250 return (*(__IO uint32_t *)tmp);
kenjiArai 0:e4c20fd769f1 251 }
kenjiArai 0:e4c20fd769f1 252
kenjiArai 0:e4c20fd769f1 253 // Check RTC Backup registers contents
kenjiArai 0:e4c20fd769f1 254 uint32_t check_RTC_backup_reg( void )
kenjiArai 0:e4c20fd769f1 255 {
kenjiArai 0:e4c20fd769f1 256 if ( read_RTC_reg( RTC_BKP_DR0 ) == RTC_DAT0 ) {
kenjiArai 0:e4c20fd769f1 257 if ( read_RTC_reg( RTC_BKP_DR1 ) == RTC_DAT1 ) {
kenjiArai 0:e4c20fd769f1 258 return 1;
kenjiArai 0:e4c20fd769f1 259 }
kenjiArai 0:e4c20fd769f1 260 }
kenjiArai 0:e4c20fd769f1 261 return 0;
kenjiArai 0:e4c20fd769f1 262 }
kenjiArai 0:e4c20fd769f1 263
kenjiArai 0:e4c20fd769f1 264 void show_RTC_reg( void )
kenjiArai 0:e4c20fd769f1 265 {
kenjiArai 0:e4c20fd769f1 266 // Show registers
kenjiArai 6:ef7d2c83034d 267 pcr.printf( "\r\nShow RTC registers\r\n" );
kenjiArai 0:e4c20fd769f1 268 pcr.printf( " Reg0 =0x%08x, Reg1 =0x%08x\r\n",
kenjiArai 0:e4c20fd769f1 269 read_RTC_reg( RTC_BKP_DR0 ),
kenjiArai 0:e4c20fd769f1 270 read_RTC_reg( RTC_BKP_DR1 )
kenjiArai 0:e4c20fd769f1 271 );
kenjiArai 0:e4c20fd769f1 272 pcr.printf( " TR =0x..%06x, DR =0x..%06x, CR =0x..%06x\r\n",
kenjiArai 0:e4c20fd769f1 273 RTC->TR, RTC->DR, RTC->CR
kenjiArai 0:e4c20fd769f1 274 );
kenjiArai 0:e4c20fd769f1 275 pcr.printf( " ISR =0x...%05x, PRER =0x..%06x, WUTR =0x....%04x\r\n",
kenjiArai 0:e4c20fd769f1 276 RTC->ISR, RTC->PRER, RTC->WUTR
kenjiArai 0:e4c20fd769f1 277 );
kenjiArai 13:44e5327acb05 278 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 13:44e5327acb05 279 || defined(TARGET_STM32L152RE) )
kenjiArai 0:e4c20fd769f1 280 pcr.printf( " CALIBR=0x....%04x, ALRMAR=0x%08x, ALRMBR=0x%08x\r\n",
kenjiArai 0:e4c20fd769f1 281 RTC->CALIBR, RTC->ALRMAR, RTC->ALRMBR
kenjiArai 0:e4c20fd769f1 282 );
kenjiArai 9:1af4e107ca7b 283 #endif
kenjiArai 0:e4c20fd769f1 284 pcr.printf(
kenjiArai 0:e4c20fd769f1 285 " WPR =0x......%02x, SSR =0x....%04x, SHIFTR=0x....%04x\r\n",
kenjiArai 0:e4c20fd769f1 286 RTC->WPR, RTC->SSR, RTC->SHIFTR
kenjiArai 0:e4c20fd769f1 287 );
kenjiArai 0:e4c20fd769f1 288 pcr.printf(
kenjiArai 6:ef7d2c83034d 289 " TSTR =0x..%06x, TSDR =0x....%04x, TSSSR =0x....%04x\r\n",
kenjiArai 0:e4c20fd769f1 290 RTC->TSTR, RTC->TSDR, RTC->TSSSR
kenjiArai 0:e4c20fd769f1 291 );
kenjiArai 6:ef7d2c83034d 292 pcr.printf( "Show RCC registers (only RTC Related reg.)\r\n" );
kenjiArai 13:44e5327acb05 293 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 13:44e5327acb05 294 || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) )
kenjiArai 6:ef7d2c83034d 295 pcr.printf( " RCC_BDCR=0x...%05x\r\n", RCC->BDCR);
kenjiArai 6:ef7d2c83034d 296 #else
kenjiArai 6:ef7d2c83034d 297 pcr.printf( " RCC_CSR =0x%08x\r\n", RCC->CSR);
kenjiArai 6:ef7d2c83034d 298 #endif
kenjiArai 6:ef7d2c83034d 299 pcr.printf( "\r\n");
kenjiArai 0:e4c20fd769f1 300 }
kenjiArai 0:e4c20fd769f1 301
kenjiArai 0:e4c20fd769f1 302 // Change string -> integer
kenjiArai 0:e4c20fd769f1 303 int xatoi (char **str, unsigned long *res)
kenjiArai 0:e4c20fd769f1 304 {
kenjiArai 0:e4c20fd769f1 305 unsigned long val;
kenjiArai 0:e4c20fd769f1 306 unsigned char c, radix, s = 0;
kenjiArai 0:e4c20fd769f1 307
kenjiArai 0:e4c20fd769f1 308 while ((c = **str) == ' ') (*str)++;
kenjiArai 0:e4c20fd769f1 309 if (c == '-') {
kenjiArai 0:e4c20fd769f1 310 s = 1;
kenjiArai 0:e4c20fd769f1 311 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 312 }
kenjiArai 0:e4c20fd769f1 313 if (c == '0') {
kenjiArai 0:e4c20fd769f1 314 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 315 if (c <= ' ') {
kenjiArai 0:e4c20fd769f1 316 *res = 0;
kenjiArai 0:e4c20fd769f1 317 return 1;
kenjiArai 0:e4c20fd769f1 318 }
kenjiArai 0:e4c20fd769f1 319 if (c == 'x') {
kenjiArai 0:e4c20fd769f1 320 radix = 16;
kenjiArai 0:e4c20fd769f1 321 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 322 } else {
kenjiArai 0:e4c20fd769f1 323 if (c == 'b') {
kenjiArai 0:e4c20fd769f1 324 radix = 2;
kenjiArai 0:e4c20fd769f1 325 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 326 } else {
kenjiArai 0:e4c20fd769f1 327 if ((c >= '0')&&(c <= '9')) {
kenjiArai 0:e4c20fd769f1 328 radix = 8;
kenjiArai 0:e4c20fd769f1 329 } else {
kenjiArai 0:e4c20fd769f1 330 return 0;
kenjiArai 0:e4c20fd769f1 331 }
kenjiArai 0:e4c20fd769f1 332 }
kenjiArai 0:e4c20fd769f1 333 }
kenjiArai 0:e4c20fd769f1 334 } else {
kenjiArai 0:e4c20fd769f1 335 if ((c < '1')||(c > '9')) {
kenjiArai 0:e4c20fd769f1 336 return 0;
kenjiArai 0:e4c20fd769f1 337 }
kenjiArai 0:e4c20fd769f1 338 radix = 10;
kenjiArai 0:e4c20fd769f1 339 }
kenjiArai 0:e4c20fd769f1 340 val = 0;
kenjiArai 0:e4c20fd769f1 341 while (c > ' ') {
kenjiArai 0:e4c20fd769f1 342 if (c >= 'a') c -= 0x20;
kenjiArai 0:e4c20fd769f1 343 c -= '0';
kenjiArai 0:e4c20fd769f1 344 if (c >= 17) {
kenjiArai 0:e4c20fd769f1 345 c -= 7;
kenjiArai 0:e4c20fd769f1 346 if (c <= 9) return 0;
kenjiArai 0:e4c20fd769f1 347 }
kenjiArai 0:e4c20fd769f1 348 if (c >= radix) return 0;
kenjiArai 0:e4c20fd769f1 349 val = val * radix + c;
kenjiArai 0:e4c20fd769f1 350 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 351 }
kenjiArai 0:e4c20fd769f1 352 if (s) val = -val;
kenjiArai 0:e4c20fd769f1 353 *res = val;
kenjiArai 0:e4c20fd769f1 354 return 1;
kenjiArai 0:e4c20fd769f1 355 }
kenjiArai 0:e4c20fd769f1 356
kenjiArai 0:e4c20fd769f1 357 // Get key input data
kenjiArai 0:e4c20fd769f1 358 void get_line (char *buff, int len)
kenjiArai 0:e4c20fd769f1 359 {
kenjiArai 0:e4c20fd769f1 360 char c;
kenjiArai 0:e4c20fd769f1 361 int idx = 0;
kenjiArai 0:e4c20fd769f1 362
kenjiArai 0:e4c20fd769f1 363 for (;;) {
kenjiArai 0:e4c20fd769f1 364 c = pcr.getc();
kenjiArai 0:e4c20fd769f1 365 if (c == '\r') {
kenjiArai 0:e4c20fd769f1 366 buff[idx++] = c;
kenjiArai 0:e4c20fd769f1 367 break;
kenjiArai 0:e4c20fd769f1 368 }
kenjiArai 0:e4c20fd769f1 369 if ((c == '\b') && idx) {
kenjiArai 0:e4c20fd769f1 370 idx--;
kenjiArai 0:e4c20fd769f1 371 pcr.putc(c);
kenjiArai 0:e4c20fd769f1 372 pcr.putc(' ');
kenjiArai 0:e4c20fd769f1 373 pcr.putc(c);
kenjiArai 0:e4c20fd769f1 374 }
kenjiArai 0:e4c20fd769f1 375 if (((uint8_t)c >= ' ') && (idx < len - 1)) {
kenjiArai 0:e4c20fd769f1 376 buff[idx++] = c;
kenjiArai 0:e4c20fd769f1 377 pcr.putc(c);
kenjiArai 0:e4c20fd769f1 378 }
kenjiArai 0:e4c20fd769f1 379 }
kenjiArai 0:e4c20fd769f1 380 buff[idx] = 0;
kenjiArai 0:e4c20fd769f1 381 pcr.putc('\n');
kenjiArai 0:e4c20fd769f1 382 }
kenjiArai 0:e4c20fd769f1 383
kenjiArai 0:e4c20fd769f1 384 // RTC related subroutines
kenjiArai 0:e4c20fd769f1 385 void chk_and_set_time(char *ptr)
kenjiArai 0:e4c20fd769f1 386 {
kenjiArai 0:e4c20fd769f1 387 unsigned long p1;
kenjiArai 0:e4c20fd769f1 388 struct tm t;
kenjiArai 0:e4c20fd769f1 389 time_t seconds;
kenjiArai 0:e4c20fd769f1 390
kenjiArai 0:e4c20fd769f1 391 if (xatoi(&ptr, &p1)) {
kenjiArai 0:e4c20fd769f1 392 t.tm_year = (uint8_t)p1 + 100;
kenjiArai 0:e4c20fd769f1 393 PRINTF("Year:%d ",p1);
kenjiArai 0:e4c20fd769f1 394 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 395 t.tm_mon = (uint8_t)p1 - 1;
kenjiArai 0:e4c20fd769f1 396 PRINTF("Month:%d ",p1);
kenjiArai 0:e4c20fd769f1 397 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 398 t.tm_mday = (uint8_t)p1;
kenjiArai 0:e4c20fd769f1 399 PRINTF("Day:%d ",p1);
kenjiArai 0:e4c20fd769f1 400 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 401 t.tm_hour = (uint8_t)p1;
kenjiArai 0:e4c20fd769f1 402 PRINTF("Hour:%d ",p1);
kenjiArai 0:e4c20fd769f1 403 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 404 t.tm_min = (uint8_t)p1;
kenjiArai 0:e4c20fd769f1 405 PRINTF("Min:%d ",p1);
kenjiArai 0:e4c20fd769f1 406 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 407 t.tm_sec = (uint8_t)p1;
kenjiArai 0:e4c20fd769f1 408 PRINTF("Sec: %d \r\n",p1);
kenjiArai 0:e4c20fd769f1 409 } else {
kenjiArai 0:e4c20fd769f1 410 return;
kenjiArai 0:e4c20fd769f1 411 }
kenjiArai 0:e4c20fd769f1 412 seconds = mktime(&t);
kenjiArai 0:e4c20fd769f1 413 set_time(seconds);
kenjiArai 0:e4c20fd769f1 414 // Show Time with several example
kenjiArai 0:e4c20fd769f1 415 // ex.1
kenjiArai 13:44e5327acb05 416 pcr.printf(
kenjiArai 13:44e5327acb05 417 "Date: %04d/%02d/%02d, %02d:%02d:%02d\r\n",
kenjiArai 13:44e5327acb05 418 t.tm_year + 1900, t.tm_mon + 1, t.tm_mday, t.tm_hour, t.tm_min, t.tm_sec
kenjiArai 13:44e5327acb05 419 );
kenjiArai 0:e4c20fd769f1 420 #if 0
kenjiArai 0:e4c20fd769f1 421 time_t seconds;
kenjiArai 0:e4c20fd769f1 422 char buf[40];
kenjiArai 0:e4c20fd769f1 423
kenjiArai 0:e4c20fd769f1 424 seconds = mktime(&t);
kenjiArai 0:e4c20fd769f1 425 // ex.2
kenjiArai 0:e4c20fd769f1 426 strftime(buf, 40, "%x %X", localtime(&seconds));
kenjiArai 0:e4c20fd769f1 427 pcr.printf("Date: %s\r\n", buf);
kenjiArai 0:e4c20fd769f1 428 // ex.3
kenjiArai 0:e4c20fd769f1 429 strftime(buf, 40, "%I:%M:%S %p (%Y/%m/%d)", localtime(&seconds));
kenjiArai 0:e4c20fd769f1 430 pcr.printf("Date: %s\r\n", buf);
kenjiArai 0:e4c20fd769f1 431 // ex.4
kenjiArai 0:e4c20fd769f1 432 strftime(buf, 40, "%B %d,'%y, %H:%M:%S", localtime(&seconds));
kenjiArai 0:e4c20fd769f1 433 pcr.printf("Date: %s\r\n", buf);
kenjiArai 0:e4c20fd769f1 434 #endif
kenjiArai 0:e4c20fd769f1 435 }
kenjiArai 0:e4c20fd769f1 436
kenjiArai 0:e4c20fd769f1 437 void time_enter_mode(void)
kenjiArai 0:e4c20fd769f1 438 {
kenjiArai 0:e4c20fd769f1 439 char *ptr;
kenjiArai 0:e4c20fd769f1 440 char linebuf[64];
kenjiArai 0:e4c20fd769f1 441
kenjiArai 0:e4c20fd769f1 442 pcr.printf("\r\nSet time into RTC\r\n");
kenjiArai 13:44e5327acb05 443 pcr.printf(" e.g. >16 5 28 10 11 12 -> May 28th, '16, 10:11:12\r\n");
kenjiArai 0:e4c20fd769f1 444 pcr.printf(" If time is fine, just hit enter\r\n");
kenjiArai 0:e4c20fd769f1 445 pcr.putc('>');
kenjiArai 0:e4c20fd769f1 446 ptr = linebuf;
kenjiArai 0:e4c20fd769f1 447 get_line(ptr, sizeof(linebuf));
kenjiArai 0:e4c20fd769f1 448 pcr.printf("\r");
kenjiArai 0:e4c20fd769f1 449 chk_and_set_time(ptr);
kenjiArai 0:e4c20fd769f1 450 }
kenjiArai 0:e4c20fd769f1 451
kenjiArai 13:44e5327acb05 452 #if defined(TARGET_STM32L152RE)
kenjiArai 5:1a8e7aed053d 453 void goto_standby(void)
kenjiArai 2:765470eab2a6 454 {
kenjiArai 5:1a8e7aed053d 455 RCC->AHBENR |= (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN |
kenjiArai 5:1a8e7aed053d 456 RCC_AHBENR_GPIODEN | RCC_AHBENR_GPIOHEN);
kenjiArai 5:1a8e7aed053d 457 #if 0
kenjiArai 2:765470eab2a6 458 GPIO_InitTypeDef GPIO_InitStruct;
kenjiArai 2:765470eab2a6 459 // All other ports are analog input mode
kenjiArai 2:765470eab2a6 460 GPIO_InitStruct.Pin = GPIO_PIN_All;
kenjiArai 2:765470eab2a6 461 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
kenjiArai 2:765470eab2a6 462 GPIO_InitStruct.Pull = GPIO_NOPULL;
kenjiArai 2:765470eab2a6 463 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
kenjiArai 2:765470eab2a6 464 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 465 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 466 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 467 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 468 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 469 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
kenjiArai 5:1a8e7aed053d 470 #else
kenjiArai 5:1a8e7aed053d 471 GPIOA->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 472 GPIOB->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 473 GPIOC->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 474 GPIOD->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 475 GPIOE->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 476 GPIOH->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 477 #endif
kenjiArai 5:1a8e7aed053d 478 RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN |RCC_AHBENR_GPIOCEN |
kenjiArai 5:1a8e7aed053d 479 RCC_AHBENR_GPIODEN | RCC_AHBENR_GPIOHEN);
kenjiArai 2:765470eab2a6 480 while(1) {
kenjiArai 5:1a8e7aed053d 481 #if 0
kenjiArai 5:1a8e7aed053d 482 // Stop mode
kenjiArai 2:765470eab2a6 483 HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
kenjiArai 5:1a8e7aed053d 484 #else
kenjiArai 5:1a8e7aed053d 485 // Standby mode
kenjiArai 5:1a8e7aed053d 486 HAL_PWR_EnterSTANDBYMode();
kenjiArai 5:1a8e7aed053d 487 #endif
kenjiArai 2:765470eab2a6 488 }
kenjiArai 2:765470eab2a6 489 }
kenjiArai 13:44e5327acb05 490 #else // defined(TARGET_STM32L152RE)
kenjiArai 5:1a8e7aed053d 491 void goto_standby(void)
kenjiArai 2:765470eab2a6 492 {
kenjiArai 5:1a8e7aed053d 493 deepsleep(); // Not Standby Mode but Deep Sleep Mode
kenjiArai 2:765470eab2a6 494 }
kenjiArai 13:44e5327acb05 495 #endif // defined(TARGET_STM32L152RE)
kenjiArai 2:765470eab2a6 496
kenjiArai 13:44e5327acb05 497 #if defined(TARGET_STM32L152RE)
kenjiArai 2:765470eab2a6 498 #if defined(USE_IRQ_FOR_RTC_BKUP)
kenjiArai 2:765470eab2a6 499 // COMP2 Interrupt routine
kenjiArai 2:765470eab2a6 500 void irq_comp2_handler(void)
kenjiArai 2:765470eab2a6 501 {
kenjiArai 2:765470eab2a6 502 __disable_irq();
kenjiArai 5:1a8e7aed053d 503 goto_standby();
kenjiArai 2:765470eab2a6 504 }
kenjiArai 2:765470eab2a6 505
kenjiArai 2:765470eab2a6 506 COMP_HandleTypeDef COMP_HandleStruct;
kenjiArai 2:765470eab2a6 507 GPIO_InitTypeDef GPIO_InitStruct;
kenjiArai 2:765470eab2a6 508
kenjiArai 5:1a8e7aed053d 509 // Set BOR level3 (2.54 to 2.74V)
kenjiArai 5:1a8e7aed053d 510 void set_BOR_level3(void)
kenjiArai 2:765470eab2a6 511 {
kenjiArai 2:765470eab2a6 512 FLASH_OBProgramInitTypeDef my_flash;
kenjiArai 2:765470eab2a6 513
kenjiArai 2:765470eab2a6 514 HAL_FLASHEx_OBGetConfig(&my_flash); // read current configuration
kenjiArai 5:1a8e7aed053d 515 if (my_flash.BORLevel != OB_BOR_LEVEL3) {
kenjiArai 5:1a8e7aed053d 516 my_flash.BORLevel = OB_BOR_LEVEL3;
kenjiArai 2:765470eab2a6 517 HAL_FLASHEx_OBProgram(&my_flash);
kenjiArai 2:765470eab2a6 518 }
kenjiArai 2:765470eab2a6 519 }
kenjiArai 2:765470eab2a6 520
kenjiArai 7:fa32602e23ec 521 void set_5v_drop_detect(uint8_t function_use)
kenjiArai 2:765470eab2a6 522 {
kenjiArai 7:fa32602e23ec 523 if (function_use == 0){ return;}
kenjiArai 5:1a8e7aed053d 524 set_BOR_level3();
kenjiArai 2:765470eab2a6 525 // Set Analog voltage input (PB5 or PB6)
kenjiArai 2:765470eab2a6 526 #if defined(USE_PB5_FOR_COMP)
kenjiArai 2:765470eab2a6 527 GPIO_InitStruct.Pin = GPIO_PIN_5; // PB5 comp input
kenjiArai 2:765470eab2a6 528 #elif defined(USE_PB6_FOR_COMP)
kenjiArai 2:765470eab2a6 529 GPIO_InitStruct.Pin = GPIO_PIN_6; // PB6 comp input
kenjiArai 2:765470eab2a6 530 #else
kenjiArai 2:765470eab2a6 531 #error "Please define USE_PB5_FOR_COMP or USE_PB6_FOR_COMP in SetRTC.h"
kenjiArai 2:765470eab2a6 532 #endif
kenjiArai 2:765470eab2a6 533 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
kenjiArai 2:765470eab2a6 534 GPIO_InitStruct.Pull = GPIO_NOPULL;
kenjiArai 2:765470eab2a6 535 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
kenjiArai 2:765470eab2a6 536 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 537 // COMP2 sets for low volatage detection
kenjiArai 2:765470eab2a6 538 __COMP_CLK_ENABLE();
kenjiArai 2:765470eab2a6 539 COMP_HandleStruct.Instance = COMP2;
kenjiArai 2:765470eab2a6 540 COMP_HandleStruct.Init.InvertingInput = COMP_INVERTINGINPUT_VREFINT;
kenjiArai 2:765470eab2a6 541 #if defined(USE_PB5_FOR_COMP)
kenjiArai 2:765470eab2a6 542 COMP_HandleStruct.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_PB5;
kenjiArai 2:765470eab2a6 543 #elif defined(USE_PB6_FOR_COMP)
kenjiArai 2:765470eab2a6 544 COMP_HandleStruct.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_PB6;
kenjiArai 2:765470eab2a6 545 #endif
kenjiArai 2:765470eab2a6 546 COMP_HandleStruct.Init.Output = COMP_OUTPUT_NONE;
kenjiArai 2:765470eab2a6 547 COMP_HandleStruct.Init.Mode = COMP_MODE_HIGHSPEED;
kenjiArai 2:765470eab2a6 548 COMP_HandleStruct.Init.WindowMode = COMP_WINDOWMODE_DISABLED;
kenjiArai 2:765470eab2a6 549 COMP_HandleStruct.Init.TriggerMode = COMP_TRIGGERMODE_IT_FALLING;
kenjiArai 2:765470eab2a6 550 HAL_COMP_Init(&COMP_HandleStruct);
kenjiArai 2:765470eab2a6 551 // Interrupt configuration
kenjiArai 2:765470eab2a6 552 NVIC_SetVector(COMP_IRQn, (uint32_t)irq_comp2_handler);
kenjiArai 2:765470eab2a6 553 HAL_NVIC_SetPriority(COMP_IRQn, 0, 0);
kenjiArai 2:765470eab2a6 554 HAL_NVIC_ClearPendingIRQ(COMP_IRQn);
kenjiArai 2:765470eab2a6 555 HAL_COMP_Start_IT(&COMP_HandleStruct);
kenjiArai 2:765470eab2a6 556 HAL_NVIC_EnableIRQ(COMP_IRQn);
kenjiArai 2:765470eab2a6 557 }
kenjiArai 2:765470eab2a6 558 #else // defined(USE_IRQ_FOR_RTC_BKUP)
kenjiArai 7:fa32602e23ec 559 void set_5v_drop_detect(uint8_t function_use)
kenjiArai 2:765470eab2a6 560 {
kenjiArai 2:765470eab2a6 561 ; // No implementation
kenjiArai 2:765470eab2a6 562 }
kenjiArai 2:765470eab2a6 563 #endif // defined(USE_IRQ_FOR_RTC_BKUP)
kenjiArai 2:765470eab2a6 564
kenjiArai 13:44e5327acb05 565 #else // defined(TARGET_STM32L152RE)
kenjiArai 7:fa32602e23ec 566 void set_5v_drop_detect(uint8_t function_use)
kenjiArai 2:765470eab2a6 567 {
kenjiArai 2:765470eab2a6 568 ; // No implementation
kenjiArai 2:765470eab2a6 569 }
kenjiArai 13:44e5327acb05 570 #endif // defined(TARGET_STM32L152RE)
kenjiArai 2:765470eab2a6 571
kenjiArai 13:44e5327acb05 572 #else // defined(TARGET_STM32F401RE,_F411RE,_L152RE,_F334R8,_L476RG)
kenjiArai 0:e4c20fd769f1 573 #error "No suport this mbed, only for Nucleo mbed"
kenjiArai 13:44e5327acb05 574 #endif // defined(TARGET_STM32F401RE,_F411RE,_L152RE,_F334R8,_L476RG)