This is a RTC additional function. This is only for Nucleo F401RE & F411RE mbed(Added L152RE, F334R8, L476RG & F746xx). If you connected battery backup circuit for internal RTC, you can make a power-off and reset condition. RTC still has proper time and date.
Dependents: Nucleo_rtos_sample PB_Emma_Ethernet
Please refer following NOTE information.
/users/kenjiArai/notebook/nucleo-series-rtc-control-under-power-onoff-and-re/
Diff: SetRTC.cpp
- Revision:
- 13:44e5327acb05
- Parent:
- 10:16ee1c956319
- Child:
- 14:78e453d7bb85
--- a/SetRTC.cpp Fri Jan 29 07:35:34 2016 +0000 +++ b/SetRTC.cpp Fri May 27 20:16:09 2016 +0000 @@ -3,11 +3,11 @@ * Check & set RTC function and set proper clock if we can set * ONLY FOR "Nucleo Board" * - * Copyright (c) 2014-2015 Kenji Arai / JH1PJL + * Copyright (c) 2014,'15,'16 Kenji Arai / JH1PJL * http://www.page.sannet.ne.jp/kenjia/index.html * http://mbed.org/users/kenjiArai/ - * Created: October 24th, 2014 - * Revised: May 24th, 2015 + * Created: October 24th, 2014 + * Revised: May 28th, 2016 * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE @@ -16,8 +16,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) \ - || defined(TARGET_NUCLEO_L152RE) || defined(TARGET_NUCLEO_F334R8) +#if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \ + || defined(TARGET_STM32L152RE) || defined(TARGET_STM32F334R8) \ + || defined(TARGET_STM32L476RG) ) //#define DEBUG // use Communication with PC(UART) @@ -78,11 +79,19 @@ // Enable Power Clock __PWR_CLK_ENABLE(); // Enable write access to Backup domain +#if defined(TARGET_STM32L476RG) + PWR->CR1 |= PWR_CR1_DBP; +#else PWR->CR |= PWR_CR_DBP; +#endif // Wait for Backup domain Write protection disable timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE; PRINTF("Time-Out %d\r\n", timeout); +#if defined(TARGET_STM32L476RG) + while((PWR->CR1 & PWR_CR1_DBP) == RESET) { +#else while((PWR->CR & PWR_CR_DBP) == RESET) { +#endif if(HAL_GetTick() >= timeout) { PRINTF("Time-Out 1\r\n"); return 0; @@ -110,12 +119,12 @@ timeout = HAL_GetTick() + TIMEOUT; PRINTF("Time-Out %d\r\n", timeout); // Wait till LSE is ready -#if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)|| defined(TARGET_NUCLEO_F334R8) +#if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \ + || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) ) while((RCC->BDCR & 0x02) != 2){ -#else +#elif defined(TARGET_STM32L152RE) while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) { #endif -// while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) { if(HAL_GetTick() >= timeout) { PRINTF("Time-Out 3\r\n"); return 0; @@ -141,10 +150,18 @@ // Enable Power Clock __PWR_CLK_ENABLE(); // Enable write access to Backup domain +#if defined(TARGET_STM32L476RG) + PWR->CR1 |= PWR_CR1_DBP; +#else PWR->CR |= PWR_CR_DBP; +#endif // Wait for Backup domain Write protection disable timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE; +#if defined(TARGET_STM32L476RG) + while((PWR->CR1 & PWR_CR1_DBP) == RESET) { +#else while((PWR->CR & PWR_CR_DBP) == RESET) { +#endif if(HAL_GetTick() >= timeout) { return 0; } @@ -160,7 +177,7 @@ } } // Connect LSI to RTC -#if !defined(TARGET_NUCLEO_F334R8) +#if !(defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG)) __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI); #endif __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI); @@ -179,7 +196,8 @@ HAL_PWR_EnableBkUpAccess(); // Check backup condition if ( check_RTC_backup_reg() ) { -#if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F334R8) +#if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \ + || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) ) if ((RCC->BDCR & 0x8307) == 0x8103){ #else if ((RCC->CSR & 0x430703) == 0x410300) { @@ -207,7 +225,7 @@ // Enable LSE Oscillator if (set_RTC_LSE() == 1) { // Connect LSE to RTC -#if !defined(TARGET_NUCLEO_F334R8) +#if !(defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG)) __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE); #endif __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE); @@ -257,7 +275,8 @@ pcr.printf( " ISR =0x...%05x, PRER =0x..%06x, WUTR =0x....%04x\r\n", RTC->ISR, RTC->PRER, RTC->WUTR ); -#if !defined(TARGET_NUCLEO_F334R8) +#if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \ + || defined(TARGET_STM32L152RE) ) pcr.printf( " CALIBR=0x....%04x, ALRMAR=0x%08x, ALRMBR=0x%08x\r\n", RTC->CALIBR, RTC->ALRMAR, RTC->ALRMBR ); @@ -271,7 +290,8 @@ RTC->TSTR, RTC->TSDR, RTC->TSSSR ); pcr.printf( "Show RCC registers (only RTC Related reg.)\r\n" ); -#if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F334R8) +#if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \ + || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) ) pcr.printf( " RCC_BDCR=0x...%05x\r\n", RCC->BDCR); #else pcr.printf( " RCC_CSR =0x%08x\r\n", RCC->CSR); @@ -393,8 +413,10 @@ set_time(seconds); // Show Time with several example // ex.1 - pcr.printf("Date: %04d/%02d/%02d, %02d:%02d:%02d\r\n", - t.tm_year + 1900, t.tm_mon + 1, t.tm_mday, t.tm_hour, t.tm_min, t.tm_sec); + pcr.printf( + "Date: %04d/%02d/%02d, %02d:%02d:%02d\r\n", + t.tm_year + 1900, t.tm_mon + 1, t.tm_mday, t.tm_hour, t.tm_min, t.tm_sec + ); #if 0 time_t seconds; char buf[40]; @@ -418,7 +440,7 @@ char linebuf[64]; pcr.printf("\r\nSet time into RTC\r\n"); - pcr.printf(" e.g. >15 2 7 10 11 12 -> Feb. 7th, '15, 10:11:12\r\n"); + pcr.printf(" e.g. >16 5 28 10 11 12 -> May 28th, '16, 10:11:12\r\n"); pcr.printf(" If time is fine, just hit enter\r\n"); pcr.putc('>'); ptr = linebuf; @@ -427,7 +449,7 @@ chk_and_set_time(ptr); } -#if defined(TARGET_NUCLEO_L152RE) +#if defined(TARGET_STM32L152RE) void goto_standby(void) { RCC->AHBENR |= (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN | @@ -465,14 +487,14 @@ #endif } } -#else +#else // defined(TARGET_STM32L152RE) void goto_standby(void) { deepsleep(); // Not Standby Mode but Deep Sleep Mode } -#endif +#endif // defined(TARGET_STM32L152RE) -#if defined(TARGET_NUCLEO_L152RE) +#if defined(TARGET_STM32L152RE) #if defined(USE_IRQ_FOR_RTC_BKUP) // COMP2 Interrupt routine void irq_comp2_handler(void) @@ -540,13 +562,13 @@ } #endif // defined(USE_IRQ_FOR_RTC_BKUP) -#else // defined(TARGET_NUCLEO_L152RE) +#else // defined(TARGET_STM32L152RE) void set_5v_drop_detect(uint8_t function_use) { ; // No implementation } -#endif // defined(TARGET_NUCLEO_L152RE) +#endif // defined(TARGET_STM32L152RE) -#else // defined(TARGET_NUCLEO_F401RE,_F411RE,_L152RE,_F334R8) +#else // defined(TARGET_STM32F401RE,_F411RE,_L152RE,_F334R8,_L476RG) #error "No suport this mbed, only for Nucleo mbed" -#endif // defined(TARGET_NUCLEO_F401RE,_F411RE,_L152RE,_F334R8) +#endif // defined(TARGET_STM32F401RE,_F411RE,_L152RE,_F334R8,_L476RG)