This is sample program for Nucleo L152RE (and F401RE & F411RE) mbed-rtos. You need to modify mbed-src and mbed-rtos before compile it.

Dependencies:   mbed-rtos mbed-src SetRTC

Fork of GR-PEACH_test_on_rtos_works_well by Kenji Arai

Please refer below link.
/users/kenjiArai/notebook/necleo-l152re-rtos-sample-also-for-f401re--f411re-/

Revision:
10:1c0f58b9c048
Child:
11:587b8f1bab9d
diff -r de986e74bd93 -r 1c0f58b9c048 modification_notice.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/modification_notice.h	Sat May 16 00:43:39 2015 +0000
@@ -0,0 +1,251 @@
+/*
+ * mbed Application program for the mbed
+ *      Library differ part (This is only information document)
+ *
+ * Copyright (c) 2014,'15 Kenji Arai / JH1PJL
+ *  http://www.page.sannet.ne.jp/kenjia/index.html
+ *  http://mbed.org/users/kenjiArai/
+ *      Created: May       14th, 2015
+ *      Revised: May       16th, 2015
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+ * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+ 
+#if 0   ///////////////////////////////////////////////////////////////////////////////////////////
+
+//-------------------------------------------------------------------------------------------------
+// ----- Hardware configuration ---------------
+//-------------------------------------------------------------------------------------------------
+ 
+// Direct connection between below two pins.
+//     DAC0 output connected to ADC1 input
+PA_4 : PA_1
+//     DAC1 to ADC3
+PA_5 : PB_0
+//     I2C1 master connected to I2C2 slave
+PB_8 : PB_10  // Need 3.3Kohm pull-up
+PB_9 : PB_11  // Need 3.3Kohm pull-up
+// Connecetd with CR network
+// LED's connected each pin with R=330Ohm to GND
+PC_2
+PC_3
+PC_10
+PC_11
+PC_12
+
+//-------------------------------------------------------------------------------------------------
+// ----- Software Modification ---------------
+//-------------------------------------------------------------------------------------------------
+//  SUMMARY information
+//  Nucleo_rtos_sample
+    + debug_tools_L152_F4x1RE           <- Created as new lib.
+        + SetRTC                        <- Lib. updated by myself
+//      + files
+    + mbed-rtos                         <- Rev.76 (checked on May 16, 2015)
+//      + rtos
+//      + rtx
+//          + TARGET_CORTEX_M
+                + RTX_CM_lib.h          <- (1)  Need to modify before compile by yourself
+                + RTX_Conf_CM.c         <- (2)  Need to modify before compile by yourself
+//              + DIRs & Files
+//      + DIRs & Files + DIRs & Files
+    + mbe-src                           <- Rev.541 (checked on May 16, 2015)
+//      + targets
+//          + cmsis
+//              + TARGET_STM
+//                  + TARGET_STM32L1
+//                      + TARGET_NUCLEO_L152RE
+//                          + system_stm32l1xx.c
+                                        <- (3)  Need to modify before compile by yourself
+//                          + DIRs & Files
+//          + hal
+//              + TARGET_STM
+//                  + TARGET_STM32F4
+//                          + rtc_api.c
+                                        <- (4)  Need to modify before compile by yourself
+//                          + DIRs & Files
+//                  + TARGET_NUCLEO_L152RE
+//                          + rtc_api.c
+                                        <- (5)  Need to modify before compile by yourself
+//                          + DIRs & Files
+//      + DIR & Files + DIRs & Files + DIRs & Files
+
+(1) CAUTION!! for Nucleo L152RE mbed
+L152 mbed has following setting both mbed lib. and mbed-src lib.
+System Clock = 24 MHz (started as 32 MHz but due to USB clock creation, changed to 24 MHz)
+If you would like to use 24 MHz, do NOT modify (2)#ifndef OS_CLOCK related part and (3).
+
+(2) CAUTION!! for Nucleo F411RE mbed
+F411 med has been changed System clock = 96 MHz (former setting 100 MHz).
+Please modify #ifndef OS_CLOCK related part.
+
+//-------------------------------------------------------------------------------------------------
+//  (1) /mbed-rtos/mbed-rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
+//-------------------------------------------------------------------------------------------------
+// insert (line 262)
+// Copy & Paste from next line
+#elif defined(TARGET_STM32L152RE)
+#define INITIAL_SP            (0x20014000UL)
+// to above line
+
+//-------------------------------------------------------------------------------------------------
+//  (2) /mbed-rtos/mbed-rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
+//-------------------------------------------------------------------------------------------------
+// Modifiy (from line 51)
+// Copy & Paste from next line
+#ifndef OS_TASKCNT
+#  if   defined(TARGET_LPC1768) || defined(TARGET_LPC2368)   || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
+   || defined(TARGET_KL46Z) || defined(TARGET_KL43Z)  || defined(TARGET_STM32F407) || defined(TARGET_F407VG)  || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \
+   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600) || defined(TARGET_STM32L152RE)
+#    define OS_TASKCNT         14
+#  elif defined(TARGET_LPC11U24) || defined(TARGET_STM32F303RE) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
+   || defined(TARGET_LPC812)   || defined(TARGET_KL25Z)         || defined(TARGET_KL05Z)        || defined(TARGET_STM32F100RB)  || defined(TARGET_STM32F051R8) \
+   || defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) \
+   || defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC)
+#    define OS_TASKCNT         6
+#  else
+#    error "no target defined"
+#  endif
+#endif
+// to above line
+
+// Modifiy (from line 67)
+// Copy & Paste from next line
+#ifndef OS_SCHEDULERSTKSIZE
+#  if   defined(TARGET_LPC1768) || defined(TARGET_LPC2368)   || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347)  || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
+   || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG)  || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \
+   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600) || defined(TARGET_STM32L152RE)
+#      define OS_SCHEDULERSTKSIZE    256
+#  elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO)  || defined(TARGET_LPC1114) \
+   || defined(TARGET_LPC812)   || defined(TARGET_KL25Z)         || defined(TARGET_KL05Z)        || defined(TARGET_STM32F100RB)  || defined(TARGET_STM32F051R8) \
+   || defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC)
+#      define OS_SCHEDULERSTKSIZE    128
+#  elif defined(TARGET_STM32F334R8) || defined(TARGET_STM32F303RE) ||  defined(TARGET_STM32F334C8) || defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8)
+#      define OS_SCHEDULERSTKSIZE    112
+#  else
+#    error "no target defined"
+#  endif
+// to above line
+
+// Insert & Modifiy (from line 118)
+/*
+//  Insert (below 2 lines)
+#elif defined(TARGET_STM32L152RE)
+//#    define OS_CLOCK       24000000
+#    define OS_CLOCK       32000000
+//  Modify (100MHz to 96MHz)
+#  elif defined(TARGET_STM32F411RE)
+#     define OS_CLOCK      96000000
+*/
+// Copy & Paste from next line
+#ifndef OS_CLOCK
+#  if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
+#    define OS_CLOCK       96000000
+
+#  elif defined(TARGET_LPC1347) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32F303RE)
+#    define OS_CLOCK       72000000
+
+#  elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO)  || defined(TARGET_LPC1114) || defined(TARGET_KL25Z) \
+     || defined(TARGET_KL05Z) || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F051R8) || defined(TARGET_LPC11U68) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC)
+#    define OS_CLOCK       48000000
+
+#  elif defined(TARGET_LPC812)
+#    define OS_CLOCK       36000000
+
+#  elif defined(TARGET_LPC824)
+#    define OS_CLOCK       30000000
+
+#  elif  defined(TARGET_STM32F100RB)
+#    define OS_CLOCK       24000000
+
+#  elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_K64F) || defined(TARGET_K22F)
+#    define OS_CLOCK       120000000
+
+#  elif defined(TARGET_LPC4330)
+#    define OS_CLOCK       204000000
+
+#  elif defined(TARGET_LPC4337)
+#    define OS_CLOCK       204000000
+
+#  elif defined(TARGET_STM32F407) || defined(TARGET_F407VG)
+#    define OS_CLOCK       168000000
+
+#  elif defined(TARGET_STM32F401RE)
+#    define OS_CLOCK       84000000
+
+#  elif defined(TARGET_STM32F411RE)
+#     define OS_CLOCK      96000000
+
+#elif defined(TARGET_STM32F103RB) 
+#    define OS_CLOCK       72000000
+
+#elif defined(TARGET_STM32F429ZI)
+#    define OS_CLOCK       168000000
+
+#elif defined(TARGET_STM32F302R8)
+#    define OS_CLOCK       64000000
+
+#elif defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8)
+#    define OS_CLOCK       32000000
+
+#elif defined(TARGET_STM32F401VC)
+#    define OS_CLOCK       84000000
+
+#elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
+#    define OS_CLOCK       24000000
+
+#elif defined(TARGET_STM32L152RE)
+//#    define OS_CLOCK       24000000
+#    define OS_CLOCK       32000000
+
+#  else
+#    error "no target defined"
+#  endif
+#endif
+
+//   <o>Timer tick value [us] <1-1000000>
+//   <i> Defines the timer tick value.
+//   <i> Default: 1000  (1ms)
+#ifndef OS_TICK
+ #define OS_TICK        1000
+#endif
+// to above line
+
+//-------------------------------------------------------------------------------------------------
+//  (3) /mbed-src/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/system_stm32l1xx.c
+//-------------------------------------------------------------------------------------------------
+// inside SetSysClock_PLL_HSE() function (line 483)
+// Modify (from line 511)
+// Copy & Paste from next line
+#if 0
+  // SYSCLK = 24 MHz ((8 MHz * 6) / 2)
+  // USBCLK = 48 MHz (8 MHz * 6) --> USB OK
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL6;
+  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV2;
+#else
+  // SYSCLK = 32 MHz ((8 MHz * 8) / 2)
+  // USBCLK = 48 MHz (8 MHz * 8) --> USB NG
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL8;
+  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV2;
+#endif
+// to above line
+
+//-------------------------------------------------------------------------------------------------
+//  (4) /mbed-src/targets/hal/TARGET_STM/TARGET_STM/TARGET_STM32F4/rtc_api.c
+//-------------------------------------------------------------------------------------------------
+Please see /debug_tools_L152_F4x1RE/SetRTC/modify_info_F4xx.h
+
+//-------------------------------------------------------------------------------------------------
+//  (5) /mbed-src/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/rtc_api.c
+//-------------------------------------------------------------------------------------------------
+Please see /debug_tools_L152_F4x1RE/SetRTC/modify_info_L152.h
+
+#endif      ///////////////////////////////////////////////////////////////////////////////////////