Kenji Arai / Nucleo_rtos_sample

This is sample program for Nucleo L152RE (and F401RE & F411RE) mbed-rtos. You need to modify mbed-src and mbed-rtos before compile it.

Dependencies:   mbed-rtos mbed-src SetRTC

Fork of GR-PEACH_test_on_rtos_works_well by Kenji Arai

Please refer below link.
/users/kenjiArai/notebook/necleo-l152re-rtos-sample-also-for-f401re--f411re-/

debug_tools_L152_F4x1RE/mon_hw_STM32.cpp@13:d0d1da1fae4c, 2015-05-20 (annotated)

Committer:
kenjiArai
Date:
Wed May 20 10:49:02 2015 +0000
Revision:
13:d0d1da1fae4c
Parent:
10:1c0f58b9c048 
change L152 System clock (PLL VCO=96MHz) ->32MHz Clock

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 10:1c0f58b9c048 1 /*
kenjiArai 10:1c0f58b9c048 2 * mbed Application program for the ST NUCLEO Board
kenjiArai 10:1c0f58b9c048 3 * Monitor program Ver.3 for only for STM32F401RE,F411RE & STM32L152RE
kenjiArai 10:1c0f58b9c048 4 *
kenjiArai 10:1c0f58b9c048 5 * Copyright (c) 2010-2015 Kenji Arai / JH1PJL
kenjiArai 10:1c0f58b9c048 6 * http://www.page.sannet.ne.jp/kenjia/index.html
kenjiArai 10:1c0f58b9c048 7 * http://mbed.org/users/kenjiArai/
kenjiArai 10:1c0f58b9c048 8 * Started: May 9th, 2010
kenjiArai 10:1c0f58b9c048 9 * Created: May 15th, 2010
kenjiArai 10:1c0f58b9c048 10 * release as "monitor_01" http://mbed.org/users/kenjiArai/code/monitor_01/
kenjiArai 10:1c0f58b9c048 11 * Spareted: June 25th, 2014 mon() & mon_hw()
kenjiArai 10:1c0f58b9c048 12 * restart: July 12th, 2014
kenjiArai 10:1c0f58b9c048 13 * Revised: April 25th, 2015 Bug fix ('o' command) pointed out by Topi Makinen
kenjiArai 10:1c0f58b9c048 14 * Revised: April 26th, 2015 Change Port output speed (set High speed)
kenjiArai 10:1c0f58b9c048 15 * Revised: May 16th, 2015
kenjiArai 10:1c0f58b9c048 16 *
kenjiArai 10:1c0f58b9c048 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
kenjiArai 10:1c0f58b9c048 18 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
kenjiArai 10:1c0f58b9c048 19 * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
kenjiArai 10:1c0f58b9c048 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
kenjiArai 10:1c0f58b9c048 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
kenjiArai 10:1c0f58b9c048 22 */
kenjiArai 10:1c0f58b9c048 23
kenjiArai 10:1c0f58b9c048 24 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_L152RE)
kenjiArai 10:1c0f58b9c048 25
kenjiArai 10:1c0f58b9c048 26 // Include ---------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 27 #include "mbed.h"
kenjiArai 10:1c0f58b9c048 28 #include "debug_common.h"
kenjiArai 10:1c0f58b9c048 29 #include "mon_hw_config.h"
kenjiArai 10:1c0f58b9c048 30 #include "mon_hw_common.h"
kenjiArai 10:1c0f58b9c048 31 #include "mon_hw_STM32.h"
kenjiArai 10:1c0f58b9c048 32
kenjiArai 10:1c0f58b9c048 33 // Object ----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 34
kenjiArai 10:1c0f58b9c048 35 // Definition ------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 36 // USB Frequency
kenjiArai 10:1c0f58b9c048 37 #define USB_FREQ_H 48100000
kenjiArai 10:1c0f58b9c048 38 #define USB_FREQ_L 47900000
kenjiArai 10:1c0f58b9c048 39
kenjiArai 10:1c0f58b9c048 40 // RAM -------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 41 uint32_t SystemFrequency;
kenjiArai 10:1c0f58b9c048 42 uint8_t quitflag;
kenjiArai 10:1c0f58b9c048 43
kenjiArai 10:1c0f58b9c048 44 uint32_t reg_save0, reg_save1, reg_save2, reg_save3, reg_save4, reg_save5, reg_save6;
kenjiArai 10:1c0f58b9c048 45
kenjiArai 10:1c0f58b9c048 46 // ROM / Constant data ---------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 47 #if defined(TARGET_NUCLEO_F401RE)
kenjiArai 10:1c0f58b9c048 48 char *const xmon_msg =
kenjiArai 10:1c0f58b9c048 49 "HW monitor only for mbed Nucleo F401RE created on UTC:"__DATE__"("__TIME__")";
kenjiArai 10:1c0f58b9c048 50
kenjiArai 10:1c0f58b9c048 51 #if USE_MEM
kenjiArai 10:1c0f58b9c048 52 const uint32_t mem_range[][2] = { // Memory access range
kenjiArai 10:1c0f58b9c048 53 { 0x08000000, 0x0807ffff }, // On-chip Flash memory, 512KB Flash
kenjiArai 10:1c0f58b9c048 54 { 0x1fff0000, 0x1fff7a0f }, // System memory
kenjiArai 10:1c0f58b9c048 55 { 0x1fffc000, 0x1fffc007 }, // Option bytes
kenjiArai 10:1c0f58b9c048 56 { 0x20000000, 0x20017fff }, // Main Embedded SRAM, 96KB SRAM
kenjiArai 10:1c0f58b9c048 57 { 0x40000000, 0x5003ffff } // IO area
kenjiArai 10:1c0f58b9c048 58 };
kenjiArai 10:1c0f58b9c048 59 #endif // USE_MEM
kenjiArai 10:1c0f58b9c048 60 #elif defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 61 char *const xmon_msg =
kenjiArai 10:1c0f58b9c048 62 "HW monitor only for mbed Nucleo F411RE created on UTC:"__DATE__"("__TIME__")";
kenjiArai 10:1c0f58b9c048 63
kenjiArai 10:1c0f58b9c048 64 #if USE_MEM
kenjiArai 10:1c0f58b9c048 65 const uint32_t mem_range[][2] = { // Memory access range
kenjiArai 10:1c0f58b9c048 66 { 0x08000000, 0x0807ffff }, // On-chip Flash memory, 512KB Flash
kenjiArai 10:1c0f58b9c048 67 { 0x1fff0000, 0x1fff7a0f }, // System memory
kenjiArai 10:1c0f58b9c048 68 { 0x1fffc000, 0x1fffc007 }, // Option bytes
kenjiArai 10:1c0f58b9c048 69 { 0x20000000, 0x2001ffff }, // Main Embedded SRAM, 128KB SRAM
kenjiArai 10:1c0f58b9c048 70 { 0x40000000, 0x5003ffff } // IO area
kenjiArai 10:1c0f58b9c048 71 };
kenjiArai 10:1c0f58b9c048 72 #endif // USE_MEM
kenjiArai 10:1c0f58b9c048 73 #elif defined(TARGET_NUCLEO_L152RE)
kenjiArai 10:1c0f58b9c048 74 char *const xmon_msg =
kenjiArai 10:1c0f58b9c048 75 "HW monitor only for mbed Nucleo L152RE created on UTC:"__DATE__"("__TIME__")";
kenjiArai 10:1c0f58b9c048 76
kenjiArai 10:1c0f58b9c048 77 #if USE_MEM
kenjiArai 10:1c0f58b9c048 78 const uint32_t mem_range[][2] = { // Memory access range
kenjiArai 10:1c0f58b9c048 79 { 0x08000000, 0x0807ffff }, // On-chip Flash memory, 512KB Flash
kenjiArai 10:1c0f58b9c048 80 { 0x08080000, 0x08083fff }, // EEPROM, 16KB
kenjiArai 10:1c0f58b9c048 81 { 0x1ff00000, 0x1ff01fff }, // System memory
kenjiArai 10:1c0f58b9c048 82 { 0x1ff80000, 0x1ff8009f }, // Option bytes
kenjiArai 10:1c0f58b9c048 83 { 0x20000000, 0x20013fff }, // Main Embedded SRAM, 32KB SRAM
kenjiArai 10:1c0f58b9c048 84 { 0x40000000, 0x400267ff } // IO area
kenjiArai 10:1c0f58b9c048 85 };
kenjiArai 10:1c0f58b9c048 86 #endif // USE_MEM
kenjiArai 10:1c0f58b9c048 87 #endif
kenjiArai 10:1c0f58b9c048 88
kenjiArai 10:1c0f58b9c048 89 char *const hmsg0 = "m - Entry Memory Mode";
kenjiArai 10:1c0f58b9c048 90 char *const hmsg1 = "m>? -> Aditinal functions can see by ?";
kenjiArai 10:1c0f58b9c048 91 char *const hmsg2 = "r - Entry Register Mode";
kenjiArai 10:1c0f58b9c048 92 char *const hmsg3 = "r>? -> Aditinal functions can see by ?";
kenjiArai 10:1c0f58b9c048 93 char *const hmsg4 = "s - System Clock -> sf, System / CPU information -> sc";
kenjiArai 10:1c0f58b9c048 94 char *const hmsg5 = "q - Quit (back to called routine)";
kenjiArai 10:1c0f58b9c048 95 char *const hmsg6 = "p - Entry Port Mode";
kenjiArai 10:1c0f58b9c048 96 char *const hmsg7 = "p>? -> Aditinal functions can see by ?";
kenjiArai 10:1c0f58b9c048 97
kenjiArai 10:1c0f58b9c048 98 char *const mrmsg0 = "Enter Register Mode u,i,s,t,a,d,l,w,c & ? for help";
kenjiArai 10:1c0f58b9c048 99 #if (USE_UART==1) || (USE_SPI==1) || (USE_I2C == 1)
kenjiArai 10:1c0f58b9c048 100 char *const mrmsg1 = "------";
kenjiArai 10:1c0f58b9c048 101 char *const mrmsg2 = "USART";
kenjiArai 10:1c0f58b9c048 102 //
kenjiArai 10:1c0f58b9c048 103 char *const mrmsg4 = "I2C";
kenjiArai 10:1c0f58b9c048 104 //
kenjiArai 10:1c0f58b9c048 105 char *const mrmsg6 = "SPI";
kenjiArai 10:1c0f58b9c048 106 //
kenjiArai 10:1c0f58b9c048 107 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 108 char *const mrmsg3 = "Enter u1,u2,u6 and u* for all";
kenjiArai 10:1c0f58b9c048 109 char *const mrmsg5 = "Enter i1,i2,i3 and i* for all";
kenjiArai 10:1c0f58b9c048 110 char *const mrmsg7 = "Enter s1,s2,s3,s4 and s* for all";
kenjiArai 10:1c0f58b9c048 111 #elif defined(TARGET_NUCLEO_L152RE)
kenjiArai 10:1c0f58b9c048 112 char *const mrmsg3 = "Enter u1,u2,u3,u5 and u* for all";
kenjiArai 10:1c0f58b9c048 113 char *const mrmsg5 = "Enter i1,i2 and i* for all";
kenjiArai 10:1c0f58b9c048 114 char *const mrmsg7 = "Enter s1,s2,s3 and s* for all";
kenjiArai 10:1c0f58b9c048 115 #endif
kenjiArai 10:1c0f58b9c048 116 #endif // (USE_UART==1) || (USE_SPI==1) || (USE_I2C == 1)
kenjiArai 10:1c0f58b9c048 117 char *const mrmsg8 = "Return to All Mode";
kenjiArai 10:1c0f58b9c048 118
kenjiArai 10:1c0f58b9c048 119 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 120 // Control Program
kenjiArai 10:1c0f58b9c048 121 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 122 // No function
kenjiArai 10:1c0f58b9c048 123 static void not_yet_impliment( void )
kenjiArai 10:1c0f58b9c048 124 {
kenjiArai 10:1c0f58b9c048 125 PRINTF("Not implimented yet");
kenjiArai 10:1c0f58b9c048 126 put_rn();
kenjiArai 10:1c0f58b9c048 127 }
kenjiArai 10:1c0f58b9c048 128
kenjiArai 10:1c0f58b9c048 129 // No function
kenjiArai 10:1c0f58b9c048 130 #if (USE_MEM==0)||(USE_PORT==0)||(USE_UART==0)||(USE_SPI==0)||(USE_I2C==0)||(USE_SYS==0)
kenjiArai 10:1c0f58b9c048 131 static void not_select( void )
kenjiArai 10:1c0f58b9c048 132 {
kenjiArai 10:1c0f58b9c048 133 PRINTF("Not select the function (refer mon_hw_config.h)");
kenjiArai 10:1c0f58b9c048 134 put_rn();
kenjiArai 10:1c0f58b9c048 135 }
kenjiArai 10:1c0f58b9c048 136 #endif
kenjiArai 10:1c0f58b9c048 137
kenjiArai 10:1c0f58b9c048 138 // Help Massage
kenjiArai 10:1c0f58b9c048 139 void hw_msg_hlp ( void )
kenjiArai 10:1c0f58b9c048 140 {
kenjiArai 10:1c0f58b9c048 141 PRINTF(mon_msg);
kenjiArai 10:1c0f58b9c048 142 put_rn();
kenjiArai 10:1c0f58b9c048 143 PRINTF(hmsg0);
kenjiArai 10:1c0f58b9c048 144 put_rn();
kenjiArai 10:1c0f58b9c048 145 PRINTF(hmsg1);
kenjiArai 10:1c0f58b9c048 146 put_rn();
kenjiArai 10:1c0f58b9c048 147 PRINTF(hmsg6);
kenjiArai 10:1c0f58b9c048 148 put_rn();
kenjiArai 10:1c0f58b9c048 149 PRINTF(hmsg7);
kenjiArai 10:1c0f58b9c048 150 put_rn();
kenjiArai 10:1c0f58b9c048 151 PRINTF(hmsg2);
kenjiArai 10:1c0f58b9c048 152 put_rn();
kenjiArai 10:1c0f58b9c048 153 PRINTF(hmsg3);
kenjiArai 10:1c0f58b9c048 154 put_rn();
kenjiArai 10:1c0f58b9c048 155 PRINTF(hmsg4);
kenjiArai 10:1c0f58b9c048 156 put_rn();
kenjiArai 10:1c0f58b9c048 157 PRINTF(hmsg5);
kenjiArai 10:1c0f58b9c048 158 put_rn();
kenjiArai 10:1c0f58b9c048 159 }
kenjiArai 10:1c0f58b9c048 160
kenjiArai 10:1c0f58b9c048 161 #if USE_MEM
kenjiArai 10:1c0f58b9c048 162 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 163 char *const rmsg0 = "FLASH ";
kenjiArai 10:1c0f58b9c048 164 char *const rmsg1 = "SYS-Mem ";
kenjiArai 10:1c0f58b9c048 165 char *const rmsg2 = "OPTION ";
kenjiArai 10:1c0f58b9c048 166 char *const rmsg3 = "SRAM ";
kenjiArai 10:1c0f58b9c048 167 char *const rmsg4 = "IO ";
kenjiArai 10:1c0f58b9c048 168 #elif defined(TARGET_NUCLEO_L152RE)
kenjiArai 10:1c0f58b9c048 169 char *const rmsg0 = "FLASH ";
kenjiArai 10:1c0f58b9c048 170 char *const rmsg1 = "EEPROM ";
kenjiArai 10:1c0f58b9c048 171 char *const rmsg2 = "SYS-Mem ";
kenjiArai 10:1c0f58b9c048 172 char *const rmsg3 = "OPTION ";
kenjiArai 10:1c0f58b9c048 173 char *const rmsg4 = "SRAM ";
kenjiArai 10:1c0f58b9c048 174 char *const rmsg5 = "IO ";
kenjiArai 10:1c0f58b9c048 175 #endif
kenjiArai 10:1c0f58b9c048 176
kenjiArai 10:1c0f58b9c048 177 #include "mon_hw_mem.h"
kenjiArai 10:1c0f58b9c048 178 #endif // USE_MEM
kenjiArai 10:1c0f58b9c048 179
kenjiArai 10:1c0f58b9c048 180
kenjiArai 10:1c0f58b9c048 181 // Show 16bit register contents
kenjiArai 10:1c0f58b9c048 182 void reg_print(uint16_t size, uint16_t reg)
kenjiArai 10:1c0f58b9c048 183 {
kenjiArai 10:1c0f58b9c048 184 uint16_t i, j, k, n;
kenjiArai 10:1c0f58b9c048 185
kenjiArai 10:1c0f58b9c048 186 i = j = k = n = 0;
kenjiArai 10:1c0f58b9c048 187 switch (size) {
kenjiArai 10:1c0f58b9c048 188 case SIZE8:
kenjiArai 10:1c0f58b9c048 189 PRINTF(rgmsg0);
kenjiArai 10:1c0f58b9c048 190 put_rn();
kenjiArai 10:1c0f58b9c048 191 i = 8;
kenjiArai 10:1c0f58b9c048 192 n = 0x80;
kenjiArai 10:1c0f58b9c048 193 break;
kenjiArai 10:1c0f58b9c048 194 case SIZE16:
kenjiArai 10:1c0f58b9c048 195 PRINTF("%s%s", rgmsg1, rgmsg0);
kenjiArai 10:1c0f58b9c048 196 put_rn();
kenjiArai 10:1c0f58b9c048 197 i = 16;
kenjiArai 10:1c0f58b9c048 198 n = 0x8000;
kenjiArai 10:1c0f58b9c048 199 break;
kenjiArai 10:1c0f58b9c048 200 case SIZE32:
kenjiArai 10:1c0f58b9c048 201 PRINTF("0x%08x", reg);
kenjiArai 10:1c0f58b9c048 202 return;
kenjiArai 10:1c0f58b9c048 203 default :
kenjiArai 10:1c0f58b9c048 204 ;
kenjiArai 10:1c0f58b9c048 205 }
kenjiArai 10:1c0f58b9c048 206 PUTC(' ');
kenjiArai 10:1c0f58b9c048 207 for (; i>0; i--) {
kenjiArai 10:1c0f58b9c048 208 k = n >> (size-i);
kenjiArai 10:1c0f58b9c048 209 j = reg & k;
kenjiArai 10:1c0f58b9c048 210 if (j) {
kenjiArai 10:1c0f58b9c048 211 PUTC('1');
kenjiArai 10:1c0f58b9c048 212 } else {
kenjiArai 10:1c0f58b9c048 213 PUTC('0');
kenjiArai 10:1c0f58b9c048 214 }
kenjiArai 10:1c0f58b9c048 215 PUTC(' ');
kenjiArai 10:1c0f58b9c048 216 PUTC(' ');
kenjiArai 10:1c0f58b9c048 217 }
kenjiArai 10:1c0f58b9c048 218 PRINTF(" (0x%04x)", reg);
kenjiArai 10:1c0f58b9c048 219 }
kenjiArai 10:1c0f58b9c048 220
kenjiArai 10:1c0f58b9c048 221 #if USE_I2C
kenjiArai 10:1c0f58b9c048 222 void i2c_reg( I2C_TypeDef* I2Cx )
kenjiArai 10:1c0f58b9c048 223 {
kenjiArai 10:1c0f58b9c048 224 uint16_t reg;
kenjiArai 10:1c0f58b9c048 225
kenjiArai 10:1c0f58b9c048 226 put_rn();
kenjiArai 10:1c0f58b9c048 227 reg = I2Cx->CR1;
kenjiArai 10:1c0f58b9c048 228 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 229 PRINTF( rnmsg0 );
kenjiArai 10:1c0f58b9c048 230 PRINTF( imsg2 );
kenjiArai 10:1c0f58b9c048 231 put_rn();
kenjiArai 10:1c0f58b9c048 232 reg = I2Cx->CR2;
kenjiArai 10:1c0f58b9c048 233 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 234 PRINTF( rnmsg1 );
kenjiArai 10:1c0f58b9c048 235 PRINTF( imsg2 );
kenjiArai 10:1c0f58b9c048 236 put_rn();
kenjiArai 10:1c0f58b9c048 237 reg = I2Cx->SR1;
kenjiArai 10:1c0f58b9c048 238 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 239 PRINTF( rnmsg5 );
kenjiArai 10:1c0f58b9c048 240 PRINTF( imsg3 );
kenjiArai 10:1c0f58b9c048 241 put_rn();
kenjiArai 10:1c0f58b9c048 242 reg = I2Cx->SR2;
kenjiArai 10:1c0f58b9c048 243 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 244 PRINTF( rnmsg6 );
kenjiArai 10:1c0f58b9c048 245 PRINTF( imsg3 );
kenjiArai 10:1c0f58b9c048 246 put_rn();
kenjiArai 10:1c0f58b9c048 247 reg = I2Cx->DR;
kenjiArai 10:1c0f58b9c048 248 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 249 PRINTF( rnmsg2 );
kenjiArai 10:1c0f58b9c048 250 PRINTF( imsg4 );
kenjiArai 10:1c0f58b9c048 251 put_rn();
kenjiArai 10:1c0f58b9c048 252 reg = I2Cx->OAR1;
kenjiArai 10:1c0f58b9c048 253 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 254 PRINTF( rnmsg7 );
kenjiArai 10:1c0f58b9c048 255 PRINTF( imsg6 );
kenjiArai 10:1c0f58b9c048 256 put_rn();
kenjiArai 10:1c0f58b9c048 257 reg = I2Cx->OAR2;
kenjiArai 10:1c0f58b9c048 258 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 259 PRINTF( rnmsg8 );
kenjiArai 10:1c0f58b9c048 260 PRINTF( imsg6 );
kenjiArai 10:1c0f58b9c048 261 put_rn();
kenjiArai 10:1c0f58b9c048 262 reg = I2Cx->CCR;
kenjiArai 10:1c0f58b9c048 263 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 264 PRINTF( rnmsg9 );
kenjiArai 10:1c0f58b9c048 265 PRINTF( imsg7 );
kenjiArai 10:1c0f58b9c048 266 put_rn();
kenjiArai 10:1c0f58b9c048 267 reg = I2Cx->TRISE;
kenjiArai 10:1c0f58b9c048 268 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 269 PRINTF( rnmsg10 );
kenjiArai 10:1c0f58b9c048 270 PRINTF( imsg8 );
kenjiArai 10:1c0f58b9c048 271 put_rn();
kenjiArai 10:1c0f58b9c048 272 }
kenjiArai 10:1c0f58b9c048 273 #endif // USE_I2C
kenjiArai 10:1c0f58b9c048 274
kenjiArai 10:1c0f58b9c048 275 #if USE_SPI
kenjiArai 10:1c0f58b9c048 276 void spi_reg( SPI_TypeDef* SPIx )
kenjiArai 10:1c0f58b9c048 277 {
kenjiArai 10:1c0f58b9c048 278 uint16_t reg;
kenjiArai 10:1c0f58b9c048 279
kenjiArai 10:1c0f58b9c048 280 put_rn();
kenjiArai 10:1c0f58b9c048 281 reg = SPIx->CR1;
kenjiArai 10:1c0f58b9c048 282 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 283 PRINTF( rnmsg0 );
kenjiArai 10:1c0f58b9c048 284 PRINTF( imsg2 );
kenjiArai 10:1c0f58b9c048 285 put_rn();
kenjiArai 10:1c0f58b9c048 286 reg = SPIx->CR2;
kenjiArai 10:1c0f58b9c048 287 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 288 PRINTF( rnmsg1 );
kenjiArai 10:1c0f58b9c048 289 PRINTF( imsg2 );
kenjiArai 10:1c0f58b9c048 290 put_rn();
kenjiArai 10:1c0f58b9c048 291 reg = SPIx->SR;
kenjiArai 10:1c0f58b9c048 292 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 293 PRINTF( rnmsg3 );
kenjiArai 10:1c0f58b9c048 294 PRINTF( imsg3 );
kenjiArai 10:1c0f58b9c048 295 put_rn();
kenjiArai 10:1c0f58b9c048 296 reg = SPIx->DR;
kenjiArai 10:1c0f58b9c048 297 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 298 PRINTF( rnmsg2 );
kenjiArai 10:1c0f58b9c048 299 PRINTF( imsg4 );
kenjiArai 10:1c0f58b9c048 300 put_rn();
kenjiArai 10:1c0f58b9c048 301 }
kenjiArai 10:1c0f58b9c048 302 #endif // USE_SPI
kenjiArai 10:1c0f58b9c048 303
kenjiArai 10:1c0f58b9c048 304 #if USE_UART
kenjiArai 10:1c0f58b9c048 305 void usart_reg( USART_TypeDef* USARTx )
kenjiArai 10:1c0f58b9c048 306 {
kenjiArai 10:1c0f58b9c048 307 uint16_t reg;
kenjiArai 10:1c0f58b9c048 308
kenjiArai 10:1c0f58b9c048 309 put_rn();
kenjiArai 10:1c0f58b9c048 310 reg = USARTx->SR;
kenjiArai 10:1c0f58b9c048 311 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 312 PRINTF( rnmsg3 );
kenjiArai 10:1c0f58b9c048 313 PRINTF( imsg3 );
kenjiArai 10:1c0f58b9c048 314 put_rn();
kenjiArai 10:1c0f58b9c048 315 reg = USARTx->DR;
kenjiArai 10:1c0f58b9c048 316 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 317 PRINTF( rnmsg2 );
kenjiArai 10:1c0f58b9c048 318 PRINTF( imsg4 );
kenjiArai 10:1c0f58b9c048 319 put_rn();
kenjiArai 10:1c0f58b9c048 320 reg = USARTx->BRR;
kenjiArai 10:1c0f58b9c048 321 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 322 PRINTF( rnmsg4 );
kenjiArai 10:1c0f58b9c048 323 PRINTF( imsg5 );
kenjiArai 10:1c0f58b9c048 324 put_rn();
kenjiArai 10:1c0f58b9c048 325 reg = USARTx->CR1;
kenjiArai 10:1c0f58b9c048 326 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 327 PRINTF( rnmsg0 );
kenjiArai 10:1c0f58b9c048 328 PRINTF( imsg2 );
kenjiArai 10:1c0f58b9c048 329 put_rn();
kenjiArai 10:1c0f58b9c048 330 reg = USARTx->CR2;
kenjiArai 10:1c0f58b9c048 331 reg_print( SIZE32, reg );
kenjiArai 10:1c0f58b9c048 332 PRINTF( rnmsg1 );
kenjiArai 10:1c0f58b9c048 333 PRINTF( imsg2 );
kenjiArai 10:1c0f58b9c048 334 put_rn();
kenjiArai 10:1c0f58b9c048 335 }
kenjiArai 10:1c0f58b9c048 336 #endif // USE_UART
kenjiArai 10:1c0f58b9c048 337
kenjiArai 10:1c0f58b9c048 338 #if USE_PORT
kenjiArai 10:1c0f58b9c048 339 void rpt_port_one( GPIO_TypeDef* GPIOx )
kenjiArai 10:1c0f58b9c048 340 {
kenjiArai 10:1c0f58b9c048 341 uint32_t i;
kenjiArai 10:1c0f58b9c048 342
kenjiArai 10:1c0f58b9c048 343 PRINTF( " " );
kenjiArai 10:1c0f58b9c048 344 i = GPIOx->MODER;
kenjiArai 10:1c0f58b9c048 345 PRINTF( "0x%08x",i );
kenjiArai 10:1c0f58b9c048 346 i = GPIOx->OTYPER;
kenjiArai 10:1c0f58b9c048 347 PRINTF( " 0x%04x",i );
kenjiArai 10:1c0f58b9c048 348 i = GPIOx->OSPEEDR;
kenjiArai 10:1c0f58b9c048 349 PRINTF( " 0x%08x",i );
kenjiArai 10:1c0f58b9c048 350 i = GPIOx->PUPDR;
kenjiArai 10:1c0f58b9c048 351 PRINTF( " 0x%08x",i );
kenjiArai 10:1c0f58b9c048 352 i = GPIOx->IDR;
kenjiArai 10:1c0f58b9c048 353 PRINTF( " 0x%04x",i );
kenjiArai 10:1c0f58b9c048 354 i = GPIOx->ODR;
kenjiArai 10:1c0f58b9c048 355 PRINTF( " 0x%04x",i );
kenjiArai 10:1c0f58b9c048 356 put_rn();
kenjiArai 10:1c0f58b9c048 357 }
kenjiArai 10:1c0f58b9c048 358
kenjiArai 10:1c0f58b9c048 359 void rpt_port( void )
kenjiArai 10:1c0f58b9c048 360 {
kenjiArai 10:1c0f58b9c048 361 PRINTF( pnmsg0 );
kenjiArai 10:1c0f58b9c048 362 PRINTF( pnmsg1 );
kenjiArai 10:1c0f58b9c048 363 put_rn();
kenjiArai 10:1c0f58b9c048 364 PRINTF( pnmsga );
kenjiArai 10:1c0f58b9c048 365 rpt_port_one( GPIOA );
kenjiArai 10:1c0f58b9c048 366 PRINTF( pnmsgb );
kenjiArai 10:1c0f58b9c048 367 rpt_port_one( GPIOB );
kenjiArai 10:1c0f58b9c048 368 PRINTF( pnmsgc );
kenjiArai 10:1c0f58b9c048 369 rpt_port_one( GPIOC );
kenjiArai 10:1c0f58b9c048 370 PRINTF( pnmsgd );
kenjiArai 10:1c0f58b9c048 371 rpt_port_one( GPIOD );
kenjiArai 10:1c0f58b9c048 372 PRINTF( pnmsge );
kenjiArai 10:1c0f58b9c048 373 rpt_port_one( GPIOE );
kenjiArai 10:1c0f58b9c048 374 PRINTF( pnmsgh );
kenjiArai 10:1c0f58b9c048 375 rpt_port_one( GPIOH );
kenjiArai 10:1c0f58b9c048 376 }
kenjiArai 10:1c0f58b9c048 377
kenjiArai 10:1c0f58b9c048 378 void port_inf_one( char *ptr )
kenjiArai 10:1c0f58b9c048 379 {
kenjiArai 10:1c0f58b9c048 380 GPIO_TypeDef* GPIOx;
kenjiArai 10:1c0f58b9c048 381 uint32_t i,j;
kenjiArai 10:1c0f58b9c048 382 uint32_t pinpos;
kenjiArai 10:1c0f58b9c048 383
kenjiArai 10:1c0f58b9c048 384 GPIOx = 0;
kenjiArai 10:1c0f58b9c048 385 PRINTF( pnmsg2 );
kenjiArai 10:1c0f58b9c048 386 switch ( *ptr ) {
kenjiArai 10:1c0f58b9c048 387 case 'a':
kenjiArai 10:1c0f58b9c048 388 GPIOx = GPIOA;
kenjiArai 10:1c0f58b9c048 389 PUTC( 'A' );
kenjiArai 10:1c0f58b9c048 390 break;
kenjiArai 10:1c0f58b9c048 391 case 'b':
kenjiArai 10:1c0f58b9c048 392 GPIOx = GPIOB;
kenjiArai 10:1c0f58b9c048 393 PUTC( 'B' );
kenjiArai 10:1c0f58b9c048 394 break;
kenjiArai 10:1c0f58b9c048 395 case 'c':
kenjiArai 10:1c0f58b9c048 396 GPIOx = GPIOC;
kenjiArai 10:1c0f58b9c048 397 PUTC( 'C' );
kenjiArai 10:1c0f58b9c048 398 break;
kenjiArai 10:1c0f58b9c048 399 case 'd':
kenjiArai 10:1c0f58b9c048 400 GPIOx = GPIOD;
kenjiArai 10:1c0f58b9c048 401 PUTC( 'D' );
kenjiArai 10:1c0f58b9c048 402 break;
kenjiArai 10:1c0f58b9c048 403 case 'e':
kenjiArai 10:1c0f58b9c048 404 GPIOx = GPIOE;
kenjiArai 10:1c0f58b9c048 405 PUTC( 'E' );
kenjiArai 10:1c0f58b9c048 406 break;
kenjiArai 10:1c0f58b9c048 407 case 'h':
kenjiArai 10:1c0f58b9c048 408 GPIOx = GPIOH;
kenjiArai 10:1c0f58b9c048 409 PUTC( 'H' );
kenjiArai 10:1c0f58b9c048 410 break;
kenjiArai 10:1c0f58b9c048 411 }
kenjiArai 10:1c0f58b9c048 412 i = GPIOx->MODER;
kenjiArai 10:1c0f58b9c048 413 put_rn();
kenjiArai 10:1c0f58b9c048 414 PRINTF( "-->Mode Reg. (0x%08x)",i );
kenjiArai 10:1c0f58b9c048 415 put_rn();
kenjiArai 10:1c0f58b9c048 416 for ( pinpos = 0x00; pinpos < 16; pinpos++ ) {
kenjiArai 10:1c0f58b9c048 417 j = GPIO_MODER_MODER0 & (i >> (pinpos * 2));
kenjiArai 10:1c0f58b9c048 418 switch (j) {
kenjiArai 10:1c0f58b9c048 419 case GPIO_Mode_IN:
kenjiArai 10:1c0f58b9c048 420 PRINTF( "%2d= in", pinpos );
kenjiArai 10:1c0f58b9c048 421 break;
kenjiArai 10:1c0f58b9c048 422 case GPIO_Mode_OUT:
kenjiArai 10:1c0f58b9c048 423 PRINTF( "%2d=out", pinpos );
kenjiArai 10:1c0f58b9c048 424 break;
kenjiArai 10:1c0f58b9c048 425 case GPIO_Mode_AF:
kenjiArai 10:1c0f58b9c048 426 PRINTF( "%2d=alt", pinpos );
kenjiArai 10:1c0f58b9c048 427 break;
kenjiArai 10:1c0f58b9c048 428 case GPIO_Mode_AN:
kenjiArai 10:1c0f58b9c048 429 PRINTF( "%2d=ana", pinpos );
kenjiArai 10:1c0f58b9c048 430 break;
kenjiArai 10:1c0f58b9c048 431 default:
kenjiArai 10:1c0f58b9c048 432 break;
kenjiArai 10:1c0f58b9c048 433 }
kenjiArai 10:1c0f58b9c048 434 if ( (pinpos == 3) && (*ptr == 'h') ) {
kenjiArai 10:1c0f58b9c048 435 break;
kenjiArai 10:1c0f58b9c048 436 } else {
kenjiArai 10:1c0f58b9c048 437 if ( pinpos == 7 ) {
kenjiArai 10:1c0f58b9c048 438 put_rn();
kenjiArai 10:1c0f58b9c048 439 } else if ( pinpos == 15 ) {
kenjiArai 10:1c0f58b9c048 440 ;
kenjiArai 10:1c0f58b9c048 441 } else {
kenjiArai 10:1c0f58b9c048 442 PRINTF(", ");
kenjiArai 10:1c0f58b9c048 443 }
kenjiArai 10:1c0f58b9c048 444 }
kenjiArai 10:1c0f58b9c048 445 }
kenjiArai 10:1c0f58b9c048 446 i = GPIOx->OTYPER;
kenjiArai 10:1c0f58b9c048 447 put_rn();
kenjiArai 10:1c0f58b9c048 448 PRINTF( "%s type 1=push-pull, 0= open-drain", pnmsg4 );
kenjiArai 10:1c0f58b9c048 449 put_rn();
kenjiArai 10:1c0f58b9c048 450 reg_print( SIZE32,i);
kenjiArai 10:1c0f58b9c048 451 i = GPIOx->OSPEEDR;
kenjiArai 10:1c0f58b9c048 452 PRINTF( "%s speed [MHz] (0x%08x)", pnmsg4, i );
kenjiArai 10:1c0f58b9c048 453 put_rn();
kenjiArai 10:1c0f58b9c048 454 for ( pinpos = 0x00; pinpos < 16; pinpos++ ) {
kenjiArai 10:1c0f58b9c048 455 j = GPIO_OSPEEDER_OSPEEDR0 & (i >> (pinpos * 2));
kenjiArai 10:1c0f58b9c048 456 switch (j) {
kenjiArai 10:1c0f58b9c048 457 case GPIO_Speed_400KHz:
kenjiArai 10:1c0f58b9c048 458 PRINTF( "%2d=0.4", pinpos );
kenjiArai 10:1c0f58b9c048 459 break;
kenjiArai 10:1c0f58b9c048 460 case GPIO_Speed_2MHz:
kenjiArai 10:1c0f58b9c048 461 PRINTF( "%2d= 2", pinpos );
kenjiArai 10:1c0f58b9c048 462 break;
kenjiArai 10:1c0f58b9c048 463 case GPIO_Speed_10MHz:
kenjiArai 10:1c0f58b9c048 464 PRINTF( "%2d= 10", pinpos );
kenjiArai 10:1c0f58b9c048 465 break;
kenjiArai 10:1c0f58b9c048 466 case GPIO_Speed_40MHz:
kenjiArai 10:1c0f58b9c048 467 PRINTF( "%2d= 40", pinpos );
kenjiArai 10:1c0f58b9c048 468 break;
kenjiArai 10:1c0f58b9c048 469 default:
kenjiArai 10:1c0f58b9c048 470 break;
kenjiArai 10:1c0f58b9c048 471 }
kenjiArai 10:1c0f58b9c048 472 if ( (pinpos == 3) && (*ptr == 'h') ) {
kenjiArai 10:1c0f58b9c048 473 break;
kenjiArai 10:1c0f58b9c048 474 } else {
kenjiArai 10:1c0f58b9c048 475 if ( pinpos == 7 ) {
kenjiArai 10:1c0f58b9c048 476 put_rn();
kenjiArai 10:1c0f58b9c048 477 } else if ( pinpos == 15) {
kenjiArai 10:1c0f58b9c048 478 ;
kenjiArai 10:1c0f58b9c048 479 } else {
kenjiArai 10:1c0f58b9c048 480 PRINTF(", ");
kenjiArai 10:1c0f58b9c048 481 }
kenjiArai 10:1c0f58b9c048 482 }
kenjiArai 10:1c0f58b9c048 483 }
kenjiArai 10:1c0f58b9c048 484 i = GPIOx->PUPDR;
kenjiArai 10:1c0f58b9c048 485 put_rn();
kenjiArai 10:1c0f58b9c048 486 PRINTF( "-->Pullup(pup)/down(pdn) none(no)(0x%08x)",i );
kenjiArai 10:1c0f58b9c048 487 put_rn();
kenjiArai 10:1c0f58b9c048 488 for ( pinpos = 0x00; pinpos < 16; pinpos++ ) {
kenjiArai 10:1c0f58b9c048 489 j = GPIO_PUPDR_PUPDR0 & (i >> (pinpos * 2));
kenjiArai 10:1c0f58b9c048 490 switch (j) {
kenjiArai 10:1c0f58b9c048 491 case GPIO_PuPd_NOPULL:
kenjiArai 10:1c0f58b9c048 492 PRINTF( "%2d= no", pinpos );
kenjiArai 10:1c0f58b9c048 493 break;
kenjiArai 10:1c0f58b9c048 494 case GPIO_PuPd_UP:
kenjiArai 10:1c0f58b9c048 495 PRINTF( "%2d=pup", pinpos );
kenjiArai 10:1c0f58b9c048 496 break;
kenjiArai 10:1c0f58b9c048 497 case GPIO_PuPd_DOWN:
kenjiArai 10:1c0f58b9c048 498 PRINTF( "%2d=pdn", pinpos );
kenjiArai 10:1c0f58b9c048 499 break;
kenjiArai 10:1c0f58b9c048 500 default:
kenjiArai 10:1c0f58b9c048 501 break;
kenjiArai 10:1c0f58b9c048 502 }
kenjiArai 10:1c0f58b9c048 503 if ( (pinpos == 3) && (*ptr == 'h') ) {
kenjiArai 10:1c0f58b9c048 504 break;
kenjiArai 10:1c0f58b9c048 505 } else {
kenjiArai 10:1c0f58b9c048 506 if ( pinpos == 7 ) {
kenjiArai 10:1c0f58b9c048 507 put_rn();
kenjiArai 10:1c0f58b9c048 508 } else if ( pinpos == 15 ) {
kenjiArai 10:1c0f58b9c048 509 ;
kenjiArai 10:1c0f58b9c048 510 } else {
kenjiArai 10:1c0f58b9c048 511 PRINTF(", ");
kenjiArai 10:1c0f58b9c048 512 }
kenjiArai 10:1c0f58b9c048 513 }
kenjiArai 10:1c0f58b9c048 514 }
kenjiArai 10:1c0f58b9c048 515 put_rn();
kenjiArai 10:1c0f58b9c048 516 PRINTF( "%s %s", pnmsg5, pnmsg6);
kenjiArai 10:1c0f58b9c048 517 i = GPIOx->IDR;
kenjiArai 10:1c0f58b9c048 518 reg_print( SIZE32,i);
kenjiArai 10:1c0f58b9c048 519 put_rn();
kenjiArai 10:1c0f58b9c048 520 PRINTF( "%s %s", pnmsg4, pnmsg6);
kenjiArai 10:1c0f58b9c048 521 i = GPIOx->ODR;
kenjiArai 10:1c0f58b9c048 522 reg_print( SIZE32,i);
kenjiArai 10:1c0f58b9c048 523 put_rn();
kenjiArai 10:1c0f58b9c048 524 }
kenjiArai 10:1c0f58b9c048 525 #endif // USE_PORT
kenjiArai 10:1c0f58b9c048 526
kenjiArai 10:1c0f58b9c048 527 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 528 void port_mco1_mco2_set(uint8_t n)
kenjiArai 10:1c0f58b9c048 529 {
kenjiArai 10:1c0f58b9c048 530 GPIO_TypeDef* GPIOx = 0;
kenjiArai 10:1c0f58b9c048 531 uint32_t temp = 0x00;
kenjiArai 10:1c0f58b9c048 532
kenjiArai 10:1c0f58b9c048 533 if (n == 0){ // Just save the original setting
kenjiArai 10:1c0f58b9c048 534 // PA8 -> MCO_1
kenjiArai 10:1c0f58b9c048 535 GPIOx = GPIOA;
kenjiArai 10:1c0f58b9c048 536 reg_save0 = GPIOx->AFR[8 >> 3];
kenjiArai 10:1c0f58b9c048 537 reg_save1 = GPIOx->MODER;
kenjiArai 10:1c0f58b9c048 538 reg_save2 = GPIOx->OSPEEDR;
kenjiArai 10:1c0f58b9c048 539 GPIOx = GPIOC;
kenjiArai 10:1c0f58b9c048 540 reg_save3 = GPIOx->AFR[9 >> 3];
kenjiArai 10:1c0f58b9c048 541 reg_save4 = GPIOx->MODER;
kenjiArai 10:1c0f58b9c048 542 reg_save5 = GPIOx->OSPEEDR;
kenjiArai 10:1c0f58b9c048 543 reg_save6 = RCC->CFGR;
kenjiArai 10:1c0f58b9c048 544 } else {
kenjiArai 10:1c0f58b9c048 545 // PA8 -> MCO_1
kenjiArai 10:1c0f58b9c048 546 GPIOx = GPIOA;
kenjiArai 10:1c0f58b9c048 547 temp = ((uint32_t)(GPIO_AF0_MCO) << (((uint32_t)8 & (uint32_t)0x07) * 4)) ;
kenjiArai 10:1c0f58b9c048 548 GPIOx->AFR[8 >> 3] &= ~((uint32_t)0xf << ((uint32_t)(8 & (uint32_t)0x07) * 4)) ;
kenjiArai 10:1c0f58b9c048 549 GPIOx->AFR[8 >> 3] |= temp;
kenjiArai 10:1c0f58b9c048 550 GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (8 * 2));
kenjiArai 10:1c0f58b9c048 551 GPIOx->MODER |= (0x2 << (8 * 2));
kenjiArai 10:1c0f58b9c048 552 GPIOx->OSPEEDR |= (0x03 << (8 * 2)); // High speed
kenjiArai 10:1c0f58b9c048 553 // PC9 -> MCO_2
kenjiArai 10:1c0f58b9c048 554 GPIOx = GPIOC;
kenjiArai 10:1c0f58b9c048 555 temp = ((uint32_t)(GPIO_AF0_MCO) << (((uint32_t)9 & (uint32_t)0x07) * 4)) ;
kenjiArai 10:1c0f58b9c048 556 GPIOx->AFR[9 >> 3] &= ~((uint32_t)0xf << ((uint32_t)(9 & (uint32_t)0x07) * 4)) ;
kenjiArai 10:1c0f58b9c048 557 GPIOx->AFR[9 >> 3] |= temp;
kenjiArai 10:1c0f58b9c048 558 GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (9 * 2));
kenjiArai 10:1c0f58b9c048 559 GPIOx->MODER |= (0x2 << (9 * 2));
kenjiArai 10:1c0f58b9c048 560 GPIOx->OSPEEDR |= (0x03 << (9 * 2)); // High speed
kenjiArai 10:1c0f58b9c048 561 // Select output clock source
kenjiArai 10:1c0f58b9c048 562 RCC->CFGR &= 0x009fffff;
kenjiArai 10:1c0f58b9c048 563 if (n == 1){
kenjiArai 10:1c0f58b9c048 564 // MC0_1 output HSE 1/4, MCO_2 output SYSCLK 1/4
kenjiArai 10:1c0f58b9c048 565 // MCO2 MCO2PRE MCO1PRE MCO1
kenjiArai 10:1c0f58b9c048 566 RCC->CFGR |= (0x0 << 30) + (0x6 << 27) + (0x6 << 24) + (0x3 << 22);
kenjiArai 10:1c0f58b9c048 567 } else {
kenjiArai 10:1c0f58b9c048 568 // MC0_1 output HSE 1/1, MCO_2 output SYSCLK 1/2
kenjiArai 10:1c0f58b9c048 569 // MCO2 MCO2PRE MCO1PRE MCO1
kenjiArai 10:1c0f58b9c048 570 RCC->CFGR |= (0x0 << 30) + (0x4 << 27) + (0x0 << 24) + (0x3 << 22);
kenjiArai 10:1c0f58b9c048 571 }
kenjiArai 10:1c0f58b9c048 572 }
kenjiArai 10:1c0f58b9c048 573 }
kenjiArai 10:1c0f58b9c048 574
kenjiArai 10:1c0f58b9c048 575 void port_mco1_mco2_recover(void)
kenjiArai 10:1c0f58b9c048 576 {
kenjiArai 10:1c0f58b9c048 577 GPIO_TypeDef* GPIOx = 0;
kenjiArai 10:1c0f58b9c048 578
kenjiArai 10:1c0f58b9c048 579 // PA8 -> MCO_1
kenjiArai 10:1c0f58b9c048 580 GPIOx = GPIOA;
kenjiArai 10:1c0f58b9c048 581 GPIOx->AFR[8 >> 3] = reg_save0;
kenjiArai 10:1c0f58b9c048 582 GPIOx->MODER = reg_save1;
kenjiArai 10:1c0f58b9c048 583 GPIOx->OSPEEDR = reg_save2;
kenjiArai 10:1c0f58b9c048 584 // PC9 -> MCO_2
kenjiArai 10:1c0f58b9c048 585 GPIOx = GPIOC;
kenjiArai 10:1c0f58b9c048 586 GPIOx->AFR[9 >> 3] = reg_save3;
kenjiArai 10:1c0f58b9c048 587 GPIOx->MODER = reg_save4;
kenjiArai 10:1c0f58b9c048 588 GPIOx->OSPEEDR = reg_save5;
kenjiArai 10:1c0f58b9c048 589 // MC0_1 & MCO_2
kenjiArai 10:1c0f58b9c048 590 RCC->CFGR = reg_save6;
kenjiArai 10:1c0f58b9c048 591 }
kenjiArai 10:1c0f58b9c048 592 #endif // defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 593
kenjiArai 10:1c0f58b9c048 594 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 595 void cpu_inf( char *ptr )
kenjiArai 10:1c0f58b9c048 596 {
kenjiArai 10:1c0f58b9c048 597 uint32_t m1 = 0, m2 = 0, m3 = 0, m4 = 0, m5 = 0;
kenjiArai 10:1c0f58b9c048 598
kenjiArai 10:1c0f58b9c048 599 switch (*ptr++) {
kenjiArai 10:1c0f58b9c048 600 case 'f' : // sc - show system clock frequency
kenjiArai 10:1c0f58b9c048 601 m1 = RCC->CR;
kenjiArai 10:1c0f58b9c048 602 PRINTF( "CR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 603 put_rn();
kenjiArai 10:1c0f58b9c048 604 m1 = RCC->PLLCFGR;
kenjiArai 10:1c0f58b9c048 605 PRINTF( "PLLCFGR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 606 put_rn();
kenjiArai 10:1c0f58b9c048 607 m1 = RCC->CFGR;
kenjiArai 10:1c0f58b9c048 608 PRINTF( "CFGR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 609 put_rn();
kenjiArai 10:1c0f58b9c048 610 m1 = RCC->CIR;
kenjiArai 10:1c0f58b9c048 611 PRINTF( "CIR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 612 put_rn();
kenjiArai 10:1c0f58b9c048 613 m1 = RCC->AHB1RSTR;
kenjiArai 10:1c0f58b9c048 614 PRINTF( "AHB1RSTR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 615 put_rn();
kenjiArai 10:1c0f58b9c048 616 m1 = RCC->APB2RSTR;
kenjiArai 10:1c0f58b9c048 617 PRINTF( "APB2RSTR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 618 put_rn();
kenjiArai 10:1c0f58b9c048 619 m1 = RCC->APB1RSTR;
kenjiArai 10:1c0f58b9c048 620 PRINTF( "APB1RSTR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 621 put_rn();
kenjiArai 10:1c0f58b9c048 622 m1 = RCC->AHB1ENR;
kenjiArai 10:1c0f58b9c048 623 PRINTF( "AHB1ENR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 624 put_rn();
kenjiArai 10:1c0f58b9c048 625 m1 = RCC->APB2ENR;
kenjiArai 10:1c0f58b9c048 626 PRINTF( "APB2ENR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 627 put_rn();
kenjiArai 10:1c0f58b9c048 628 m1 = RCC->APB2LPENR;
kenjiArai 10:1c0f58b9c048 629 PRINTF( "APB2LPENR= 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 630 put_rn();
kenjiArai 10:1c0f58b9c048 631 m1 = RCC->APB1LPENR;
kenjiArai 10:1c0f58b9c048 632 PRINTF( "APB1LPENR= 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 633 put_rn();
kenjiArai 10:1c0f58b9c048 634 m1 = RCC->CSR;
kenjiArai 10:1c0f58b9c048 635 PRINTF( "CSR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 636 put_rn();
kenjiArai 10:1c0f58b9c048 637 PRINTF(cmsg11);
kenjiArai 10:1c0f58b9c048 638 put_rn();
kenjiArai 10:1c0f58b9c048 639 m1 = PWR->CR;
kenjiArai 10:1c0f58b9c048 640 PRINTF( "CR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 641 put_rn();
kenjiArai 10:1c0f58b9c048 642 m1 = PWR->CSR;
kenjiArai 10:1c0f58b9c048 643 PRINTF( "CSR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 644 put_rn();
kenjiArai 10:1c0f58b9c048 645 put_rn();
kenjiArai 10:1c0f58b9c048 646 case 'F' : // sF - show system clock frequency
kenjiArai 10:1c0f58b9c048 647 m1 = RCC->CFGR & RCC_CFGR_SWS; /* Get SYSCLK source */
kenjiArai 10:1c0f58b9c048 648 switch (m1) {
kenjiArai 10:1c0f58b9c048 649 case 0x00: // HSI used as system clock
kenjiArai 10:1c0f58b9c048 650 PRINTF( "%s, %s%dHz", cmsg2, cmsg1,HSI_VALUE );
kenjiArai 10:1c0f58b9c048 651 m2 = HSI_VALUE;
kenjiArai 10:1c0f58b9c048 652 break;
kenjiArai 10:1c0f58b9c048 653 case 0x04: // HSE used as system clock
kenjiArai 10:1c0f58b9c048 654 PRINTF( "%s, %s%dHz", cmsg3, cmsg1, HSE_VALUE );
kenjiArai 10:1c0f58b9c048 655 m2 = HSE_VALUE;
kenjiArai 10:1c0f58b9c048 656 break;
kenjiArai 10:1c0f58b9c048 657 case 0x08: // PLL used as system clock
kenjiArai 10:1c0f58b9c048 658 PRINTF("fVCO = fPLL-in x (PLLN/PLLM), fPLL-out = fVCO/PLLP, fUSB-out = fVCO/PLLQ");
kenjiArai 10:1c0f58b9c048 659 put_rn();
kenjiArai 10:1c0f58b9c048 660 m5 = (RCC->PLLCFGR >> 6) & 0x1ff; // PLLN
kenjiArai 10:1c0f58b9c048 661 m1 = RCC->PLLCFGR & 0x3f; // PLLM
kenjiArai 10:1c0f58b9c048 662 PRINTF( "%s PLLN=%d, PLLM=%d", cmsg4, m5, m1 );
kenjiArai 10:1c0f58b9c048 663 put_rn();
kenjiArai 10:1c0f58b9c048 664 m3 = (RCC->PLLCFGR >> 22) & 0x1; // Clock source
kenjiArai 10:1c0f58b9c048 665 if (m3 == 0) {
kenjiArai 10:1c0f58b9c048 666 // HSI oscillator clock selected as PLL clock source
kenjiArai 10:1c0f58b9c048 667 m2 = (HSI_VALUE * (m5 / m1));
kenjiArai 10:1c0f58b9c048 668 PRINTF( "%s, RC=%dHz", cmsg2, HSI_VALUE );
kenjiArai 10:1c0f58b9c048 669 } else {
kenjiArai 10:1c0f58b9c048 670 // HSE selected
kenjiArai 10:1c0f58b9c048 671 m2 = (((HSE_VALUE) * m5) / m1);
kenjiArai 10:1c0f58b9c048 672 if ((RCC->CR >> 18) & 0x01) { // check HSEBYP bit
kenjiArai 10:1c0f58b9c048 673 // HSE(not Xtal) selected as PLL clock source
kenjiArai 10:1c0f58b9c048 674 PRINTF( "Use HSE(not Xtal but External Clock)=%dHz", HSE_VALUE );
kenjiArai 10:1c0f58b9c048 675 } else {
kenjiArai 10:1c0f58b9c048 676 // HSE(Xtal) selected as PLL clock source
kenjiArai 10:1c0f58b9c048 677 PRINTF( "%s, Xtal=%dHz", cmsg3, HSE_VALUE );
kenjiArai 10:1c0f58b9c048 678 }
kenjiArai 10:1c0f58b9c048 679 }
kenjiArai 10:1c0f58b9c048 680 put_rn();
kenjiArai 10:1c0f58b9c048 681 PRINTF("PLL/Base %s%dHz", cmsg1, m2);
kenjiArai 10:1c0f58b9c048 682 put_rn();
kenjiArai 10:1c0f58b9c048 683 m3 = (RCC->PLLCFGR >> 16) & 0x03; // PLLP
kenjiArai 10:1c0f58b9c048 684 switch (m3) {
kenjiArai 10:1c0f58b9c048 685 case 0:
kenjiArai 10:1c0f58b9c048 686 m3 = 2;
kenjiArai 10:1c0f58b9c048 687 break;
kenjiArai 10:1c0f58b9c048 688 case 1:
kenjiArai 10:1c0f58b9c048 689 m3 = 4;
kenjiArai 10:1c0f58b9c048 690 break;
kenjiArai 10:1c0f58b9c048 691 case 2:
kenjiArai 10:1c0f58b9c048 692 m3 = 6;
kenjiArai 10:1c0f58b9c048 693 break;
kenjiArai 10:1c0f58b9c048 694 case 3:
kenjiArai 10:1c0f58b9c048 695 m3 = 8;
kenjiArai 10:1c0f58b9c048 696 break;
kenjiArai 10:1c0f58b9c048 697 }
kenjiArai 10:1c0f58b9c048 698 m4 = (RCC->PLLCFGR >> 24) & 0x0f; // PLLQ
kenjiArai 10:1c0f58b9c048 699 PRINTF("%s PLLP=%d, PLLQ=%d", cmsg4, m3, m4);
kenjiArai 10:1c0f58b9c048 700 put_rn();
kenjiArai 10:1c0f58b9c048 701 PRINTF("PLL/System %s%dHz", cmsg1, m2/m3);
kenjiArai 10:1c0f58b9c048 702 put_rn();
kenjiArai 10:1c0f58b9c048 703 PRINTF("PLL/USB %s%dHz", cmsg1, m2/m4);
kenjiArai 10:1c0f58b9c048 704 m2 = m2/m4;
kenjiArai 10:1c0f58b9c048 705 if ((m2 > USB_FREQ_H) || (m2 <USB_FREQ_L)) {
kenjiArai 10:1c0f58b9c048 706 PRINTF(" -> USB Freq. is out of range!");
kenjiArai 10:1c0f58b9c048 707 }
kenjiArai 10:1c0f58b9c048 708 put_rn();
kenjiArai 10:1c0f58b9c048 709 break;
kenjiArai 10:1c0f58b9c048 710 default: // Not come here
kenjiArai 10:1c0f58b9c048 711 PRINTF( cmsg5 );
kenjiArai 10:1c0f58b9c048 712 break;
kenjiArai 10:1c0f58b9c048 713 }
kenjiArai 10:1c0f58b9c048 714 put_rn();
kenjiArai 10:1c0f58b9c048 715 PRINTF( "SYSCLK %s%dHz", cmsg6, HAL_RCC_GetSysClockFreq());
kenjiArai 10:1c0f58b9c048 716 put_rn();
kenjiArai 10:1c0f58b9c048 717 PRINTF( "HCLK %s%dHz", cmsg6, HAL_RCC_GetHCLKFreq());
kenjiArai 10:1c0f58b9c048 718 put_rn();
kenjiArai 10:1c0f58b9c048 719 PRINTF( "PCLK1 %s%dHz", cmsg6, HAL_RCC_GetPCLK1Freq());
kenjiArai 10:1c0f58b9c048 720 put_rn();
kenjiArai 10:1c0f58b9c048 721 PRINTF( "PCLK2 %s%dHz", cmsg6, HAL_RCC_GetPCLK2Freq());
kenjiArai 10:1c0f58b9c048 722 put_rn();
kenjiArai 10:1c0f58b9c048 723 put_rn();
kenjiArai 10:1c0f58b9c048 724 // Check RTC Clock
kenjiArai 10:1c0f58b9c048 725 PRINTF("RTC Clock");
kenjiArai 10:1c0f58b9c048 726 put_rn();
kenjiArai 10:1c0f58b9c048 727 m1 = (RCC->BDCR >> 8) & 0x03;
kenjiArai 10:1c0f58b9c048 728 switch (m1) {
kenjiArai 10:1c0f58b9c048 729 case 0: // no clock
kenjiArai 10:1c0f58b9c048 730 PRINTF(cmsg7);
kenjiArai 10:1c0f58b9c048 731 break;
kenjiArai 10:1c0f58b9c048 732 case 1: // LSE
kenjiArai 10:1c0f58b9c048 733 PRINTF(cmsg8);
kenjiArai 10:1c0f58b9c048 734 break;
kenjiArai 10:1c0f58b9c048 735 case 2: // LSI
kenjiArai 10:1c0f58b9c048 736 PRINTF("%s 17 to 47, typ.32KHz", cmsg9);
kenjiArai 10:1c0f58b9c048 737 break;
kenjiArai 10:1c0f58b9c048 738 case 3: // HSE
kenjiArai 10:1c0f58b9c048 739 PRINTF( cmsg10 );
kenjiArai 10:1c0f58b9c048 740 m2 = (RCC->PLLCFGR >> 16) & 0x1f; // RTCPRE
kenjiArai 10:1c0f58b9c048 741 m3 = HSE_VALUE / m2;
kenjiArai 10:1c0f58b9c048 742 PRINTF("%s%dHz", cmsg6, m3);
kenjiArai 10:1c0f58b9c048 743 put_rn();
kenjiArai 10:1c0f58b9c048 744 break;
kenjiArai 10:1c0f58b9c048 745 default: // Not come here
kenjiArai 10:1c0f58b9c048 746 PRINTF(cmsg5);
kenjiArai 10:1c0f58b9c048 747 break;
kenjiArai 10:1c0f58b9c048 748 }
kenjiArai 10:1c0f58b9c048 749 put_rn();
kenjiArai 10:1c0f58b9c048 750 put_rn();
kenjiArai 10:1c0f58b9c048 751 break;
kenjiArai 10:1c0f58b9c048 752 case 'c' : // sc - show system CPU information
kenjiArai 10:1c0f58b9c048 753 m1 = SCB->CPUID;
kenjiArai 10:1c0f58b9c048 754 m2 = ( m1 >> 24 );
kenjiArai 10:1c0f58b9c048 755 if ( m2 == 0x41 ) {
kenjiArai 10:1c0f58b9c048 756 PRINTF( "CPU = ARM " );
kenjiArai 10:1c0f58b9c048 757 } else {
kenjiArai 10:1c0f58b9c048 758 PRINTF( "CPU = NOT ARM " );
kenjiArai 10:1c0f58b9c048 759 }
kenjiArai 10:1c0f58b9c048 760 m2 = ( m1 >> 4 ) & 0xfff;
kenjiArai 10:1c0f58b9c048 761 if ( m2 == 0xc24 ) {
kenjiArai 10:1c0f58b9c048 762 PRINTF( "Cortex-M4" );
kenjiArai 10:1c0f58b9c048 763 } else {
kenjiArai 10:1c0f58b9c048 764 PRINTF( "NOT Cortex-M4" );
kenjiArai 10:1c0f58b9c048 765 }
kenjiArai 10:1c0f58b9c048 766 put_rn();
kenjiArai 10:1c0f58b9c048 767 m2 = ( m1 >> 20 ) & 0x0f;
kenjiArai 10:1c0f58b9c048 768 PRINTF( "Variant:%x", m2 );
kenjiArai 10:1c0f58b9c048 769 put_rn();
kenjiArai 10:1c0f58b9c048 770 m2 = m1 & 0x7;
kenjiArai 10:1c0f58b9c048 771 PRINTF( "Revision:%x", m2 );
kenjiArai 10:1c0f58b9c048 772 put_rn();
kenjiArai 10:1c0f58b9c048 773 PRINTF( "CPU ID: 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 774 put_rn();
kenjiArai 10:1c0f58b9c048 775 m1 = DBGMCU->IDCODE;
kenjiArai 10:1c0f58b9c048 776 PRINTF( "DBG ID: 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 777 put_rn();
kenjiArai 10:1c0f58b9c048 778 // unique ID
kenjiArai 10:1c0f58b9c048 779 // http://waijung.aimagin.com/index.htm?stm32f4_uidread.htm
kenjiArai 10:1c0f58b9c048 780 m1 = *(__IO uint32_t *)((uint32_t)0x1FFF7A10);
kenjiArai 10:1c0f58b9c048 781 PRINTF("Unique device ID(94bits):(1) 0x%08x ", m1);
kenjiArai 10:1c0f58b9c048 782 m1 = *(__IO uint32_t *)((uint32_t)0x1FFF7A14);
kenjiArai 10:1c0f58b9c048 783 PRINTF("(2) 0x%08x ", m1);
kenjiArai 10:1c0f58b9c048 784 m1 = *(__IO uint32_t *)((uint32_t)0x1FFF7A18);
kenjiArai 10:1c0f58b9c048 785 PRINTF( "(3) 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 786 put_rn();
kenjiArai 10:1c0f58b9c048 787 break;
kenjiArai 10:1c0f58b9c048 788 case '?' :
kenjiArai 10:1c0f58b9c048 789 default:
kenjiArai 10:1c0f58b9c048 790 PRINTF( "sc - System CPU information" );
kenjiArai 10:1c0f58b9c048 791 put_rn();
kenjiArai 10:1c0f58b9c048 792 PRINTF( "sf - System Clock" );
kenjiArai 10:1c0f58b9c048 793 put_rn();
kenjiArai 10:1c0f58b9c048 794 }
kenjiArai 10:1c0f58b9c048 795 }
kenjiArai 10:1c0f58b9c048 796 #elif defined(TARGET_NUCLEO_L152RE)
kenjiArai 10:1c0f58b9c048 797
kenjiArai 10:1c0f58b9c048 798 static __I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
kenjiArai 10:1c0f58b9c048 799
kenjiArai 10:1c0f58b9c048 800 void cpu_inf( char *ptr )
kenjiArai 10:1c0f58b9c048 801 {
kenjiArai 10:1c0f58b9c048 802 uint32_t m1, m2, m3, m4, m5;
kenjiArai 10:1c0f58b9c048 803
kenjiArai 10:1c0f58b9c048 804 switch (*ptr++) {
kenjiArai 10:1c0f58b9c048 805 case 'f' : // sc - show system clock frequency
kenjiArai 10:1c0f58b9c048 806 m1 = RCC->CR;
kenjiArai 10:1c0f58b9c048 807 PRINTF( "CR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 808 put_rn();
kenjiArai 10:1c0f58b9c048 809 m1 = RCC->ICSCR;
kenjiArai 10:1c0f58b9c048 810 PRINTF( "ICSCR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 811 put_rn();
kenjiArai 10:1c0f58b9c048 812 m1 = RCC->CFGR;
kenjiArai 10:1c0f58b9c048 813 PRINTF( "CFGR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 814 put_rn();
kenjiArai 10:1c0f58b9c048 815 m1 = RCC->CIR;
kenjiArai 10:1c0f58b9c048 816 PRINTF( "CIR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 817 put_rn();
kenjiArai 10:1c0f58b9c048 818 m1 = RCC->AHBRSTR;
kenjiArai 10:1c0f58b9c048 819 PRINTF( "AHBRSTR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 820 put_rn();
kenjiArai 10:1c0f58b9c048 821 m1 = RCC->APB2RSTR;
kenjiArai 10:1c0f58b9c048 822 PRINTF( "APB2RSTR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 823 put_rn();
kenjiArai 10:1c0f58b9c048 824 m1 = RCC->APB1RSTR;
kenjiArai 10:1c0f58b9c048 825 PRINTF( "APB1RSTR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 826 put_rn();
kenjiArai 10:1c0f58b9c048 827 m1 = RCC->AHBENR;
kenjiArai 10:1c0f58b9c048 828 PRINTF( "AHBENR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 829 put_rn();
kenjiArai 10:1c0f58b9c048 830 m1 = RCC->APB2ENR;
kenjiArai 10:1c0f58b9c048 831 PRINTF( "APB2ENR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 832 put_rn();
kenjiArai 10:1c0f58b9c048 833 m1 = RCC->APB2LPENR;
kenjiArai 10:1c0f58b9c048 834 PRINTF( "APB2LPENR= 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 835 put_rn();
kenjiArai 10:1c0f58b9c048 836 m1 = RCC->APB1LPENR;
kenjiArai 10:1c0f58b9c048 837 PRINTF( "APB1LPENR= 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 838 put_rn();
kenjiArai 10:1c0f58b9c048 839 m1 = RCC->CSR;
kenjiArai 10:1c0f58b9c048 840 PRINTF( "CSR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 841 put_rn();
kenjiArai 10:1c0f58b9c048 842 PRINTF( cmsg11 );
kenjiArai 10:1c0f58b9c048 843 put_rn();
kenjiArai 10:1c0f58b9c048 844 m1 = PWR->CR;
kenjiArai 10:1c0f58b9c048 845 PRINTF( "CR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 846 put_rn();
kenjiArai 10:1c0f58b9c048 847 m1 = PWR->CSR;
kenjiArai 10:1c0f58b9c048 848 PRINTF( "CSR = 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 849 put_rn();
kenjiArai 10:1c0f58b9c048 850 put_rn();
kenjiArai 10:1c0f58b9c048 851 case 'F' : // sF - show system clock frequency
kenjiArai 10:1c0f58b9c048 852 m1 = RCC->CFGR & RCC_CFGR_SWS; /* Get SYSCLK source */
kenjiArai 10:1c0f58b9c048 853 switch (m1) {
kenjiArai 10:1c0f58b9c048 854 case 0x00: // MSI used as system clock
kenjiArai 10:1c0f58b9c048 855 m4 = ( RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> 13;
kenjiArai 10:1c0f58b9c048 856 m2 = (32768 * (1 << (m4 + 1)));
kenjiArai 10:1c0f58b9c048 857 PRINTF( "%s, %s%dHz", cmsg0, cmsg1, m2);
kenjiArai 10:1c0f58b9c048 858 break;
kenjiArai 10:1c0f58b9c048 859 case 0x04: // HSI used as system clock
kenjiArai 10:1c0f58b9c048 860 PRINTF( "%s, %s%dHz", cmsg2, cmsg1,HSI_VALUE );
kenjiArai 10:1c0f58b9c048 861 m2 = HSI_VALUE;
kenjiArai 10:1c0f58b9c048 862 break;
kenjiArai 10:1c0f58b9c048 863 case 0x08: // HSE used as system clock
kenjiArai 10:1c0f58b9c048 864 PRINTF( "%s, %s%dHz", cmsg3, cmsg1, HSE_VALUE );
kenjiArai 10:1c0f58b9c048 865 m2 = HSE_VALUE;
kenjiArai 10:1c0f58b9c048 866 break;
kenjiArai 10:1c0f58b9c048 867 case 0x0C: // PLL used as system clock
kenjiArai 10:1c0f58b9c048 868 // Get PLL clock source and multiplication factor
kenjiArai 10:1c0f58b9c048 869 m5 = RCC->CFGR & RCC_CFGR_PLLMUL;
kenjiArai 10:1c0f58b9c048 870 m1 = RCC->CFGR & RCC_CFGR_PLLDIV;
kenjiArai 10:1c0f58b9c048 871 m5 = PLLMulTable[(m5 >> 18)];
kenjiArai 10:1c0f58b9c048 872 m1 = (m1 >> 22) + 1;
kenjiArai 10:1c0f58b9c048 873 PRINTF( "%s Mul=%d, Div=%d", cmsg4, m5, m1 );
kenjiArai 10:1c0f58b9c048 874 put_rn();
kenjiArai 10:1c0f58b9c048 875 m3 = RCC->CFGR & RCC_CFGR_PLLSRC;
kenjiArai 10:1c0f58b9c048 876 if ( m3 == 0x00 ) {
kenjiArai 10:1c0f58b9c048 877 // HSI oscillator clock selected as PLL clock source
kenjiArai 10:1c0f58b9c048 878 m2 = (((HSI_VALUE) * m5) / m1);
kenjiArai 10:1c0f58b9c048 879 PRINTF( "%s, RC=%dHz", cmsg2, HSI_VALUE );
kenjiArai 10:1c0f58b9c048 880 } else {
kenjiArai 10:1c0f58b9c048 881 // HSE selected
kenjiArai 10:1c0f58b9c048 882 m2 = (((HSE_VALUE) * m5) / m1);
kenjiArai 10:1c0f58b9c048 883 if ((RCC->CR >> 18) & 0x01) { // check HSEBYP bit
kenjiArai 10:1c0f58b9c048 884 // HSE(not Xtal) selected as PLL clock source
kenjiArai 10:1c0f58b9c048 885 PRINTF( "Use HSE(not Xtal but External Clock)=%dHz", HSE_VALUE );
kenjiArai 10:1c0f58b9c048 886 } else {
kenjiArai 10:1c0f58b9c048 887 // HSE(Xtal) selected as PLL clock source
kenjiArai 10:1c0f58b9c048 888 PRINTF( "%s, Xtal=%dHz", cmsg3, HSE_VALUE );
kenjiArai 10:1c0f58b9c048 889 }
kenjiArai 10:1c0f58b9c048 890 }
kenjiArai 10:1c0f58b9c048 891 put_rn();
kenjiArai 10:1c0f58b9c048 892 PRINTF( "PLL %s%dHz", cmsg1, m2 );
kenjiArai 10:1c0f58b9c048 893 put_rn();
kenjiArai 10:1c0f58b9c048 894 break;
kenjiArai 10:1c0f58b9c048 895 default: // Not come here
kenjiArai 10:1c0f58b9c048 896 PRINTF( cmsg5 );
kenjiArai 10:1c0f58b9c048 897 break;
kenjiArai 10:1c0f58b9c048 898 }
kenjiArai 10:1c0f58b9c048 899 put_rn();
kenjiArai 10:1c0f58b9c048 900 PRINTF( "SYSCLK %s%dHz", cmsg6, HAL_RCC_GetSysClockFreq() );
kenjiArai 10:1c0f58b9c048 901 put_rn();
kenjiArai 10:1c0f58b9c048 902 PRINTF( "HCLK %s%dHz", cmsg6, HAL_RCC_GetHCLKFreq() );
kenjiArai 10:1c0f58b9c048 903 put_rn();
kenjiArai 10:1c0f58b9c048 904 PRINTF( "PCLK1 %s%dHz", cmsg6, HAL_RCC_GetPCLK1Freq() );
kenjiArai 10:1c0f58b9c048 905 put_rn();
kenjiArai 10:1c0f58b9c048 906 PRINTF( "PCLK2 %s%dHz", cmsg6, HAL_RCC_GetPCLK2Freq() );
kenjiArai 10:1c0f58b9c048 907 put_rn();
kenjiArai 10:1c0f58b9c048 908 put_rn();
kenjiArai 10:1c0f58b9c048 909 m1 = RCC->CSR & RCC_CSR_RTCSEL;
kenjiArai 10:1c0f58b9c048 910 // Check RTC & LCD Clock
kenjiArai 10:1c0f58b9c048 911 PRINTF("RTC/LCD Clock");
kenjiArai 10:1c0f58b9c048 912 put_rn();
kenjiArai 10:1c0f58b9c048 913 switch (m1) {
kenjiArai 10:1c0f58b9c048 914 case RCC_CSR_RTCSEL_NOCLOCK:
kenjiArai 10:1c0f58b9c048 915 PRINTF( cmsg7 );
kenjiArai 10:1c0f58b9c048 916 break;
kenjiArai 10:1c0f58b9c048 917 case RCC_CSR_RTCSEL_LSE:
kenjiArai 10:1c0f58b9c048 918 PRINTF( cmsg8 );
kenjiArai 10:1c0f58b9c048 919 break;
kenjiArai 10:1c0f58b9c048 920 case RCC_CSR_RTCSEL_LSI:
kenjiArai 10:1c0f58b9c048 921 PRINTF("%s 26 to 56, typ.38KHz", cmsg9);
kenjiArai 10:1c0f58b9c048 922 break;
kenjiArai 10:1c0f58b9c048 923 case RCC_CSR_RTCSEL_HSE:
kenjiArai 10:1c0f58b9c048 924 PRINTF( cmsg10 );
kenjiArai 10:1c0f58b9c048 925 break;
kenjiArai 10:1c0f58b9c048 926 default: // Not come here
kenjiArai 10:1c0f58b9c048 927 PRINTF( cmsg5 );
kenjiArai 10:1c0f58b9c048 928 break;
kenjiArai 10:1c0f58b9c048 929 }
kenjiArai 10:1c0f58b9c048 930 put_rn();
kenjiArai 10:1c0f58b9c048 931 put_rn();
kenjiArai 10:1c0f58b9c048 932 break;
kenjiArai 10:1c0f58b9c048 933 case 'c' : // sc - show system CPU information
kenjiArai 10:1c0f58b9c048 934 m1 = SCB->CPUID;
kenjiArai 10:1c0f58b9c048 935 m2 = ( m1 >> 24 );
kenjiArai 10:1c0f58b9c048 936 if ( m2 == 0x41 ) {
kenjiArai 10:1c0f58b9c048 937 PRINTF( "CPU = ARM " );
kenjiArai 10:1c0f58b9c048 938 } else {
kenjiArai 10:1c0f58b9c048 939 PRINTF( "CPU = NOT ARM " );
kenjiArai 10:1c0f58b9c048 940 }
kenjiArai 10:1c0f58b9c048 941 m2 = ( m1 >> 4 ) & 0xfff;
kenjiArai 10:1c0f58b9c048 942 if ( m2 == 0xc23 ) {
kenjiArai 10:1c0f58b9c048 943 PRINTF( "Cortex-M3" );
kenjiArai 10:1c0f58b9c048 944 } else {
kenjiArai 10:1c0f58b9c048 945 PRINTF( "NOT Cortex-M3" );
kenjiArai 10:1c0f58b9c048 946 }
kenjiArai 10:1c0f58b9c048 947 put_rn();
kenjiArai 10:1c0f58b9c048 948 m2 = ( m1 >> 20 ) & 0x0f;
kenjiArai 10:1c0f58b9c048 949 PRINTF( "Variant:%x", m2 );
kenjiArai 10:1c0f58b9c048 950 put_rn();
kenjiArai 10:1c0f58b9c048 951 m2 = m1 & 0x7;
kenjiArai 10:1c0f58b9c048 952 PRINTF( "Revision:%x", m2 );
kenjiArai 10:1c0f58b9c048 953 put_rn();
kenjiArai 10:1c0f58b9c048 954 PRINTF( "CPU ID: 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 955 put_rn();
kenjiArai 10:1c0f58b9c048 956 m1 = DBGMCU->IDCODE;
kenjiArai 10:1c0f58b9c048 957 PRINTF( "DBG ID: 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 958 put_rn();
kenjiArai 10:1c0f58b9c048 959 // unique ID
kenjiArai 10:1c0f58b9c048 960 // http://false.ekta.is/2013/09/stm32-unique-id-register-not-so-unique/
kenjiArai 10:1c0f58b9c048 961 m1 = *(__IO uint32_t *)((uint32_t)0x1FF80050);
kenjiArai 10:1c0f58b9c048 962 PRINTF("Unique device ID(94bits):(1) 0x%08x ", m1);
kenjiArai 10:1c0f58b9c048 963 m1 = *(__IO uint32_t *)((uint32_t)0x1FF80054);
kenjiArai 10:1c0f58b9c048 964 PRINTF("(2) 0x%08x ", m1);
kenjiArai 10:1c0f58b9c048 965 m1 = *(__IO uint32_t *)((uint32_t)0x1FF80058);
kenjiArai 10:1c0f58b9c048 966 PRINTF( "(3) 0x%08x", m1 );
kenjiArai 10:1c0f58b9c048 967 put_rn();
kenjiArai 10:1c0f58b9c048 968 break;
kenjiArai 10:1c0f58b9c048 969 case '?' :
kenjiArai 10:1c0f58b9c048 970 default:
kenjiArai 10:1c0f58b9c048 971 PRINTF( "sc - System CPU information" );
kenjiArai 10:1c0f58b9c048 972 put_rn();
kenjiArai 10:1c0f58b9c048 973 PRINTF( "sf - System Clock" );
kenjiArai 10:1c0f58b9c048 974 put_rn();
kenjiArai 10:1c0f58b9c048 975 }
kenjiArai 10:1c0f58b9c048 976 }
kenjiArai 10:1c0f58b9c048 977 #endif // Select CPU
kenjiArai 10:1c0f58b9c048 978
kenjiArai 10:1c0f58b9c048 979 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 980 // Monitor Main Program
kenjiArai 10:1c0f58b9c048 981 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 982 void mon_hw(void)
kenjiArai 10:1c0f58b9c048 983 {
kenjiArai 10:1c0f58b9c048 984 char *ptr;
kenjiArai 10:1c0f58b9c048 985
kenjiArai 10:1c0f58b9c048 986 put_r();
kenjiArai 10:1c0f58b9c048 987 PRINTF("%s [Help:'?' key]", mon_msg);
kenjiArai 10:1c0f58b9c048 988 put_rn();
kenjiArai 10:1c0f58b9c048 989 for (;;) {
kenjiArai 10:1c0f58b9c048 990 put_r();
kenjiArai 10:1c0f58b9c048 991 PUTC('>');
kenjiArai 10:1c0f58b9c048 992 ptr = linebuf;
kenjiArai 10:1c0f58b9c048 993 get_line(ptr, buf_size);
kenjiArai 10:1c0f58b9c048 994 put_r();
kenjiArai 10:1c0f58b9c048 995 switch (*ptr++) {
kenjiArai 10:1c0f58b9c048 996 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 997 // Memory
kenjiArai 10:1c0f58b9c048 998 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 999 case 'm' :
kenjiArai 10:1c0f58b9c048 1000 #if USE_MEM
kenjiArai 10:1c0f58b9c048 1001 mem_inf(ptr);
kenjiArai 10:1c0f58b9c048 1002 put_rn();
kenjiArai 10:1c0f58b9c048 1003 #else
kenjiArai 10:1c0f58b9c048 1004 not_select();
kenjiArai 10:1c0f58b9c048 1005 #endif // USE_MEM
kenjiArai 10:1c0f58b9c048 1006 break;
kenjiArai 10:1c0f58b9c048 1007 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1008 // Register
kenjiArai 10:1c0f58b9c048 1009 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1010 case 'r' :
kenjiArai 10:1c0f58b9c048 1011 put_r();
kenjiArai 10:1c0f58b9c048 1012 PRINTF(mrmsg0);
kenjiArai 10:1c0f58b9c048 1013 put_rn();
kenjiArai 10:1c0f58b9c048 1014 quitflag = 0;
kenjiArai 10:1c0f58b9c048 1015 for (; quitflag != 0xff;) {
kenjiArai 10:1c0f58b9c048 1016 PRINTF("r>");
kenjiArai 10:1c0f58b9c048 1017 ptr = linebuf;
kenjiArai 10:1c0f58b9c048 1018 get_line(ptr, buf_size);
kenjiArai 10:1c0f58b9c048 1019 put_r();
kenjiArai 10:1c0f58b9c048 1020 switch(*ptr++) {
kenjiArai 10:1c0f58b9c048 1021 case 'u' :
kenjiArai 10:1c0f58b9c048 1022 #if USE_UART
kenjiArai 10:1c0f58b9c048 1023 switch(*ptr++) {
kenjiArai 10:1c0f58b9c048 1024 case '1' :
kenjiArai 10:1c0f58b9c048 1025 PRINTF("%s%s1%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1026 usart_reg(USART1);
kenjiArai 10:1c0f58b9c048 1027 break;
kenjiArai 10:1c0f58b9c048 1028 case '2' :
kenjiArai 10:1c0f58b9c048 1029 PRINTF("%s%s2%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1030 usart_reg(USART2);
kenjiArai 10:1c0f58b9c048 1031 break;
kenjiArai 10:1c0f58b9c048 1032 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 1033 case '6' :
kenjiArai 10:1c0f58b9c048 1034 PRINTF("%s%s6%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1035 usart_reg(USART6);
kenjiArai 10:1c0f58b9c048 1036 break;
kenjiArai 10:1c0f58b9c048 1037 #elif defined(TARGET_NUCLEO_L152RE)
kenjiArai 10:1c0f58b9c048 1038 case '3' :
kenjiArai 10:1c0f58b9c048 1039 PRINTF("%s%s3%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1040 usart_reg(USART3);
kenjiArai 10:1c0f58b9c048 1041 break;
kenjiArai 10:1c0f58b9c048 1042 case '5' :
kenjiArai 10:1c0f58b9c048 1043 PRINTF("%s%s5%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1044 usart_reg(UART5);
kenjiArai 10:1c0f58b9c048 1045 break;
kenjiArai 10:1c0f58b9c048 1046 #endif
kenjiArai 10:1c0f58b9c048 1047 case '*' :
kenjiArai 10:1c0f58b9c048 1048 PRINTF( "%s & UART", mrmsg2 );
kenjiArai 10:1c0f58b9c048 1049 put_rn();
kenjiArai 10:1c0f58b9c048 1050 PRINTF("%s%s1%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1051 usart_reg(USART1);
kenjiArai 10:1c0f58b9c048 1052 PRINTF("%s%s2%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1053 usart_reg(USART2);
kenjiArai 10:1c0f58b9c048 1054 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 1055 PRINTF("%s%s6%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1056 usart_reg(USART6);
kenjiArai 10:1c0f58b9c048 1057 #elif defined(TARGET_NUCLEO_L152RE)
kenjiArai 10:1c0f58b9c048 1058 PRINTF("%s%s3%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1059 usart_reg(USART3);
kenjiArai 10:1c0f58b9c048 1060 PRINTF("%s%s5%s", mrmsg1,mrmsg2,mrmsg1);
kenjiArai 10:1c0f58b9c048 1061 usart_reg(UART5);
kenjiArai 10:1c0f58b9c048 1062 #endif
kenjiArai 10:1c0f58b9c048 1063 break;
kenjiArai 10:1c0f58b9c048 1064 case '?' :
kenjiArai 10:1c0f58b9c048 1065 default:
kenjiArai 10:1c0f58b9c048 1066 PRINTF( mrmsg3 );
kenjiArai 10:1c0f58b9c048 1067 put_rn();
kenjiArai 10:1c0f58b9c048 1068 }
kenjiArai 10:1c0f58b9c048 1069 #else
kenjiArai 10:1c0f58b9c048 1070 not_select();
kenjiArai 10:1c0f58b9c048 1071 #endif // USE_UART
kenjiArai 10:1c0f58b9c048 1072 break;
kenjiArai 10:1c0f58b9c048 1073 case 'i' :
kenjiArai 10:1c0f58b9c048 1074 #if USE_I2C
kenjiArai 10:1c0f58b9c048 1075 switch(*ptr++) {
kenjiArai 10:1c0f58b9c048 1076 case '1' :
kenjiArai 10:1c0f58b9c048 1077 PRINTF("%s%s1%s", mrmsg1,mrmsg4,mrmsg1);
kenjiArai 10:1c0f58b9c048 1078 i2c_reg( I2C1 );
kenjiArai 10:1c0f58b9c048 1079 break;
kenjiArai 10:1c0f58b9c048 1080 case '2' :
kenjiArai 10:1c0f58b9c048 1081 PRINTF("%s%s2%s", mrmsg1,mrmsg4,mrmsg1);;
kenjiArai 10:1c0f58b9c048 1082 i2c_reg( I2C2 );
kenjiArai 10:1c0f58b9c048 1083 break;
kenjiArai 10:1c0f58b9c048 1084 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 1085 case '3' :
kenjiArai 10:1c0f58b9c048 1086 PRINTF("%s%s3%s", mrmsg1,mrmsg4,mrmsg1);;
kenjiArai 10:1c0f58b9c048 1087 i2c_reg( I2C3 );
kenjiArai 10:1c0f58b9c048 1088 break;
kenjiArai 10:1c0f58b9c048 1089 #endif
kenjiArai 10:1c0f58b9c048 1090 case '*' :
kenjiArai 10:1c0f58b9c048 1091 PRINTF(mrmsg4);
kenjiArai 10:1c0f58b9c048 1092 put_rn();
kenjiArai 10:1c0f58b9c048 1093 PRINTF("%s%s1%s", mrmsg1,mrmsg4,mrmsg1);
kenjiArai 10:1c0f58b9c048 1094 i2c_reg( I2C1 );
kenjiArai 10:1c0f58b9c048 1095 PRINTF("%s%s2%s", mrmsg1,mrmsg4,mrmsg1);
kenjiArai 10:1c0f58b9c048 1096 i2c_reg( I2C2 );
kenjiArai 10:1c0f58b9c048 1097 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 1098 PRINTF("%s%s3%s", mrmsg1,mrmsg4,mrmsg1);;
kenjiArai 10:1c0f58b9c048 1099 i2c_reg( I2C3 );
kenjiArai 10:1c0f58b9c048 1100 #endif
kenjiArai 10:1c0f58b9c048 1101 break;
kenjiArai 10:1c0f58b9c048 1102 case '?' :
kenjiArai 10:1c0f58b9c048 1103 default:
kenjiArai 10:1c0f58b9c048 1104 PRINTF(mrmsg5);
kenjiArai 10:1c0f58b9c048 1105 put_rn();
kenjiArai 10:1c0f58b9c048 1106 }
kenjiArai 10:1c0f58b9c048 1107 #else
kenjiArai 10:1c0f58b9c048 1108 not_select();
kenjiArai 10:1c0f58b9c048 1109 #endif // USE_I2C
kenjiArai 10:1c0f58b9c048 1110 break;
kenjiArai 10:1c0f58b9c048 1111 case 's' :
kenjiArai 10:1c0f58b9c048 1112 #if USE_SPI
kenjiArai 10:1c0f58b9c048 1113 switch(*ptr++) {
kenjiArai 10:1c0f58b9c048 1114 case '1' :
kenjiArai 10:1c0f58b9c048 1115 PRINTF("%s%s1%s", mrmsg1,mrmsg6,mrmsg1);
kenjiArai 10:1c0f58b9c048 1116 spi_reg( SPI1 );
kenjiArai 10:1c0f58b9c048 1117 break;
kenjiArai 10:1c0f58b9c048 1118 case '2' :
kenjiArai 10:1c0f58b9c048 1119 PRINTF("%s%s2%s", mrmsg1,mrmsg6,mrmsg1);
kenjiArai 10:1c0f58b9c048 1120 spi_reg( SPI2 );
kenjiArai 10:1c0f58b9c048 1121 break;
kenjiArai 10:1c0f58b9c048 1122 case '3' :
kenjiArai 10:1c0f58b9c048 1123 PRINTF("%s%s3%s", mrmsg1,mrmsg6,mrmsg1);
kenjiArai 10:1c0f58b9c048 1124 spi_reg( SPI3 );
kenjiArai 10:1c0f58b9c048 1125 break;
kenjiArai 10:1c0f58b9c048 1126 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 1127 case '4' :
kenjiArai 10:1c0f58b9c048 1128 PRINTF("%s%s4%s", mrmsg1,mrmsg6,mrmsg1);
kenjiArai 10:1c0f58b9c048 1129 spi_reg( SPI4 );
kenjiArai 10:1c0f58b9c048 1130 break;
kenjiArai 10:1c0f58b9c048 1131 #endif
kenjiArai 10:1c0f58b9c048 1132 case '*' :
kenjiArai 10:1c0f58b9c048 1133 PRINTF(mrmsg6);
kenjiArai 10:1c0f58b9c048 1134 put_rn();
kenjiArai 10:1c0f58b9c048 1135 PRINTF("%s%s1%s", mrmsg1,mrmsg6,mrmsg1);
kenjiArai 10:1c0f58b9c048 1136 spi_reg( SPI1 );
kenjiArai 10:1c0f58b9c048 1137 PRINTF("%s%s2%s", mrmsg1,mrmsg6,mrmsg1);
kenjiArai 10:1c0f58b9c048 1138 spi_reg( SPI2 );
kenjiArai 10:1c0f58b9c048 1139 PRINTF("%s%s3%s", mrmsg1,mrmsg6,mrmsg1);
kenjiArai 10:1c0f58b9c048 1140 spi_reg( SPI3 );
kenjiArai 10:1c0f58b9c048 1141 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 10:1c0f58b9c048 1142 PRINTF("%s%s4%s", mrmsg1,mrmsg6,mrmsg1);
kenjiArai 10:1c0f58b9c048 1143 spi_reg( SPI4 );
kenjiArai 10:1c0f58b9c048 1144 #endif
kenjiArai 10:1c0f58b9c048 1145 break;
kenjiArai 10:1c0f58b9c048 1146 case '?' :
kenjiArai 10:1c0f58b9c048 1147 default:
kenjiArai 10:1c0f58b9c048 1148 PRINTF(mrmsg7);
kenjiArai 10:1c0f58b9c048 1149 put_rn();
kenjiArai 10:1c0f58b9c048 1150 }
kenjiArai 10:1c0f58b9c048 1151 #else
kenjiArai 10:1c0f58b9c048 1152 not_select();
kenjiArai 10:1c0f58b9c048 1153 #endif // USE_SPI
kenjiArai 10:1c0f58b9c048 1154 break;
kenjiArai 10:1c0f58b9c048 1155 case 't' : //
kenjiArai 10:1c0f58b9c048 1156 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1157 break;
kenjiArai 10:1c0f58b9c048 1158 case 'a' : //
kenjiArai 10:1c0f58b9c048 1159 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1160 break;
kenjiArai 10:1c0f58b9c048 1161 case 'd' : //
kenjiArai 10:1c0f58b9c048 1162 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1163 break;
kenjiArai 10:1c0f58b9c048 1164 case 'w' : //
kenjiArai 10:1c0f58b9c048 1165 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1166 break;
kenjiArai 10:1c0f58b9c048 1167 case 'l' : //
kenjiArai 10:1c0f58b9c048 1168 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1169 break;
kenjiArai 10:1c0f58b9c048 1170 case 'c' : //
kenjiArai 10:1c0f58b9c048 1171 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1172 break;
kenjiArai 10:1c0f58b9c048 1173 case 'x' : //
kenjiArai 10:1c0f58b9c048 1174 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1175 break;
kenjiArai 10:1c0f58b9c048 1176 case 'y' : //
kenjiArai 10:1c0f58b9c048 1177 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1178 break;
kenjiArai 10:1c0f58b9c048 1179 case '?' :
kenjiArai 10:1c0f58b9c048 1180 PRINTF("u - USART");
kenjiArai 10:1c0f58b9c048 1181 put_rn();
kenjiArai 10:1c0f58b9c048 1182 PRINTF("i - I2C");
kenjiArai 10:1c0f58b9c048 1183 put_rn();
kenjiArai 10:1c0f58b9c048 1184 PRINTF("s - SPI");
kenjiArai 10:1c0f58b9c048 1185 put_rn();
kenjiArai 10:1c0f58b9c048 1186 PRINTF("t - TIMER");
kenjiArai 10:1c0f58b9c048 1187 put_rn();
kenjiArai 10:1c0f58b9c048 1188 PRINTF("a - ADC");
kenjiArai 10:1c0f58b9c048 1189 put_rn();
kenjiArai 10:1c0f58b9c048 1190 PRINTF("d - DAC");
kenjiArai 10:1c0f58b9c048 1191 put_rn();
kenjiArai 10:1c0f58b9c048 1192 PRINTF("l - LDC");
kenjiArai 10:1c0f58b9c048 1193 put_rn();
kenjiArai 10:1c0f58b9c048 1194 PRINTF("w - WWDG");
kenjiArai 10:1c0f58b9c048 1195 put_rn();
kenjiArai 10:1c0f58b9c048 1196 PRINTF("c - COMP");
kenjiArai 10:1c0f58b9c048 1197 put_rn();
kenjiArai 10:1c0f58b9c048 1198 break;
kenjiArai 10:1c0f58b9c048 1199 case 'q' : // quit
kenjiArai 10:1c0f58b9c048 1200 quitflag = 0xff;
kenjiArai 10:1c0f58b9c048 1201 break;
kenjiArai 10:1c0f58b9c048 1202 default:
kenjiArai 10:1c0f58b9c048 1203 PUTC('?');
kenjiArai 10:1c0f58b9c048 1204 put_rn();
kenjiArai 10:1c0f58b9c048 1205 }
kenjiArai 10:1c0f58b9c048 1206 }
kenjiArai 10:1c0f58b9c048 1207 PRINTF(mrmsg8);
kenjiArai 10:1c0f58b9c048 1208 put_rn();
kenjiArai 10:1c0f58b9c048 1209 break;
kenjiArai 10:1c0f58b9c048 1210 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1211 // Port
kenjiArai 10:1c0f58b9c048 1212 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1213 case 'p' :
kenjiArai 10:1c0f58b9c048 1214 #if USE_PORT
kenjiArai 10:1c0f58b9c048 1215 put_r();
kenjiArai 10:1c0f58b9c048 1216 PRINTF("Enter port a,b,c,d,e,h & * ? for help");
kenjiArai 10:1c0f58b9c048 1217 put_rn();
kenjiArai 10:1c0f58b9c048 1218 quitflag = 0;
kenjiArai 10:1c0f58b9c048 1219 for (; quitflag != 0xff;) {
kenjiArai 10:1c0f58b9c048 1220 PRINTF("p>");
kenjiArai 10:1c0f58b9c048 1221 ptr = linebuf;
kenjiArai 10:1c0f58b9c048 1222 get_line(ptr, buf_size);
kenjiArai 10:1c0f58b9c048 1223 put_r();
kenjiArai 10:1c0f58b9c048 1224 switch(*ptr) {
kenjiArai 10:1c0f58b9c048 1225 case 'a' :
kenjiArai 10:1c0f58b9c048 1226 case 'b' :
kenjiArai 10:1c0f58b9c048 1227 case 'c' :
kenjiArai 10:1c0f58b9c048 1228 case 'd' :
kenjiArai 10:1c0f58b9c048 1229 case 'e' :
kenjiArai 10:1c0f58b9c048 1230 case 'h' :
kenjiArai 10:1c0f58b9c048 1231 port_inf_one(ptr);
kenjiArai 10:1c0f58b9c048 1232 break;
kenjiArai 10:1c0f58b9c048 1233 case '*' :
kenjiArai 10:1c0f58b9c048 1234 rpt_port();
kenjiArai 10:1c0f58b9c048 1235 break;
kenjiArai 10:1c0f58b9c048 1236 case '?' :
kenjiArai 10:1c0f58b9c048 1237 PRINTF("port a,b,c,d,e,h & *");
kenjiArai 10:1c0f58b9c048 1238 put_rn();
kenjiArai 10:1c0f58b9c048 1239 break;
kenjiArai 10:1c0f58b9c048 1240 case 'q' : // quit
kenjiArai 10:1c0f58b9c048 1241 quitflag = 0xff;
kenjiArai 10:1c0f58b9c048 1242 break;
kenjiArai 10:1c0f58b9c048 1243 default:
kenjiArai 10:1c0f58b9c048 1244 PUTC('?');
kenjiArai 10:1c0f58b9c048 1245 put_rn();
kenjiArai 10:1c0f58b9c048 1246 }
kenjiArai 10:1c0f58b9c048 1247 }
kenjiArai 10:1c0f58b9c048 1248 PRINTF(mrmsg8);
kenjiArai 10:1c0f58b9c048 1249 put_rn();
kenjiArai 10:1c0f58b9c048 1250 #else
kenjiArai 10:1c0f58b9c048 1251 not_select();
kenjiArai 10:1c0f58b9c048 1252 #endif // USE_PORT
kenjiArai 10:1c0f58b9c048 1253 break;
kenjiArai 10:1c0f58b9c048 1254 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1255 // System
kenjiArai 10:1c0f58b9c048 1256 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1257 case 's' : // System related information
kenjiArai 10:1c0f58b9c048 1258 #if USE_SYS
kenjiArai 10:1c0f58b9c048 1259 cpu_inf(ptr);
kenjiArai 10:1c0f58b9c048 1260 #else
kenjiArai 10:1c0f58b9c048 1261 not_select();
kenjiArai 10:1c0f58b9c048 1262 #endif // USE_SYS
kenjiArai 10:1c0f58b9c048 1263 break;
kenjiArai 10:1c0f58b9c048 1264 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1265 // Help
kenjiArai 10:1c0f58b9c048 1266 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1267 case '?' :
kenjiArai 10:1c0f58b9c048 1268 hw_msg_hlp();
kenjiArai 10:1c0f58b9c048 1269 break;
kenjiArai 10:1c0f58b9c048 1270 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1271 // Return to main routine
kenjiArai 10:1c0f58b9c048 1272 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1273 case 'q' : // Quit
kenjiArai 10:1c0f58b9c048 1274 put_r();
kenjiArai 10:1c0f58b9c048 1275 PRINTF("Return to monitor");
kenjiArai 10:1c0f58b9c048 1276 put_rn();
kenjiArai 10:1c0f58b9c048 1277 return;
kenjiArai 10:1c0f58b9c048 1278 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1279 // Special command for DEBUG
kenjiArai 10:1c0f58b9c048 1280 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1281 case 'x' :
kenjiArai 10:1c0f58b9c048 1282 not_yet_impliment();
kenjiArai 10:1c0f58b9c048 1283 break;
kenjiArai 10:1c0f58b9c048 1284 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1285 // no support
kenjiArai 10:1c0f58b9c048 1286 //-----------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 1287 default:
kenjiArai 10:1c0f58b9c048 1288 PUTC('?');
kenjiArai 10:1c0f58b9c048 1289 put_rn();
kenjiArai 10:1c0f58b9c048 1290 break;
kenjiArai 10:1c0f58b9c048 1291 }
kenjiArai 10:1c0f58b9c048 1292 }
kenjiArai 10:1c0f58b9c048 1293 }
kenjiArai 10:1c0f58b9c048 1294 #endif // defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_L152RE)