Kenji Arai / Nucleo_rtos_sample

This is sample program for Nucleo L152RE (and F401RE & F411RE) mbed-rtos. You need to modify mbed-src and mbed-rtos before compile it.

Dependencies:   mbed-rtos mbed-src SetRTC

Fork of GR-PEACH_test_on_rtos_works_well by Kenji Arai

Please refer below link.
/users/kenjiArai/notebook/necleo-l152re-rtos-sample-also-for-f401re--f411re-/

modification_notice.h@11:587b8f1bab9d, 2015-05-16 (annotated)

Committer:
kenjiArai
Date:
Sat May 16 02:27:03 2015 +0000
Revision:
11:587b8f1bab9d
Parent:
10:1c0f58b9c048
Child:
12:2db841307633
Modified based on mbed-rtos Rev.77. The mbed-rtos officially supported L152RE but still have a problem System Clock definition. Current definition in the file is 32MHz but need to set to 24MHz. Also F411RE clock sets 100MHz but 96MHz is right.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 10:1c0f58b9c048 1 /*
kenjiArai 10:1c0f58b9c048 2 * mbed Application program for the mbed
kenjiArai 10:1c0f58b9c048 3 * Library differ part (This is only information document)
kenjiArai 10:1c0f58b9c048 4 *
kenjiArai 10:1c0f58b9c048 5 * Copyright (c) 2014,'15 Kenji Arai / JH1PJL
kenjiArai 10:1c0f58b9c048 6 * http://www.page.sannet.ne.jp/kenjia/index.html
kenjiArai 10:1c0f58b9c048 7 * http://mbed.org/users/kenjiArai/
kenjiArai 10:1c0f58b9c048 8 * Created: May 14th, 2015
kenjiArai 11:587b8f1bab9d 9 * Revised: May 16th, 2015, 11:05 a.m.(JST)
kenjiArai 10:1c0f58b9c048 10 *
kenjiArai 10:1c0f58b9c048 11 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
kenjiArai 10:1c0f58b9c048 12 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
kenjiArai 10:1c0f58b9c048 13 * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
kenjiArai 10:1c0f58b9c048 14 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
kenjiArai 10:1c0f58b9c048 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
kenjiArai 10:1c0f58b9c048 16 */
kenjiArai 10:1c0f58b9c048 17
kenjiArai 10:1c0f58b9c048 18 #if 0 ///////////////////////////////////////////////////////////////////////////////////////////
kenjiArai 10:1c0f58b9c048 19
kenjiArai 10:1c0f58b9c048 20 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 21 // ----- Hardware configuration ---------------
kenjiArai 10:1c0f58b9c048 22 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 23
kenjiArai 10:1c0f58b9c048 24 // Direct connection between below two pins.
kenjiArai 10:1c0f58b9c048 25 // DAC0 output connected to ADC1 input
kenjiArai 10:1c0f58b9c048 26 PA_4 : PA_1
kenjiArai 10:1c0f58b9c048 27 // DAC1 to ADC3
kenjiArai 10:1c0f58b9c048 28 PA_5 : PB_0
kenjiArai 10:1c0f58b9c048 29 // I2C1 master connected to I2C2 slave
kenjiArai 10:1c0f58b9c048 30 PB_8 : PB_10 // Need 3.3Kohm pull-up
kenjiArai 10:1c0f58b9c048 31 PB_9 : PB_11 // Need 3.3Kohm pull-up
kenjiArai 10:1c0f58b9c048 32 // Connecetd with CR network
kenjiArai 10:1c0f58b9c048 33 // LED's connected each pin with R=330Ohm to GND
kenjiArai 10:1c0f58b9c048 34 PC_2
kenjiArai 10:1c0f58b9c048 35 PC_3
kenjiArai 10:1c0f58b9c048 36 PC_10
kenjiArai 10:1c0f58b9c048 37 PC_11
kenjiArai 10:1c0f58b9c048 38 PC_12
kenjiArai 10:1c0f58b9c048 39
kenjiArai 10:1c0f58b9c048 40 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 41 // ----- Software Modification ---------------
kenjiArai 10:1c0f58b9c048 42 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 43 // SUMMARY information
kenjiArai 10:1c0f58b9c048 44 // Nucleo_rtos_sample
kenjiArai 10:1c0f58b9c048 45 + debug_tools_L152_F4x1RE <- Created as new lib.
kenjiArai 10:1c0f58b9c048 46 + SetRTC <- Lib. updated by myself
kenjiArai 10:1c0f58b9c048 47 // + files
kenjiArai 11:587b8f1bab9d 48 + mbed-rtos <- Rev.77 (checked on May 16, 2015)
kenjiArai 10:1c0f58b9c048 49 // + rtos
kenjiArai 10:1c0f58b9c048 50 // + rtx
kenjiArai 10:1c0f58b9c048 51 // + TARGET_CORTEX_M
kenjiArai 11:587b8f1bab9d 52 + RTX_Conf_CM.c <- (1) Need to modify before compile by yourself
kenjiArai 10:1c0f58b9c048 53 // + DIRs & Files
kenjiArai 10:1c0f58b9c048 54 // + DIRs & Files + DIRs & Files
kenjiArai 10:1c0f58b9c048 55 + mbe-src <- Rev.541 (checked on May 16, 2015)
kenjiArai 10:1c0f58b9c048 56 // + targets
kenjiArai 10:1c0f58b9c048 57 // + cmsis
kenjiArai 10:1c0f58b9c048 58 // + TARGET_STM
kenjiArai 10:1c0f58b9c048 59 // + TARGET_STM32L1
kenjiArai 10:1c0f58b9c048 60 // + TARGET_NUCLEO_L152RE
kenjiArai 10:1c0f58b9c048 61 // + system_stm32l1xx.c
kenjiArai 11:587b8f1bab9d 62 <- (2) Need to modify before compile by yourself
kenjiArai 10:1c0f58b9c048 63 // + DIRs & Files
kenjiArai 10:1c0f58b9c048 64 // + hal
kenjiArai 10:1c0f58b9c048 65 // + TARGET_STM
kenjiArai 10:1c0f58b9c048 66 // + TARGET_STM32F4
kenjiArai 10:1c0f58b9c048 67 // + rtc_api.c
kenjiArai 11:587b8f1bab9d 68 <- (3) Need to modify before compile by yourself
kenjiArai 10:1c0f58b9c048 69 // + DIRs & Files
kenjiArai 10:1c0f58b9c048 70 // + TARGET_NUCLEO_L152RE
kenjiArai 10:1c0f58b9c048 71 // + rtc_api.c
kenjiArai 11:587b8f1bab9d 72 <- (4) Need to modify before compile by yourself
kenjiArai 10:1c0f58b9c048 73 // + DIRs & Files
kenjiArai 10:1c0f58b9c048 74 // + DIR & Files + DIRs & Files + DIRs & Files
kenjiArai 10:1c0f58b9c048 75
kenjiArai 10:1c0f58b9c048 76 (1) CAUTION!! for Nucleo L152RE mbed
kenjiArai 10:1c0f58b9c048 77 L152 mbed has following setting both mbed lib. and mbed-src lib.
kenjiArai 10:1c0f58b9c048 78 System Clock = 24 MHz (started as 32 MHz but due to USB clock creation, changed to 24 MHz)
kenjiArai 11:587b8f1bab9d 79 If you would like to use 24 MHz, do NOT modify (1) and (2).
kenjiArai 10:1c0f58b9c048 80
kenjiArai 10:1c0f58b9c048 81 (2) CAUTION!! for Nucleo F411RE mbed
kenjiArai 10:1c0f58b9c048 82 F411 med has been changed System clock = 96 MHz (former setting 100 MHz).
kenjiArai 10:1c0f58b9c048 83 Please modify #ifndef OS_CLOCK related part.
kenjiArai 10:1c0f58b9c048 84
kenjiArai 10:1c0f58b9c048 85 //-------------------------------------------------------------------------------------------------
kenjiArai 11:587b8f1bab9d 86 // (1) /mbed-rtos/mbed-rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
kenjiArai 10:1c0f58b9c048 87 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 88 // Insert & Modifiy (from line 118)
kenjiArai 10:1c0f58b9c048 89 /*
kenjiArai 10:1c0f58b9c048 90 // Insert (below 2 lines)
kenjiArai 10:1c0f58b9c048 91 #elif defined(TARGET_STM32L152RE)
kenjiArai 10:1c0f58b9c048 92 //# define OS_CLOCK 24000000
kenjiArai 10:1c0f58b9c048 93 # define OS_CLOCK 32000000
kenjiArai 10:1c0f58b9c048 94 // Modify (100MHz to 96MHz)
kenjiArai 10:1c0f58b9c048 95 # elif defined(TARGET_STM32F411RE)
kenjiArai 10:1c0f58b9c048 96 # define OS_CLOCK 96000000
kenjiArai 10:1c0f58b9c048 97 */
kenjiArai 10:1c0f58b9c048 98 // Copy & Paste from next line
kenjiArai 10:1c0f58b9c048 99 #ifndef OS_CLOCK
kenjiArai 10:1c0f58b9c048 100 # if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
kenjiArai 10:1c0f58b9c048 101 # define OS_CLOCK 96000000
kenjiArai 10:1c0f58b9c048 102
kenjiArai 10:1c0f58b9c048 103 # elif defined(TARGET_LPC1347) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32F303RE)
kenjiArai 10:1c0f58b9c048 104 # define OS_CLOCK 72000000
kenjiArai 10:1c0f58b9c048 105
kenjiArai 10:1c0f58b9c048 106 # elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) || defined(TARGET_KL25Z) \
kenjiArai 10:1c0f58b9c048 107 || defined(TARGET_KL05Z) || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F051R8) || defined(TARGET_LPC11U68) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC)
kenjiArai 10:1c0f58b9c048 108 # define OS_CLOCK 48000000
kenjiArai 10:1c0f58b9c048 109
kenjiArai 10:1c0f58b9c048 110 # elif defined(TARGET_LPC812)
kenjiArai 10:1c0f58b9c048 111 # define OS_CLOCK 36000000
kenjiArai 10:1c0f58b9c048 112
kenjiArai 10:1c0f58b9c048 113 # elif defined(TARGET_LPC824)
kenjiArai 10:1c0f58b9c048 114 # define OS_CLOCK 30000000
kenjiArai 10:1c0f58b9c048 115
kenjiArai 10:1c0f58b9c048 116 # elif defined(TARGET_STM32F100RB)
kenjiArai 10:1c0f58b9c048 117 # define OS_CLOCK 24000000
kenjiArai 10:1c0f58b9c048 118
kenjiArai 10:1c0f58b9c048 119 # elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_K64F) || defined(TARGET_K22F)
kenjiArai 10:1c0f58b9c048 120 # define OS_CLOCK 120000000
kenjiArai 10:1c0f58b9c048 121
kenjiArai 10:1c0f58b9c048 122 # elif defined(TARGET_LPC4330)
kenjiArai 10:1c0f58b9c048 123 # define OS_CLOCK 204000000
kenjiArai 10:1c0f58b9c048 124
kenjiArai 10:1c0f58b9c048 125 # elif defined(TARGET_LPC4337)
kenjiArai 10:1c0f58b9c048 126 # define OS_CLOCK 204000000
kenjiArai 10:1c0f58b9c048 127
kenjiArai 10:1c0f58b9c048 128 # elif defined(TARGET_STM32F407) || defined(TARGET_F407VG)
kenjiArai 10:1c0f58b9c048 129 # define OS_CLOCK 168000000
kenjiArai 10:1c0f58b9c048 130
kenjiArai 10:1c0f58b9c048 131 # elif defined(TARGET_STM32F401RE)
kenjiArai 10:1c0f58b9c048 132 # define OS_CLOCK 84000000
kenjiArai 10:1c0f58b9c048 133
kenjiArai 10:1c0f58b9c048 134 # elif defined(TARGET_STM32F411RE)
kenjiArai 10:1c0f58b9c048 135 # define OS_CLOCK 96000000
kenjiArai 10:1c0f58b9c048 136
kenjiArai 10:1c0f58b9c048 137 #elif defined(TARGET_STM32F103RB)
kenjiArai 10:1c0f58b9c048 138 # define OS_CLOCK 72000000
kenjiArai 10:1c0f58b9c048 139
kenjiArai 10:1c0f58b9c048 140 #elif defined(TARGET_STM32F429ZI)
kenjiArai 10:1c0f58b9c048 141 # define OS_CLOCK 168000000
kenjiArai 10:1c0f58b9c048 142
kenjiArai 10:1c0f58b9c048 143 #elif defined(TARGET_STM32F302R8)
kenjiArai 10:1c0f58b9c048 144 # define OS_CLOCK 64000000
kenjiArai 10:1c0f58b9c048 145
kenjiArai 10:1c0f58b9c048 146 #elif defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8)
kenjiArai 10:1c0f58b9c048 147 # define OS_CLOCK 32000000
kenjiArai 10:1c0f58b9c048 148
kenjiArai 10:1c0f58b9c048 149 #elif defined(TARGET_STM32F401VC)
kenjiArai 10:1c0f58b9c048 150 # define OS_CLOCK 84000000
kenjiArai 10:1c0f58b9c048 151
kenjiArai 10:1c0f58b9c048 152 #elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
kenjiArai 10:1c0f58b9c048 153 # define OS_CLOCK 24000000
kenjiArai 10:1c0f58b9c048 154
kenjiArai 10:1c0f58b9c048 155 #elif defined(TARGET_STM32L152RE)
kenjiArai 10:1c0f58b9c048 156 //# define OS_CLOCK 24000000
kenjiArai 10:1c0f58b9c048 157 # define OS_CLOCK 32000000
kenjiArai 10:1c0f58b9c048 158
kenjiArai 10:1c0f58b9c048 159 # else
kenjiArai 10:1c0f58b9c048 160 # error "no target defined"
kenjiArai 10:1c0f58b9c048 161 # endif
kenjiArai 10:1c0f58b9c048 162 #endif
kenjiArai 10:1c0f58b9c048 163
kenjiArai 10:1c0f58b9c048 164 // <o>Timer tick value [us] <1-1000000>
kenjiArai 10:1c0f58b9c048 165 // <i> Defines the timer tick value.
kenjiArai 10:1c0f58b9c048 166 // <i> Default: 1000 (1ms)
kenjiArai 10:1c0f58b9c048 167 #ifndef OS_TICK
kenjiArai 10:1c0f58b9c048 168 #define OS_TICK 1000
kenjiArai 10:1c0f58b9c048 169 #endif
kenjiArai 10:1c0f58b9c048 170 // to above line
kenjiArai 10:1c0f58b9c048 171
kenjiArai 10:1c0f58b9c048 172 //-------------------------------------------------------------------------------------------------
kenjiArai 11:587b8f1bab9d 173 // (2) /mbed-src/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/system_stm32l1xx.c
kenjiArai 10:1c0f58b9c048 174 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 175 // inside SetSysClock_PLL_HSE() function (line 483)
kenjiArai 10:1c0f58b9c048 176 // Modify (from line 511)
kenjiArai 10:1c0f58b9c048 177 // Copy & Paste from next line
kenjiArai 10:1c0f58b9c048 178 #if 0
kenjiArai 10:1c0f58b9c048 179 // SYSCLK = 24 MHz ((8 MHz * 6) / 2)
kenjiArai 10:1c0f58b9c048 180 // USBCLK = 48 MHz (8 MHz * 6) --> USB OK
kenjiArai 10:1c0f58b9c048 181 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
kenjiArai 10:1c0f58b9c048 182 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
kenjiArai 10:1c0f58b9c048 183 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
kenjiArai 10:1c0f58b9c048 184 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV2;
kenjiArai 10:1c0f58b9c048 185 #else
kenjiArai 10:1c0f58b9c048 186 // SYSCLK = 32 MHz ((8 MHz * 8) / 2)
kenjiArai 10:1c0f58b9c048 187 // USBCLK = 48 MHz (8 MHz * 8) --> USB NG
kenjiArai 10:1c0f58b9c048 188 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
kenjiArai 10:1c0f58b9c048 189 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
kenjiArai 10:1c0f58b9c048 190 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL8;
kenjiArai 10:1c0f58b9c048 191 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV2;
kenjiArai 10:1c0f58b9c048 192 #endif
kenjiArai 10:1c0f58b9c048 193 // to above line
kenjiArai 10:1c0f58b9c048 194
kenjiArai 10:1c0f58b9c048 195 //-------------------------------------------------------------------------------------------------
kenjiArai 11:587b8f1bab9d 196 // (3) /mbed-src/targets/hal/TARGET_STM/TARGET_STM/TARGET_STM32F4/rtc_api.c
kenjiArai 10:1c0f58b9c048 197 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 198 Please see /debug_tools_L152_F4x1RE/SetRTC/modify_info_F4xx.h
kenjiArai 10:1c0f58b9c048 199
kenjiArai 10:1c0f58b9c048 200 //-------------------------------------------------------------------------------------------------
kenjiArai 11:587b8f1bab9d 201 // (4) /mbed-src/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/rtc_api.c
kenjiArai 10:1c0f58b9c048 202 //-------------------------------------------------------------------------------------------------
kenjiArai 10:1c0f58b9c048 203 Please see /debug_tools_L152_F4x1RE/SetRTC/modify_info_L152.h
kenjiArai 10:1c0f58b9c048 204
kenjiArai 10:1c0f58b9c048 205 #endif ///////////////////////////////////////////////////////////////////////////////////////