Kenji Arai / CheckRTC

Checking program for RTC module inside CPU.

Dependents:   RTC_w_COM Frequency_Counter_w_GPS_1PPS debug_tools Nucleo_RTC_Clock_setting ... more

Please refer below link.
http://developer.mbed.org/users/kenjiArai/notebook/nucleo-series-clock-structure-and-xtal-oscillation/

CheckRTC.cpp@1:921a188e61c0, 2014-11-01 (annotated)

Committer:
kenjiArai
Date:
Sat Nov 01 01:46:04 2014 +0000
Revision:
1:921a188e61c0
Parent:
0:01ddb8e35845
Child:
2:2ee7a7260cbf
Added register access routine

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 0:01ddb8e35845 1 /*
kenjiArai 0:01ddb8e35845 2 * mbed Library program
kenjiArai 0:01ddb8e35845 3 * Check RTC function and set proper clock if we can set
kenjiArai 0:01ddb8e35845 4 * ONLY FOR "Nucleo Board"
kenjiArai 0:01ddb8e35845 5 *
kenjiArai 0:01ddb8e35845 6 * Copyright (c) 2010-2014 Kenji Arai / JH1PJL
kenjiArai 0:01ddb8e35845 7 * http://www.page.sannet.ne.jp/kenjia/index.html
kenjiArai 0:01ddb8e35845 8 * http://mbed.org/users/kenjiArai/
kenjiArai 0:01ddb8e35845 9 * Created: October 24th, 2014
kenjiArai 0:01ddb8e35845 10 * Revised: November 1st, 2014
kenjiArai 0:01ddb8e35845 11 *
kenjiArai 0:01ddb8e35845 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
kenjiArai 0:01ddb8e35845 13 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
kenjiArai 0:01ddb8e35845 14 * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
kenjiArai 0:01ddb8e35845 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
kenjiArai 0:01ddb8e35845 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
kenjiArai 0:01ddb8e35845 17 */
kenjiArai 0:01ddb8e35845 18
kenjiArai 0:01ddb8e35845 19 //#define DEBUG // use Communication with PC(UART)
kenjiArai 0:01ddb8e35845 20
kenjiArai 0:01ddb8e35845 21 // Include ---------------------------------------------------------------------------------------
kenjiArai 0:01ddb8e35845 22 #include "mbed.h"
kenjiArai 0:01ddb8e35845 23 #include "CheckRTC.h"
kenjiArai 0:01ddb8e35845 24
kenjiArai 0:01ddb8e35845 25 // Definition ------------------------------------------------------------------------------------
kenjiArai 0:01ddb8e35845 26 #ifdef DEBUG
kenjiArai 0:01ddb8e35845 27 #define BAUD(x) pcm.baud(x)
kenjiArai 0:01ddb8e35845 28 #define GETC(x) pcm.getc(x)
kenjiArai 0:01ddb8e35845 29 #define PUTC(x) pcm.putc(x)
kenjiArai 0:01ddb8e35845 30 #define PRINTF(...) pcm.printf(__VA_ARGS__)
kenjiArai 0:01ddb8e35845 31 #define READABLE(x) pcm.readable(x)
kenjiArai 0:01ddb8e35845 32 #else
kenjiArai 0:01ddb8e35845 33 #define BAUD(x) {;}
kenjiArai 0:01ddb8e35845 34 #define GETC(x) {;}
kenjiArai 0:01ddb8e35845 35 #define PUTC(x) {;}
kenjiArai 0:01ddb8e35845 36 #define PRINTF(...) {;}
kenjiArai 0:01ddb8e35845 37 #define READABLE(x) {;}
kenjiArai 0:01ddb8e35845 38 #endif
kenjiArai 0:01ddb8e35845 39
kenjiArai 0:01ddb8e35845 40 // Object ----------------------------------------------------------------------------------------
kenjiArai 0:01ddb8e35845 41 #ifdef DEBUG
kenjiArai 0:01ddb8e35845 42 Serial pcm(USBTX, USBRX);
kenjiArai 0:01ddb8e35845 43 #endif
kenjiArai 0:01ddb8e35845 44 //DigitalOut myled(LED1);
kenjiArai 0:01ddb8e35845 45 //Timer t;
kenjiArai 0:01ddb8e35845 46
kenjiArai 0:01ddb8e35845 47 // RAM -------------------------------------------------------------------------------------------
kenjiArai 0:01ddb8e35845 48
kenjiArai 0:01ddb8e35845 49 // ROM / Constant data ---------------------------------------------------------------------------
kenjiArai 0:01ddb8e35845 50
kenjiArai 0:01ddb8e35845 51 // Function prototypes ---------------------------------------------------------------------------
kenjiArai 0:01ddb8e35845 52 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_L152RE)
kenjiArai 0:01ddb8e35845 53 static int32_t Set_RTC_LSI(void);
kenjiArai 0:01ddb8e35845 54 static int32_t rtc_external_osc_init(void);
kenjiArai 0:01ddb8e35845 55 static int32_t Set_RTC_LSE(void);
kenjiArai 0:01ddb8e35845 56 #endif
kenjiArai 0:01ddb8e35845 57
kenjiArai 0:01ddb8e35845 58 //-------------------------------------------------------------------------------------------------
kenjiArai 0:01ddb8e35845 59 // Control Program
kenjiArai 0:01ddb8e35845 60 //-------------------------------------------------------------------------------------------------
kenjiArai 0:01ddb8e35845 61 int32_t CheckRTC()
kenjiArai 0:01ddb8e35845 62 {
kenjiArai 0:01ddb8e35845 63 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_L152RE)
kenjiArai 0:01ddb8e35845 64 if (rtc_external_osc_init() == OK) {
kenjiArai 0:01ddb8e35845 65 return OK;
kenjiArai 0:01ddb8e35845 66 } else {
kenjiArai 0:01ddb8e35845 67 return NG;
kenjiArai 0:01ddb8e35845 68 }
kenjiArai 0:01ddb8e35845 69 #elif defined(TARGET_LPC1768) || defined(TARGET_K64F)
kenjiArai 0:01ddb8e35845 70 return OK;
kenjiArai 0:01ddb8e35845 71 #else
kenjiArai 0:01ddb8e35845 72 return UNKNOWN;
kenjiArai 0:01ddb8e35845 73 #endif
kenjiArai 0:01ddb8e35845 74 }
kenjiArai 0:01ddb8e35845 75
kenjiArai 1:921a188e61c0 76 uint32_t get_RTCSEL(void){
kenjiArai 1:921a188e61c0 77 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
kenjiArai 1:921a188e61c0 78 return ((RCC->BDCR >> 8) & 0x03);
kenjiArai 1:921a188e61c0 79 #elif defined(TARGET_NUCLEO_L152RE)
kenjiArai 1:921a188e61c0 80 return ((RCC->CSR >> 16) & 0x03);
kenjiArai 1:921a188e61c0 81 #else
kenjiArai 1:921a188e61c0 82 return 0;
kenjiArai 1:921a188e61c0 83 #endif
kenjiArai 1:921a188e61c0 84 }
kenjiArai 1:921a188e61c0 85
kenjiArai 1:921a188e61c0 86
kenjiArai 0:01ddb8e35845 87 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_L152RE)
kenjiArai 0:01ddb8e35845 88 int32_t Set_RTC_LSE(void)
kenjiArai 0:01ddb8e35845 89 {
kenjiArai 0:01ddb8e35845 90 uint32_t timeout = 0;
kenjiArai 0:01ddb8e35845 91
kenjiArai 0:01ddb8e35845 92 //---------------------------- LSE Configuration -------------------------
kenjiArai 0:01ddb8e35845 93 // Enable Power Clock
kenjiArai 0:01ddb8e35845 94 __PWR_CLK_ENABLE();
kenjiArai 0:01ddb8e35845 95 // Enable write access to Backup domain
kenjiArai 0:01ddb8e35845 96 PWR->CR |= PWR_CR_DBP;
kenjiArai 0:01ddb8e35845 97 // Wait for Backup domain Write protection disable
kenjiArai 0:01ddb8e35845 98 timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE;
kenjiArai 0:01ddb8e35845 99 while((PWR->CR & PWR_CR_DBP) == RESET) {
kenjiArai 0:01ddb8e35845 100 if(HAL_GetTick() >= timeout) {
kenjiArai 0:01ddb8e35845 101 PRINTF("Time-Out 1\r\n");
kenjiArai 0:01ddb8e35845 102 return NG;
kenjiArai 0:01ddb8e35845 103 }
kenjiArai 0:01ddb8e35845 104 }
kenjiArai 0:01ddb8e35845 105 // Reset LSEON and LSEBYP bits before configuring the LSE ----------------
kenjiArai 0:01ddb8e35845 106 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
kenjiArai 0:01ddb8e35845 107 // Get timeout
kenjiArai 0:01ddb8e35845 108 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 0:01ddb8e35845 109 // Wait till LSE is ready
kenjiArai 0:01ddb8e35845 110 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) {
kenjiArai 0:01ddb8e35845 111 if(HAL_GetTick() >= timeout) {
kenjiArai 0:01ddb8e35845 112 PRINTF("Time-Out 2\r\n");
kenjiArai 0:01ddb8e35845 113 return NG;
kenjiArai 0:01ddb8e35845 114 }
kenjiArai 0:01ddb8e35845 115 }
kenjiArai 0:01ddb8e35845 116 // Set the new LSE configuration -----------------------------------------
kenjiArai 0:01ddb8e35845 117 __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
kenjiArai 0:01ddb8e35845 118 // Get timeout
kenjiArai 0:01ddb8e35845 119 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 0:01ddb8e35845 120 // Wait till LSE is ready
kenjiArai 0:01ddb8e35845 121 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {
kenjiArai 0:01ddb8e35845 122 if(HAL_GetTick() >= timeout) {
kenjiArai 0:01ddb8e35845 123 PRINTF("Time-Out 3\r\n");
kenjiArai 0:01ddb8e35845 124 return NG;
kenjiArai 0:01ddb8e35845 125 }
kenjiArai 0:01ddb8e35845 126 }
kenjiArai 0:01ddb8e35845 127 PRINTF("OK");
kenjiArai 0:01ddb8e35845 128 return OK;
kenjiArai 0:01ddb8e35845 129 }
kenjiArai 0:01ddb8e35845 130
kenjiArai 0:01ddb8e35845 131 int32_t Set_RTC_LSI(void)
kenjiArai 0:01ddb8e35845 132 {
kenjiArai 0:01ddb8e35845 133 uint32_t timeout = 0;
kenjiArai 0:01ddb8e35845 134
kenjiArai 0:01ddb8e35845 135 // Enable Power clock
kenjiArai 0:01ddb8e35845 136 __PWR_CLK_ENABLE();
kenjiArai 0:01ddb8e35845 137 // Enable access to Backup domain
kenjiArai 0:01ddb8e35845 138 HAL_PWR_EnableBkUpAccess();
kenjiArai 0:01ddb8e35845 139 // Reset Backup domain
kenjiArai 0:01ddb8e35845 140 __HAL_RCC_BACKUPRESET_FORCE();
kenjiArai 0:01ddb8e35845 141 __HAL_RCC_BACKUPRESET_RELEASE();
kenjiArai 0:01ddb8e35845 142 // Enable Power Clock
kenjiArai 0:01ddb8e35845 143 __PWR_CLK_ENABLE();
kenjiArai 0:01ddb8e35845 144 // Enable write access to Backup domain
kenjiArai 0:01ddb8e35845 145 PWR->CR |= PWR_CR_DBP;
kenjiArai 0:01ddb8e35845 146 // Wait for Backup domain Write protection disable
kenjiArai 0:01ddb8e35845 147 timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE;
kenjiArai 0:01ddb8e35845 148 while((PWR->CR & PWR_CR_DBP) == RESET) {
kenjiArai 0:01ddb8e35845 149 if(HAL_GetTick() >= timeout) {
kenjiArai 0:01ddb8e35845 150 return NG;
kenjiArai 0:01ddb8e35845 151 }
kenjiArai 0:01ddb8e35845 152 }
kenjiArai 0:01ddb8e35845 153 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
kenjiArai 0:01ddb8e35845 154 // Enable LSI
kenjiArai 0:01ddb8e35845 155 __HAL_RCC_LSI_ENABLE();
kenjiArai 0:01ddb8e35845 156 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 0:01ddb8e35845 157 // Wait till LSI is ready
kenjiArai 0:01ddb8e35845 158 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) {
kenjiArai 0:01ddb8e35845 159 if(HAL_GetTick() >= timeout) {
kenjiArai 0:01ddb8e35845 160 return NG;
kenjiArai 0:01ddb8e35845 161 }
kenjiArai 0:01ddb8e35845 162 }
kenjiArai 0:01ddb8e35845 163 // Connect LSI to RTC
kenjiArai 0:01ddb8e35845 164 __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
kenjiArai 0:01ddb8e35845 165 __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
kenjiArai 0:01ddb8e35845 166 return OK;
kenjiArai 0:01ddb8e35845 167 }
kenjiArai 0:01ddb8e35845 168
kenjiArai 0:01ddb8e35845 169 int32_t rtc_external_osc_init(void)
kenjiArai 0:01ddb8e35845 170 {
kenjiArai 0:01ddb8e35845 171 // Enable Power clock
kenjiArai 0:01ddb8e35845 172 __PWR_CLK_ENABLE();
kenjiArai 0:01ddb8e35845 173 // Enable access to Backup domain
kenjiArai 0:01ddb8e35845 174 HAL_PWR_EnableBkUpAccess();
kenjiArai 0:01ddb8e35845 175 // Reset Backup domain
kenjiArai 0:01ddb8e35845 176 __HAL_RCC_BACKUPRESET_FORCE();
kenjiArai 0:01ddb8e35845 177 __HAL_RCC_BACKUPRESET_RELEASE();
kenjiArai 0:01ddb8e35845 178 // Enable LSE Oscillator
kenjiArai 0:01ddb8e35845 179 if (Set_RTC_LSE() == OK) {
kenjiArai 0:01ddb8e35845 180 // Connect LSE to RTC
kenjiArai 0:01ddb8e35845 181 __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
kenjiArai 0:01ddb8e35845 182 __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
kenjiArai 0:01ddb8e35845 183 return OK;
kenjiArai 0:01ddb8e35845 184 } else {
kenjiArai 0:01ddb8e35845 185 Set_RTC_LSI();
kenjiArai 0:01ddb8e35845 186 return NG;
kenjiArai 0:01ddb8e35845 187 }
kenjiArai 0:01ddb8e35845 188 }
kenjiArai 0:01ddb8e35845 189 #endif