shunpei kataoka
/
nRF51822
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Fork of
nRF51822
by 
Shuta Nakamae
Diff: source/nordic-sdk/components/device/nrf51.h
- Revision:
- 498:d72c7e78ee13
- Parent:
- 496:08bd8a46630b
diff -r 4b09b9115685 -r d72c7e78ee13 source/nordic-sdk/components/device/nrf51.h
--- a/source/nordic-sdk/components/device/nrf51.h Wed Dec 02 10:32:51 2015 +0000
+++ b/source/nordic-sdk/components/device/nrf51.h Wed Dec 02 10:32:52 2015 +0000
@@ -30,10 +30,6 @@
*
*/
-/** @addtogroup nRF51
- * @{
- */
-
#ifndef NRF51_H
#define NRF51_H
@@ -53,7 +49,7 @@
DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */
PendSV_IRQn = -2, /*!< 14 Pendable request for system service */
SysTick_IRQn = -1, /*!< 15 System Tick Timer */
-/* ---------------------- nRF51 Specific Interrupt Numbers ---------------------- */
+/* ---------------------- nrf51 Specific Interrupt Numbers ---------------------- */
POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */
RADIO_IRQn = 1, /*!< 1 RADIO */
UART0_IRQn = 2, /*!< 2 UART0 */
@@ -99,7 +95,7 @@
/** @} */ /* End of group Configuration_of_CMSIS */
#include "core_cm0.h" /*!< Cortex-M0 processor and core peripherals */
-#include "system_nrf51.h" /*!< nRF51 System */
+#include "system_nrf51.h" /*!< nrf51 System */
/* ================================================================================ */
@@ -166,15 +162,6 @@
__IO uint32_t TEP; /*!< Channel task end-point. */
} PPI_CH_Type;
-typedef struct {
- __I uint32_t PART; /*!< Part code */
- __I uint32_t VARIANT; /*!< Part variant */
- __I uint32_t PACKAGE; /*!< Package option */
- __I uint32_t RAM; /*!< RAM variant */
- __I uint32_t FLASH; /*!< Flash variant */
- __I uint32_t RESERVED[3]; /*!< Reserved */
-} FICR_INFO_Type;
-
/* ================================================================================ */
/* ================ POWER ================ */
@@ -349,7 +336,7 @@
__IO uint32_t EVENTS_RSSIEND; /*!< Sampling of the receive signal strength complete. A new RSSI
sample is ready for readout at the RSSISAMPLE register. */
__I uint32_t RESERVED1[2];
- __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value specified in BC register. */
+ __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value specified in BCC register. */
__I uint32_t RESERVED2[53];
__IO uint32_t SHORTS; /*!< Shortcuts for the radio. */
__I uint32_t RESERVED3[64];
@@ -426,16 +413,14 @@
__IO uint32_t EVENTS_ERROR; /*!< Error detected. */
__I uint32_t RESERVED4[7];
__IO uint32_t EVENTS_RXTO; /*!< Receiver timeout. */
- __I uint32_t RESERVED5[46];
- __IO uint32_t SHORTS; /*!< Shortcuts for UART. */
- __I uint32_t RESERVED6[64];
+ __I uint32_t RESERVED5[111];
__IO uint32_t INTENSET; /*!< Interrupt enable set register. */
__IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
- __I uint32_t RESERVED7[93];
+ __I uint32_t RESERVED6[93];
__IO uint32_t ERRORSRC; /*!< Error source. Write error field to 1 to clear error. */
- __I uint32_t RESERVED8[31];
+ __I uint32_t RESERVED7[31];
__IO uint32_t ENABLE; /*!< Enable UART and acquire IOs. */
- __I uint32_t RESERVED9;
+ __I uint32_t RESERVED8;
__IO uint32_t PSELRTS; /*!< Pin select for RTS. */
__IO uint32_t PSELTXD; /*!< Pin select for TXD. */
__IO uint32_t PSELCTS; /*!< Pin select for CTS. */
@@ -444,11 +429,11 @@
Once read the character is consumed. If read when no character
available, the UART will stop working. */
__O uint32_t TXD; /*!< TXD register. */
- __I uint32_t RESERVED10;
+ __I uint32_t RESERVED9;
__IO uint32_t BAUDRATE; /*!< UART Baudrate. */
- __I uint32_t RESERVED11[17];
+ __I uint32_t RESERVED10[17];
__IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control register. */
- __I uint32_t RESERVED12[675];
+ __I uint32_t RESERVED11[675];
__IO uint32_t POWER; /*!< Peripheral power control. */
} NRF_UART_Type;
@@ -626,20 +611,17 @@
__IO uint32_t ENABLE; /*!< Enable SPIM. */
__I uint32_t RESERVED10;
SPIM_PSEL_Type PSEL; /*!< Pin select configuration. */
- __I uint32_t RESERVED11;
- __I uint32_t RXDDATA; /*!< RXD register. */
- __IO uint32_t TXDDATA; /*!< TXD register. */
- __I uint32_t RESERVED12;
+ __I uint32_t RESERVED11[4];
__IO uint32_t FREQUENCY; /*!< SPI frequency. */
- __I uint32_t RESERVED13[3];
+ __I uint32_t RESERVED12[3];
SPIM_RXD_Type RXD; /*!< RXD EasyDMA configuration and status. */
- __I uint32_t RESERVED14;
+ __I uint32_t RESERVED13;
SPIM_TXD_Type TXD; /*!< TXD EasyDMA configuration and status. */
- __I uint32_t RESERVED15;
+ __I uint32_t RESERVED14;
__IO uint32_t CONFIG; /*!< Configuration register. */
- __I uint32_t RESERVED16[26];
+ __I uint32_t RESERVED15[26];
__IO uint32_t ORC; /*!< Over-read character. */
- __I uint32_t RESERVED17[654];
+ __I uint32_t RESERVED16[654];
__IO uint32_t POWER; /*!< Peripheral power control. */
} NRF_SPIM_Type;
@@ -1070,9 +1052,13 @@
__I uint32_t READY; /*!< Ready flag. */
__I uint32_t RESERVED1[64];
__IO uint32_t CONFIG; /*!< Configuration register. */
- __IO uint32_t ERASEPAGE; /*!< Register for erasing a non-protected non-volatile memory page. */
+
+ union {
+ __IO uint32_t ERASEPCR1; /*!< Register for erasing a non-protected non-volatile memory page. */
+ __IO uint32_t ERASEPAGE; /*!< Register for erasing a non-protected non-volatile memory page. */
+ };
__IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory. */
- __IO uint32_t ERASEPROTECTEDPAGE; /*!< Register for erasing a protected non-volatile memory page. */
+ __IO uint32_t ERASEPCR0; /*!< Register for erasing a protected non-volatile memory page. */
__IO uint32_t ERASEUICR; /*!< Register for start erasing User Information Congfiguration Registers. */
} NRF_NVMC_Type;
@@ -1138,7 +1124,6 @@
__I uint32_t RESERVED5[10];
__I uint32_t BLE_1MBIT[5]; /*!< Override values for the OVERRIDEn registers in RADIO for BLE_1Mbit
mode. */
- FICR_INFO_Type INFO; /*!< Device info */
} NRF_FICR_Type;
@@ -1157,7 +1142,13 @@
__IO uint32_t XTALFREQ; /*!< Reset value for CLOCK XTALFREQ register. */
__I uint32_t RESERVED0;
__I uint32_t FWID; /*!< Firmware ID. */
- __IO uint32_t BOOTLOADERADDR; /*!< Bootloader start address. */
+
+ union {
+ __IO uint32_t NRFFW[15]; /*!< Reserved for Nordic firmware design. */
+ __IO uint32_t BOOTLOADERADDR; /*!< Bootloader start address. */
+ };
+ __IO uint32_t NRFHW[12]; /*!< Reserved for Nordic hardware design. */
+ __IO uint32_t CUSTOMER[32]; /*!< Reserved for customer. */
} NRF_UICR_Type;
@@ -1283,7 +1274,7 @@
/** @} */ /* End of group Device_Peripheral_Registers */
-/** @} */ /* End of group nRF51 */
+/** @} */ /* End of group nrf51 */
/** @} */ /* End of group Nordic Semiconductor */
#ifdef __cplusplus
@@ -1291,4 +1282,4 @@
#endif
-#endif /* nRF51_H */
+#endif /* nrf51_H */