SDBlockDevice.cpp

00001 /* mbed Microcontroller Library
00002  * Copyright (c) 2006-2013 ARM Limited
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 
00017 /* Introduction
00018  * ------------
00019  * SD and MMC cards support a number of interfaces, but common to them all
00020  * is one based on SPI. Since we already have the mbed SPI Interface, it will
00021  * be used for SD cards.
00022  *
00023  * The main reference I'm using is Chapter 7, "SPI Mode" of:
00024  *  http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
00025  *
00026  * SPI Startup
00027  * -----------
00028  * The SD card powers up in SD mode. The start-up procedure is complicated
00029  * by the requirement to support older SDCards in a backwards compatible
00030  * way with the new higher capacity variants SDHC and SDHC.
00031  *
00032  * The following figures from the specification with associated text describe
00033  * the SPI mode initialisation process:
00034  *  - Figure 7-1: SD Memory Card State Diagram (SPI mode)
00035  *  - Figure 7-2: SPI Mode Initialization Flow
00036  *
00037  * Firstly, a low initial clock should be selected (in the range of 100-
00038  * 400kHZ). After initialisation has been completed, the switch to a
00039  * higher clock speed can be made (e.g. 1MHz). Newer cards will support
00040  * higher speeds than the default _transfer_sck defined here.
00041  *
00042  * Next, note the following from the SDCard specification (note to
00043  * Figure 7-1):
00044  *
00045  *  In any of the cases CMD1 is not recommended because it may be difficult for the host
00046  *  to distinguish between MultiMediaCard and SD Memory Card
00047  *
00048  * Hence CMD1 is not used for the initialisation sequence.
00049  *
00050  * The SPI interface mode is selected by asserting CS low and sending the
00051  * reset command (CMD0). The card will respond with a (R1) response.
00052  * In practice many cards initially respond with 0xff or invalid data
00053  * which is ignored. Data is read until a valid response is received
00054  * or the number of re-reads has exceeded a maximim count. If a valid
00055  * response is not received then the CMD0 can be retried. This
00056  * has been found to successfully initialise cards where the SPI master
00057  * (on MCU) has been reset but the SDCard has not, so the first
00058  * CMD0 may be lost.
00059  *
00060  * CMD8 is optionally sent to determine the voltage range supported, and
00061  * indirectly determine whether it is a version 1.x SD/non-SD card or
00062  * version 2.x. I'll just ignore this for now.
00063  *
00064  * ACMD41 is repeatedly issued to initialise the card, until "in idle"
00065  * (bit 0) of the R1 response goes to '0', indicating it is initialised.
00066  *
00067  * You should also indicate whether the host supports High Capicity cards,
00068  * and check whether the card is high capacity - i'll also ignore this
00069  *
00070  * SPI Protocol
00071  * ------------
00072  * The SD SPI protocol is based on transactions made up of 8-bit words, with
00073  * the host starting every bus transaction by asserting the CS signal low. The
00074  * card always responds to commands, data blocks and errors.
00075  *
00076  * The protocol supports a CRC, but by default it is off (except for the
00077  * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
00078  * I'll leave the CRC off I think!
00079  *
00080  * Standard capacity cards have variable data block sizes, whereas High
00081  * Capacity cards fix the size of data block to 512 bytes. I'll therefore
00082  * just always use the Standard Capacity cards with a block size of 512 bytes.
00083  * This is set with CMD16.
00084  *
00085  * You can read and write single blocks (CMD17, CMD25) or multiple blocks
00086  * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
00087  * the card gets a read command, it responds with a response token, and then
00088  * a data token or an error.
00089  *
00090  * SPI Command Format
00091  * ------------------
00092  * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
00093  *
00094  * +---------------+------------+------------+-----------+----------+--------------+
00095  * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
00096  * +---------------+------------+------------+-----------+----------+--------------+
00097  *
00098  * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
00099  *
00100  * All Application Specific commands shall be preceded with APP_CMD (CMD55).
00101  *
00102  * SPI Response Format
00103  * -------------------
00104  * The main response format (R1) is a status byte (normally zero). Key flags:
00105  *  idle - 1 if the card is in an idle state/initialising
00106  *  cmd  - 1 if an illegal command code was detected
00107  *
00108  *    +-------------------------------------------------+
00109  * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
00110  *    +-------------------------------------------------+
00111  *
00112  * R1b is the same, except it is followed by a busy signal (zeros) until
00113  * the first non-zero byte when it is ready again.
00114  *
00115  * Data Response Token
00116  * -------------------
00117  * Every data block written to the card is acknowledged by a byte
00118  * response token
00119  *
00120  * +----------------------+
00121  * | xxx | 0 | status | 1 |
00122  * +----------------------+
00123  *              010 - OK!
00124  *              101 - CRC Error
00125  *              110 - Write Error
00126  *
00127  * Single Block Read and Write
00128  * ---------------------------
00129  *
00130  * Block transfers have a byte header, followed by the data, followed
00131  * by a 16-bit CRC. In our case, the data will always be 512 bytes.
00132  *
00133  * +------+---------+---------+- -  - -+---------+-----------+----------+
00134  * | 0xFE | data[0] | data[1] |        | data[n] | crc[15:8] | crc[7:0] |
00135  * +------+---------+---------+- -  - -+---------+-----------+----------+
00136  */
00137 
00138 /* If the target has no SPI support then SDCard is not supported */
00139 #ifdef DEVICE_SPI
00140 
00141 #include "SDBlockDevice.h"
00142 #include "platform/mbed_debug.h"
00143 #include "platform/mbed_wait_api.h"
00144 #include <errno.h>
00145 
00146 #ifndef MBED_CONF_SD_CMD_TIMEOUT
00147 #define MBED_CONF_SD_CMD_TIMEOUT                 5000   /*!< Timeout in ms for response */
00148 #endif
00149 
00150 #ifndef MBED_CONF_SD_CMD0_IDLE_STATE_RETRIES
00151 #define MBED_CONF_SD_CMD0_IDLE_STATE_RETRIES     5      /*!< Number of retries for sending CMDO */
00152 #endif
00153 
00154 #ifndef MBED_CONF_SD_INIT_FREQUENCY
00155 #define MBED_CONF_SD_INIT_FREQUENCY              100000 /*!< Initialization frequency Range (100KHz-400KHz) */
00156 #endif
00157 
00158 
00159 #define SD_COMMAND_TIMEOUT                       MBED_CONF_SD_CMD_TIMEOUT
00160 #define SD_CMD0_GO_IDLE_STATE_RETRIES            MBED_CONF_SD_CMD0_IDLE_STATE_RETRIES
00161 #define SD_DBG                                   0      /*!< 1 - Enable debugging */
00162 #define SD_CMD_TRACE                             0      /*!< 1 - Enable SD command tracing */
00163 
00164 #define SD_BLOCK_DEVICE_ERROR_WOULD_BLOCK        -5001  /*!< operation would block */
00165 #define SD_BLOCK_DEVICE_ERROR_UNSUPPORTED        -5002  /*!< unsupported operation */
00166 #define SD_BLOCK_DEVICE_ERROR_PARAMETER          -5003  /*!< invalid parameter */
00167 #define SD_BLOCK_DEVICE_ERROR_NO_INIT            -5004  /*!< uninitialized */
00168 #define SD_BLOCK_DEVICE_ERROR_NO_DEVICE          -5005  /*!< device is missing or not connected */
00169 #define SD_BLOCK_DEVICE_ERROR_WRITE_PROTECTED    -5006  /*!< write protected */
00170 #define SD_BLOCK_DEVICE_ERROR_UNUSABLE           -5007  /*!< unusable card */
00171 #define SD_BLOCK_DEVICE_ERROR_NO_RESPONSE        -5008  /*!< No response from device */
00172 #define SD_BLOCK_DEVICE_ERROR_CRC                -5009  /*!< CRC error */
00173 #define SD_BLOCK_DEVICE_ERROR_ERASE              -5010  /*!< Erase error: reset/sequence */
00174 #define SD_BLOCK_DEVICE_ERROR_WRITE              -5011  /*!< SPI Write error: !SPI_DATA_ACCEPTED */
00175 
00176 #define BLOCK_SIZE_HC                            512    /*!< Block size supported for SD card is 512 bytes  */
00177 #define WRITE_BL_PARTIAL                         0      /*!< Partial block write - Not supported */
00178 #define SPI_CMD(x) (0x40 | (x & 0x3f))
00179 
00180 /* R1 Response Format */
00181 #define R1_NO_RESPONSE          (0xFF)
00182 #define R1_RESPONSE_RECV        (0x80)
00183 #define R1_IDLE_STATE           (1 << 0)
00184 #define R1_ERASE_RESET          (1 << 1)
00185 #define R1_ILLEGAL_COMMAND      (1 << 2)
00186 #define R1_COM_CRC_ERROR        (1 << 3)
00187 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
00188 #define R1_ADDRESS_ERROR        (1 << 5)
00189 #define R1_PARAMETER_ERROR      (1 << 6)
00190 
00191 // Types
00192 #define SDCARD_NONE              0           /**< No card is present */
00193 #define SDCARD_V1                1           /**< v1.x Standard Capacity */
00194 #define SDCARD_V2                2           /**< v2.x Standard capacity SD card */
00195 #define SDCARD_V2HC              3           /**< v2.x High capacity SD card */
00196 #define CARD_UNKNOWN             4           /**< Unknown or unsupported card */
00197 
00198 /* SIZE in Bytes */
00199 #define PACKET_SIZE              6           /*!< SD Packet size CMD+ARG+CRC */
00200 #define R1_RESPONSE_SIZE         1           /*!< Size of R1 response */
00201 #define R2_RESPONSE_SIZE         2           /*!< Size of R2 response */
00202 #define R3_R7_RESPONSE_SIZE      5           /*!< Size of R3/R7 response */
00203 
00204 /* R1b Response */
00205 #define DEVICE_BUSY             (0x00)
00206 
00207 /* R2 Response Format */
00208 #define R2_CARD_LOCKED          (1 << 0)
00209 #define R2_CMD_FAILED           (1 << 1)
00210 #define R2_ERROR                (1 << 2)
00211 #define R2_CC_ERROR             (1 << 3)
00212 #define R2_CC_FAILED            (1 << 4)
00213 #define R2_WP_VIOLATION         (1 << 5)
00214 #define R2_ERASE_PARAM          (1 << 6)
00215 #define R2_OUT_OF_RANGE         (1 << 7)
00216 
00217 /* R3 Response : OCR Register */
00218 #define OCR_HCS_CCS             (0x1 << 30)
00219 #define OCR_LOW_VOLTAGE         (0x01 << 24)
00220 #define OCR_3_3V                (0x1 << 20)
00221 
00222 /* R7 response pattern for CMD8 */
00223 #define CMD8_PATTERN             (0xAA)
00224 
00225 /*  CRC Enable  */
00226 #define CRC_ENABLE               (0)         /*!< CRC 1 - Enable 0 - Disable */
00227 
00228 /* Control Tokens   */
00229 #define SPI_DATA_RESPONSE_MASK   (0x1F)
00230 #define SPI_DATA_ACCEPTED        (0x05)
00231 #define SPI_DATA_CRC_ERROR       (0x0B)
00232 #define SPI_DATA_WRITE_ERROR     (0x0D)
00233 #define SPI_START_BLOCK          (0xFE)      /*!< For Single Block Read/Write and Multiple Block Read */
00234 #define SPI_START_BLK_MUL_WRITE  (0xFC)      /*!< Start Multi-block write */
00235 #define SPI_STOP_TRAN            (0xFD)      /*!< Stop Multi-block write */
00236 
00237 #define SPI_DATA_READ_ERROR_MASK (0xF)       /*!< Data Error Token: 4 LSB bits */
00238 #define SPI_READ_ERROR           (0x1 << 0)  /*!< Error */
00239 #define SPI_READ_ERROR_CC        (0x1 << 1)  /*!< CC Error*/
00240 #define SPI_READ_ERROR_ECC_C     (0x1 << 2)  /*!< Card ECC failed */
00241 #define SPI_READ_ERROR_OFR       (0x1 << 3)  /*!< Out of Range */
00242 
00243 SDBlockDevice::SDBlockDevice(PinName mosi, PinName miso, PinName sclk, PinName cs, uint64_t hz, bool crc_on)
00244     : _sectors(0), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0),
00245       _crc_on(crc_on), _init_ref_count(0), _crc16(0, 0, false, false)
00246 {
00247     _cs = 1;
00248     _card_type = SDCARD_NONE;
00249 
00250     // Set default to 100kHz for initialisation and 1MHz for data transfer
00251     MBED_STATIC_ASSERT(((MBED_CONF_SD_INIT_FREQUENCY >= 100000) && (MBED_CONF_SD_INIT_FREQUENCY <= 400000)),
00252                        "Initialization frequency should be between 100KHz to 400KHz");
00253     _init_sck = MBED_CONF_SD_INIT_FREQUENCY;
00254     _transfer_sck = hz;
00255 
00256     // Only HC block size is supported.
00257     _block_size = BLOCK_SIZE_HC;
00258     _erase_size = BLOCK_SIZE_HC;
00259 }
00260 
00261 SDBlockDevice::~SDBlockDevice()
00262 {
00263     if (_is_initialized) {
00264         deinit();
00265     }
00266 }
00267 
00268 int SDBlockDevice::_initialise_card()
00269 {
00270     // Detail debugging is for commands
00271     _dbg = SD_DBG ? SD_CMD_TRACE : 0;
00272     int32_t status = BD_ERROR_OK;
00273     uint32_t response, arg;
00274 
00275     // Initialize the SPI interface: Card by default is in SD mode
00276     _spi_init();
00277 
00278     // The card is transitioned from SDCard mode to SPI mode by sending the CMD0 + CS Asserted("0")
00279     if (_go_idle_state() != R1_IDLE_STATE) {
00280         debug_if(SD_DBG, "No disk, or could not put SD card in to SPI idle state\n");
00281         return SD_BLOCK_DEVICE_ERROR_NO_DEVICE;
00282     }
00283 
00284     // Send CMD8, if the card rejects the command then it's probably using the
00285     // legacy protocol, or is a MMC, or just flat-out broken
00286     status = _cmd8();
00287     if (BD_ERROR_OK != status && SD_BLOCK_DEVICE_ERROR_UNSUPPORTED != status) {
00288         return status;
00289     }
00290 
00291     if (_crc_on) {
00292         // Enable CRC
00293         status = _cmd(CMD59_CRC_ON_OFF, _crc_on);
00294     }
00295 
00296     // Read OCR - CMD58 Response contains OCR register
00297     if (BD_ERROR_OK != (status = _cmd(CMD58_READ_OCR, 0x0, 0x0, &response))) {
00298         return status;
00299     }
00300 
00301     // Check if card supports voltage range: 3.3V
00302     if (!(response & OCR_3_3V)) {
00303         _card_type = CARD_UNKNOWN;
00304         status = SD_BLOCK_DEVICE_ERROR_UNUSABLE;
00305         return status;
00306     }
00307 
00308     // HCS is set 1 for HC/XC capacity cards for ACMD41, if supported
00309     arg = 0x0;
00310     if (SDCARD_V2 == _card_type) {
00311         arg |= OCR_HCS_CCS;
00312     }
00313 
00314     /* Idle state bit in the R1 response of ACMD41 is used by the card to inform the host
00315      * if initialization of ACMD41 is completed. "1" indicates that the card is still initializing.
00316      * "0" indicates completion of initialization. The host repeatedly issues ACMD41 until
00317      * this bit is set to "0".
00318      */
00319     _spi_timer.start();
00320     do {
00321         status = _cmd(ACMD41_SD_SEND_OP_COND, arg, 1, &response);
00322     } while ((response & R1_IDLE_STATE) && (_spi_timer.read_ms() < SD_COMMAND_TIMEOUT));
00323     _spi_timer.stop();
00324 
00325     // Initialization complete: ACMD41 successful
00326     if ((BD_ERROR_OK != status) || (0x00 != response)) {
00327         _card_type = CARD_UNKNOWN;
00328         debug_if(SD_DBG, "Timeout waiting for card\n");
00329         return status;
00330     }
00331 
00332     if (SDCARD_V2 == _card_type) {
00333         // Get the card capacity CCS: CMD58
00334         if (BD_ERROR_OK == (status = _cmd(CMD58_READ_OCR, 0x0, 0x0, &response))) {
00335             // High Capacity card
00336             if (response & OCR_HCS_CCS) {
00337                 _card_type = SDCARD_V2HC;
00338                 debug_if(SD_DBG, "Card Initialized: High Capacity Card \n");
00339             } else {
00340                 debug_if(SD_DBG, "Card Initialized: Standard Capacity Card: Version 2.x \n");
00341             }
00342         }
00343     } else {
00344         _card_type = SDCARD_V1;
00345         debug_if(SD_DBG, "Card Initialized: Version 1.x Card\n");
00346     }
00347 
00348     if (!_crc_on) {
00349         // Disable CRC
00350         status = _cmd(CMD59_CRC_ON_OFF, _crc_on);
00351     }
00352     return status;
00353 }
00354 
00355 
00356 int SDBlockDevice::init()
00357 {
00358     int err;
00359 
00360     lock();
00361 
00362     if (!_is_initialized) {
00363         _init_ref_count = 0;
00364     }
00365 
00366     _init_ref_count++;
00367 
00368     if (_init_ref_count != 1) {
00369         goto end;
00370     }
00371 
00372     err = _initialise_card();
00373     _is_initialized = (err == BD_ERROR_OK);
00374     if (!_is_initialized) {
00375         debug_if(SD_DBG, "Fail to initialize card\n");
00376         unlock();
00377         return err;
00378     }
00379     debug_if(SD_DBG, "init card = %d\n", _is_initialized);
00380     _sectors = _sd_sectors();
00381     // CMD9 failed
00382     if (0 == _sectors) {
00383         unlock();
00384         return BD_ERROR_DEVICE_ERROR;
00385     }
00386 
00387     // Set block length to 512 (CMD16)
00388     if (_cmd(CMD16_SET_BLOCKLEN, _block_size) != 0) {
00389         debug_if(SD_DBG, "Set %d-byte block timed out\n", _block_size);
00390         unlock();
00391         return BD_ERROR_DEVICE_ERROR;
00392     }
00393 
00394     // Set SCK for data transfer
00395     err = _freq();
00396     if (err) {
00397         unlock();
00398         return err;
00399     }
00400 
00401 end:
00402     unlock();
00403     return BD_ERROR_OK;
00404 }
00405 
00406 int SDBlockDevice::deinit()
00407 {
00408     lock();
00409 
00410     if (!_is_initialized) {
00411         _init_ref_count = 0;
00412         goto end;
00413     }
00414 
00415     _init_ref_count--;
00416 
00417     if (_init_ref_count) {
00418         goto end;
00419     }
00420 
00421     _is_initialized = false;
00422     _sectors = 0;
00423 
00424 end:
00425     unlock();
00426     return BD_ERROR_OK;
00427 }
00428 
00429 
00430 int SDBlockDevice::program(const void *b, bd_addr_t addr, bd_size_t size)
00431 {
00432     if (!is_valid_program(addr, size)) {
00433         return SD_BLOCK_DEVICE_ERROR_PARAMETER;
00434     }
00435 
00436     lock();
00437     if (!_is_initialized) {
00438         unlock();
00439         return SD_BLOCK_DEVICE_ERROR_NO_INIT;
00440     }
00441 
00442     const uint8_t *buffer = static_cast<const uint8_t *>(b);
00443     int status = BD_ERROR_OK;
00444     uint8_t response;
00445 
00446     // Get block count
00447     bd_addr_t blockCnt = size / _block_size;
00448 
00449     // SDSC Card (CCS=0) uses byte unit address
00450     // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
00451     if (SDCARD_V2HC == _card_type) {
00452         addr = addr / _block_size;
00453     }
00454 
00455     // Send command to perform write operation
00456     if (blockCnt == 1) {
00457         // Single block write command
00458         if (BD_ERROR_OK != (status = _cmd(CMD24_WRITE_BLOCK, addr))) {
00459             unlock();
00460             return status;
00461         }
00462 
00463         // Write data
00464         response = _write(buffer, SPI_START_BLOCK, _block_size);
00465 
00466         // Only CRC and general write error are communicated via response token
00467         if (response != SPI_DATA_ACCEPTED) {
00468             debug_if(SD_DBG, "Single Block Write failed: 0x%x \n", response);
00469             status = SD_BLOCK_DEVICE_ERROR_WRITE;
00470         }
00471     } else {
00472         // Pre-erase setting prior to multiple block write operation
00473         _cmd(ACMD23_SET_WR_BLK_ERASE_COUNT, blockCnt, 1);
00474 
00475         // Multiple block write command
00476         if (BD_ERROR_OK != (status = _cmd(CMD25_WRITE_MULTIPLE_BLOCK, addr))) {
00477             unlock();
00478             return status;
00479         }
00480 
00481         // Write the data: one block at a time
00482         do {
00483             response = _write(buffer, SPI_START_BLK_MUL_WRITE, _block_size);
00484             if (response != SPI_DATA_ACCEPTED) {
00485                 debug_if(SD_DBG, "Multiple Block Write failed: 0x%x \n", response);
00486                 break;
00487             }
00488             buffer += _block_size;
00489         } while (--blockCnt);     // Receive all blocks of data
00490 
00491         /* In a Multiple Block write operation, the stop transmission will be done by
00492          * sending 'Stop Tran' token instead of 'Start Block' token at the beginning
00493          * of the next block
00494          */
00495         _spi.write(SPI_STOP_TRAN);
00496     }
00497 
00498     _deselect();
00499     unlock();
00500     return status;
00501 }
00502 
00503 int SDBlockDevice::read(void *b, bd_addr_t addr, bd_size_t size)
00504 {
00505     if (!is_valid_read(addr, size)) {
00506         return SD_BLOCK_DEVICE_ERROR_PARAMETER;
00507     }
00508 
00509     lock();
00510     if (!_is_initialized) {
00511         unlock();
00512         return SD_BLOCK_DEVICE_ERROR_PARAMETER;
00513     }
00514 
00515     uint8_t *buffer = static_cast<uint8_t *>(b);
00516     int status = BD_ERROR_OK;
00517     bd_addr_t blockCnt =  size / _block_size;
00518 
00519     // SDSC Card (CCS=0) uses byte unit address
00520     // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
00521     if (SDCARD_V2HC == _card_type) {
00522         addr = addr / _block_size;
00523     }
00524 
00525     // Write command ro receive data
00526     if (blockCnt > 1) {
00527         status = _cmd(CMD18_READ_MULTIPLE_BLOCK, addr);
00528     } else {
00529         status = _cmd(CMD17_READ_SINGLE_BLOCK, addr);
00530     }
00531     if (BD_ERROR_OK != status) {
00532         unlock();
00533         return status;
00534     }
00535 
00536     // receive the data : one block at a time
00537     while (blockCnt) {
00538         if (0 != _read(buffer, _block_size)) {
00539             status = SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
00540             break;
00541         }
00542         buffer += _block_size;
00543         --blockCnt;
00544     }
00545     _deselect();
00546 
00547     // Send CMD12(0x00000000) to stop the transmission for multi-block transfer
00548     if (size > _block_size) {
00549         status = _cmd(CMD12_STOP_TRANSMISSION, 0x0);
00550     }
00551     unlock();
00552     return status;
00553 }
00554 
00555 bool SDBlockDevice::_is_valid_trim(bd_addr_t addr, bd_size_t size)
00556 {
00557     return (
00558                addr % _erase_size == 0 &&
00559                size % _erase_size == 0 &&
00560                addr + size <= this->size());
00561 }
00562 
00563 int SDBlockDevice::trim(bd_addr_t addr, bd_size_t size)
00564 {
00565     if (!_is_valid_trim(addr, size)) {
00566         return SD_BLOCK_DEVICE_ERROR_PARAMETER;
00567     }
00568 
00569     lock();
00570     if (!_is_initialized) {
00571         unlock();
00572         return SD_BLOCK_DEVICE_ERROR_NO_INIT;
00573     }
00574     int status = BD_ERROR_OK;
00575 
00576     size -= _block_size;
00577     // SDSC Card (CCS=0) uses byte unit address
00578     // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
00579     if (SDCARD_V2HC == _card_type) {
00580         size = size / _block_size;
00581         addr = addr / _block_size;
00582     }
00583 
00584     // Start lba sent in start command
00585     if (BD_ERROR_OK != (status = _cmd(CMD32_ERASE_WR_BLK_START_ADDR, addr))) {
00586         unlock();
00587         return status;
00588     }
00589 
00590     // End lba = addr+size sent in end addr command
00591     if (BD_ERROR_OK != (status = _cmd(CMD33_ERASE_WR_BLK_END_ADDR, addr + size))) {
00592         unlock();
00593         return status;
00594     }
00595     status = _cmd(CMD38_ERASE, 0x0);
00596     unlock();
00597     return status;
00598 }
00599 
00600 bd_size_t SDBlockDevice::get_read_size() const
00601 {
00602     return _block_size;
00603 }
00604 
00605 bd_size_t SDBlockDevice::get_program_size() const
00606 {
00607     return _block_size;
00608 }
00609 
00610 bd_size_t SDBlockDevice::size() const
00611 {
00612     return _block_size * _sectors;
00613 }
00614 
00615 void SDBlockDevice::debug(bool dbg)
00616 {
00617     _dbg = dbg;
00618 }
00619 
00620 int SDBlockDevice::frequency(uint64_t freq)
00621 {
00622     lock();
00623     _transfer_sck = freq;
00624     int err = _freq();
00625     unlock();
00626     return err;
00627 }
00628 
00629 // PRIVATE FUNCTIONS
00630 int SDBlockDevice::_freq(void)
00631 {
00632     // Max frequency supported is 25MHZ
00633     if (_transfer_sck <= 25000000) {
00634         _spi.frequency(_transfer_sck);
00635         return 0;
00636     } else {  // TODO: Switch function to be implemented for higher frequency
00637         _transfer_sck = 25000000;
00638         _spi.frequency(_transfer_sck);
00639         return -EINVAL;
00640     }
00641 }
00642 
00643 uint8_t SDBlockDevice::_cmd_spi(SDBlockDevice::cmdSupported cmd, uint32_t arg)
00644 {
00645     uint8_t response;
00646     char cmdPacket[PACKET_SIZE];
00647     uint32_t crc;
00648 
00649     // Prepare the command packet
00650     cmdPacket[0] = SPI_CMD(cmd);
00651     cmdPacket[1] = (arg >> 24);
00652     cmdPacket[2] = (arg >> 16);
00653     cmdPacket[3] = (arg >> 8);
00654     cmdPacket[4] = (arg >> 0);
00655 
00656     if (_crc_on) {
00657         _crc7.compute((void *)cmdPacket, 5, &crc);
00658         cmdPacket[5] = (char)(crc | 0x01);
00659     } else {
00660         // CMD0 is executed in SD mode, hence should have correct CRC
00661         // CMD8 CRC verification is always enabled
00662         switch (cmd) {
00663             case CMD0_GO_IDLE_STATE:
00664                 cmdPacket[5] = 0x95;
00665                 break;
00666             case CMD8_SEND_IF_COND:
00667                 cmdPacket[5] = 0x87;
00668                 break;
00669             default:
00670                 cmdPacket[5] = 0xFF;    // Make sure bit 0-End bit is high
00671                 break;
00672         }
00673     }
00674 
00675     // send a command
00676     for (int i = 0; i < PACKET_SIZE; i++) {
00677         _spi.write(cmdPacket[i]);
00678     }
00679 
00680     // The received byte immediataly following CMD12 is a stuff byte,
00681     // it should be discarded before receive the response of the CMD12.
00682     if (CMD12_STOP_TRANSMISSION == cmd) {
00683         _spi.write(SPI_FILL_CHAR);
00684     }
00685 
00686     // Loop for response: Response is sent back within command response time (NCR), 0 to 8 bytes for SDC
00687     for (int i = 0; i < 0x10; i++) {
00688         response = _spi.write(SPI_FILL_CHAR);
00689         // Got the response
00690         if (!(response & R1_RESPONSE_RECV)) {
00691             break;
00692         }
00693     }
00694     return response;
00695 }
00696 
00697 int SDBlockDevice::_cmd(SDBlockDevice::cmdSupported cmd, uint32_t arg, bool isAcmd, uint32_t *resp)
00698 {
00699     int32_t status = BD_ERROR_OK;
00700     uint32_t response;
00701 
00702     // Select card and wait for card to be ready before sending next command
00703     // Note: next command will fail if card is not ready
00704     _select();
00705 
00706     // No need to wait for card to be ready when sending the stop command
00707     if (CMD12_STOP_TRANSMISSION != cmd) {
00708         if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
00709             debug_if(SD_DBG, "Card not ready yet \n");
00710         }
00711     }
00712 
00713     // Re-try command
00714     for (int i = 0; i < 3; i++) {
00715         // Send CMD55 for APP command first
00716         if (isAcmd) {
00717             response = _cmd_spi(CMD55_APP_CMD, 0x0);
00718             // Wait for card to be ready after CMD55
00719             if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
00720                 debug_if(SD_DBG, "Card not ready yet \n");
00721             }
00722         }
00723 
00724         // Send command over SPI interface
00725         response = _cmd_spi(cmd, arg);
00726         if (R1_NO_RESPONSE == response) {
00727             debug_if(SD_DBG, "No response CMD:%d \n", cmd);
00728             continue;
00729         }
00730         break;
00731     }
00732 
00733     // Pass the response to the command call if required
00734     if (NULL != resp) {
00735         *resp = response;
00736     }
00737 
00738     // Process the response R1  : Exit on CRC/Illegal command error/No response
00739     if (R1_NO_RESPONSE == response) {
00740         _deselect();
00741         debug_if(SD_DBG, "No response CMD:%d response: 0x%x\n", cmd, response);
00742         return SD_BLOCK_DEVICE_ERROR_NO_DEVICE;         // No device
00743     }
00744     if (response & R1_COM_CRC_ERROR) {
00745         _deselect();
00746         debug_if(SD_DBG, "CRC error CMD:%d response 0x%x \n", cmd, response);
00747         return SD_BLOCK_DEVICE_ERROR_CRC;                // CRC error
00748     }
00749     if (response & R1_ILLEGAL_COMMAND) {
00750         _deselect();
00751         debug_if(SD_DBG, "Illegal command CMD:%d response 0x%x\n", cmd, response);
00752         if (CMD8_SEND_IF_COND == cmd) {                  // Illegal command is for Ver1 or not SD Card
00753             _card_type = CARD_UNKNOWN;
00754         }
00755         return SD_BLOCK_DEVICE_ERROR_UNSUPPORTED;      // Command not supported
00756     }
00757 
00758     debug_if(_dbg, "CMD:%d \t arg:0x%x \t Response:0x%x \n", cmd, arg, response);
00759     // Set status for other errors
00760     if ((response & R1_ERASE_RESET) || (response & R1_ERASE_SEQUENCE_ERROR)) {
00761         status = SD_BLOCK_DEVICE_ERROR_ERASE;            // Erase error
00762     } else if ((response & R1_ADDRESS_ERROR) || (response & R1_PARAMETER_ERROR)) {
00763         // Misaligned address / invalid address block length
00764         status = SD_BLOCK_DEVICE_ERROR_PARAMETER;
00765     }
00766 
00767     // Get rest of the response part for other commands
00768     switch (cmd) {
00769         case CMD8_SEND_IF_COND:             // Response R7
00770             debug_if(_dbg, "V2-Version Card\n");
00771             _card_type = SDCARD_V2;
00772         // Note: No break here, need to read rest of the response
00773         case CMD58_READ_OCR:                // Response R3
00774             response  = (_spi.write(SPI_FILL_CHAR) << 24);
00775             response |= (_spi.write(SPI_FILL_CHAR) << 16);
00776             response |= (_spi.write(SPI_FILL_CHAR) << 8);
00777             response |= _spi.write(SPI_FILL_CHAR);
00778             debug_if(_dbg, "R3/R7: 0x%x \n", response);
00779             break;
00780 
00781         case CMD12_STOP_TRANSMISSION:       // Response R1b
00782         case CMD38_ERASE:
00783             _wait_ready(SD_COMMAND_TIMEOUT);
00784             break;
00785 
00786         case ACMD13_SD_STATUS:             // Response R2
00787             response = _spi.write(SPI_FILL_CHAR);
00788             debug_if(_dbg, "R2: 0x%x \n", response);
00789             break;
00790 
00791         default:                            // Response R1
00792             break;
00793     }
00794 
00795     // Pass the updated response to the command
00796     if (NULL != resp) {
00797         *resp = response;
00798     }
00799 
00800     // Do not deselect card if read is in progress.
00801     if (((CMD9_SEND_CSD == cmd) || (ACMD22_SEND_NUM_WR_BLOCKS == cmd) ||
00802             (CMD24_WRITE_BLOCK == cmd) || (CMD25_WRITE_MULTIPLE_BLOCK == cmd) ||
00803             (CMD17_READ_SINGLE_BLOCK == cmd) || (CMD18_READ_MULTIPLE_BLOCK == cmd))
00804             && (BD_ERROR_OK == status)) {
00805         return BD_ERROR_OK;
00806     }
00807     // Deselect card
00808     _deselect();
00809     return status;
00810 }
00811 
00812 int SDBlockDevice::_cmd8()
00813 {
00814     uint32_t arg = (CMD8_PATTERN << 0);         // [7:0]check pattern
00815     uint32_t response = 0;
00816     int32_t status = BD_ERROR_OK;
00817 
00818     arg |= (0x1 << 8);  // 2.7-3.6V             // [11:8]supply voltage(VHS)
00819 
00820     status = _cmd(CMD8_SEND_IF_COND, arg, 0x0, &response);
00821     // Verify voltage and pattern for V2 version of card
00822     if ((BD_ERROR_OK == status) && (SDCARD_V2 == _card_type)) {
00823         // If check pattern is not matched, CMD8 communication is not valid
00824         if ((response & 0xFFF) != arg) {
00825             debug_if(SD_DBG, "CMD8 Pattern mismatch 0x%x : 0x%x\n", arg, response);
00826             _card_type = CARD_UNKNOWN;
00827             status = SD_BLOCK_DEVICE_ERROR_UNUSABLE;
00828         }
00829     }
00830     return status;
00831 }
00832 
00833 uint32_t SDBlockDevice::_go_idle_state()
00834 {
00835     uint32_t response;
00836 
00837     /* Reseting the MCU SPI master may not reset the on-board SDCard, in which
00838      * case when MCU power-on occurs the SDCard will resume operations as
00839      * though there was no reset. In this scenario the first CMD0 will
00840      * not be interpreted as a command and get lost. For some cards retrying
00841      * the command overcomes this situation. */
00842     for (int i = 0; i < SD_CMD0_GO_IDLE_STATE_RETRIES; i++) {
00843         _cmd(CMD0_GO_IDLE_STATE, 0x0, 0x0, &response);
00844         if (R1_IDLE_STATE == response) {
00845             break;
00846         }
00847         wait_ms(1);
00848     }
00849     return response;
00850 }
00851 
00852 int SDBlockDevice::_read_bytes(uint8_t *buffer, uint32_t length)
00853 {
00854     uint16_t crc;
00855 
00856     // read until start byte (0xFE)
00857     if (false == _wait_token(SPI_START_BLOCK)) {
00858         debug_if(SD_DBG, "Read timeout\n");
00859         _deselect();
00860         return SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
00861     }
00862 
00863     // read data
00864     for (uint32_t i = 0; i < length; i++) {
00865         buffer[i] = _spi.write(SPI_FILL_CHAR);
00866     }
00867 
00868     // Read the CRC16 checksum for the data block
00869     crc = (_spi.write(SPI_FILL_CHAR) << 8);
00870     crc |= _spi.write(SPI_FILL_CHAR);
00871 
00872     if (_crc_on) {
00873         uint32_t crc_result;
00874         // Compute and verify checksum
00875         _crc16.compute((void *)buffer, length, &crc_result);
00876         if ((uint16_t)crc_result != crc) {
00877             debug_if(SD_DBG, "_read_bytes: Invalid CRC received 0x%x result of computation 0x%x\n",
00878                      crc, crc_result);
00879             _deselect();
00880             return SD_BLOCK_DEVICE_ERROR_CRC;
00881         }
00882     }
00883 
00884     _deselect();
00885     return 0;
00886 }
00887 
00888 int SDBlockDevice::_read(uint8_t *buffer, uint32_t length)
00889 {
00890     uint16_t crc;
00891 
00892     // read until start byte (0xFE)
00893     if (false == _wait_token(SPI_START_BLOCK)) {
00894         debug_if(SD_DBG, "Read timeout\n");
00895         _deselect();
00896         return SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
00897     }
00898 
00899     // read data
00900     _spi.write(NULL, 0, (char *)buffer, length);
00901 
00902     // Read the CRC16 checksum for the data block
00903     crc = (_spi.write(SPI_FILL_CHAR) << 8);
00904     crc |= _spi.write(SPI_FILL_CHAR);
00905 
00906     if (_crc_on) {
00907         uint32_t crc_result;
00908         // Compute and verify checksum
00909         _crc16.compute((void *)buffer, length, &crc_result);
00910         if ((uint16_t)crc_result != crc) {
00911             debug_if(SD_DBG, "_read_bytes: Invalid CRC received 0x%x result of computation 0x%x\n",
00912                      crc, crc_result);
00913             return SD_BLOCK_DEVICE_ERROR_CRC;
00914         }
00915     }
00916 
00917     return 0;
00918 }
00919 
00920 uint8_t SDBlockDevice::_write(const uint8_t *buffer, uint8_t token, uint32_t length)
00921 {
00922 
00923     uint32_t crc = (~0);
00924     uint8_t response = 0xFF;
00925 
00926     // indicate start of block
00927     _spi.write(token);
00928 
00929     // write the data
00930     _spi.write((char *)buffer, length, NULL, 0);
00931 
00932     if (_crc_on) {
00933         // Compute CRC
00934         _crc16.compute((void *)buffer, length, &crc);
00935     }
00936 
00937     // write the checksum CRC16
00938     _spi.write(crc >> 8);
00939     _spi.write(crc);
00940 
00941 
00942     // check the response token
00943     response = _spi.write(SPI_FILL_CHAR);
00944 
00945     // Wait for last block to be written
00946     if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
00947         debug_if(SD_DBG, "Card not ready yet \n");
00948     }
00949 
00950     return (response & SPI_DATA_RESPONSE_MASK);
00951 }
00952 
00953 static uint32_t ext_bits(unsigned char *data, int msb, int lsb)
00954 {
00955     uint32_t bits = 0;
00956     uint32_t size = 1 + msb - lsb;
00957     for (uint32_t i = 0; i < size; i++) {
00958         uint32_t position = lsb + i;
00959         uint32_t byte = 15 - (position >> 3);
00960         uint32_t bit = position & 0x7;
00961         uint32_t value = (data[byte] >> bit) & 1;
00962         bits |= value << i;
00963     }
00964     return bits;
00965 }
00966 
00967 bd_size_t SDBlockDevice::_sd_sectors()
00968 {
00969     uint32_t c_size, c_size_mult, read_bl_len;
00970     uint32_t block_len, mult, blocknr;
00971     uint32_t hc_c_size;
00972     bd_size_t blocks = 0, capacity = 0;
00973 
00974     // CMD9, Response R2 (R1 byte + 16-byte block read)
00975     if (_cmd(CMD9_SEND_CSD, 0x0) != 0x0) {
00976         debug_if(SD_DBG, "Didn't get a response from the disk\n");
00977         return 0;
00978     }
00979     uint8_t csd[16];
00980     if (_read_bytes(csd, 16) != 0) {
00981         debug_if(SD_DBG, "Couldn't read csd response from disk\n");
00982         return 0;
00983     }
00984 
00985     // csd_structure : csd[127:126]
00986     int csd_structure = ext_bits(csd, 127, 126);
00987     switch (csd_structure) {
00988         case 0:
00989             c_size = ext_bits(csd, 73, 62);              // c_size        : csd[73:62]
00990             c_size_mult = ext_bits(csd, 49, 47);         // c_size_mult   : csd[49:47]
00991             read_bl_len = ext_bits(csd, 83, 80);         // read_bl_len   : csd[83:80] - the *maximum* read block length
00992             block_len = 1 << read_bl_len;                // BLOCK_LEN = 2^READ_BL_LEN
00993             mult = 1 << (c_size_mult + 2);               // MULT = 2^C_SIZE_MULT+2 (C_SIZE_MULT < 8)
00994             blocknr = (c_size + 1) * mult;               // BLOCKNR = (C_SIZE+1) * MULT
00995             capacity = blocknr * block_len;              // memory capacity = BLOCKNR * BLOCK_LEN
00996             blocks = capacity / _block_size;
00997             debug_if(SD_DBG, "Standard Capacity: c_size: %d \n", c_size);
00998             debug_if(SD_DBG, "Sectors: 0x%x : %llu\n", blocks, blocks);
00999             debug_if(SD_DBG, "Capacity: 0x%x : %llu MB\n", capacity, (capacity / (1024U * 1024U)));
01000 
01001             // ERASE_BLK_EN = 1: Erase in multiple of 512 bytes supported
01002             if (ext_bits(csd, 46, 46)) {
01003                 _erase_size = BLOCK_SIZE_HC;
01004             } else {
01005                 // ERASE_BLK_EN = 1: Erase in multiple of SECTOR_SIZE supported
01006                 _erase_size = BLOCK_SIZE_HC * (ext_bits(csd, 45, 39) + 1);
01007             }
01008             break;
01009 
01010         case 1:
01011             hc_c_size = ext_bits(csd, 69, 48);            // device size : C_SIZE : [69:48]
01012             blocks = (hc_c_size + 1) << 10;               // block count = C_SIZE+1) * 1K byte (512B is block size)
01013             debug_if(SD_DBG, "SDHC/SDXC Card: hc_c_size: %d \n", hc_c_size);
01014             debug_if(SD_DBG, "Sectors: 0x%x : %llu\n", blocks, blocks);
01015             debug_if(SD_DBG, "Capacity: %llu MB\n", (blocks / (2048U)));
01016             // ERASE_BLK_EN is fixed to 1, which means host can erase one or multiple of 512 bytes.
01017             _erase_size = BLOCK_SIZE_HC;
01018             break;
01019 
01020         default:
01021             debug_if(SD_DBG, "CSD struct unsupported\r\n");
01022             return 0;
01023     };
01024     return blocks;
01025 }
01026 
01027 // SPI function to wait till chip is ready and sends start token
01028 bool SDBlockDevice::_wait_token(uint8_t token)
01029 {
01030     _spi_timer.reset();
01031     _spi_timer.start();
01032 
01033     do {
01034         if (token == _spi.write(SPI_FILL_CHAR)) {
01035             _spi_timer.stop();
01036             return true;
01037         }
01038     } while (_spi_timer.read_ms() < 300);       // Wait for 300 msec for start token
01039     _spi_timer.stop();
01040     debug_if(SD_DBG, "_wait_token: timeout\n");
01041     return false;
01042 }
01043 
01044 // SPI function to wait till chip is ready
01045 // The host controller should wait for end of the process until DO goes high (a 0xFF is received).
01046 bool SDBlockDevice::_wait_ready(uint16_t ms)
01047 {
01048     uint8_t response;
01049     _spi_timer.reset();
01050     _spi_timer.start();
01051     do {
01052         response = _spi.write(SPI_FILL_CHAR);
01053         if (response == 0xFF) {
01054             _spi_timer.stop();
01055             return true;
01056         }
01057     } while (_spi_timer.read_ms() < ms);
01058     _spi_timer.stop();
01059     return false;
01060 }
01061 
01062 // SPI function to wait for count
01063 void SDBlockDevice::_spi_wait(uint8_t count)
01064 {
01065     for (uint8_t i = 0; i < count; ++i) {
01066         _spi.write(SPI_FILL_CHAR);
01067     }
01068 }
01069 
01070 void SDBlockDevice::_spi_init()
01071 {
01072     _spi.lock();
01073     // Set to SCK for initialization, and clock card with cs = 1
01074     _spi.frequency(_init_sck);
01075     _spi.format(8, 0);
01076     _spi.set_default_write_value(SPI_FILL_CHAR);
01077     // Initial 74 cycles required for few cards, before selecting SPI mode
01078     _cs = 1;
01079     _spi_wait(10);
01080     _spi.unlock();
01081 }
01082 
01083 void SDBlockDevice::_select()
01084 {
01085     _spi.lock();
01086     _spi.write(SPI_FILL_CHAR);
01087     _cs = 0;
01088 }
01089 
01090 void SDBlockDevice::_deselect()
01091 {
01092     _cs = 1;
01093     _spi.write(SPI_FILL_CHAR);
01094     _spi.unlock();
01095 }
01096 
01097 #endif  /* DEVICE_SPI */