takashi kadono / Mbed OS Nucleo_446

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/cmsis/TARGET_CORTEX_A/irq_ctrl.h@3:f3764f852aa8, 2018-10-11 (annotated)

Committer:
kadonotakashi
Date:
Thu Oct 11 02:27:46 2018 +0000
Revision:
3:f3764f852aa8
Parent:
0:8fdf9a60065b 
Nucreo 446 + SSD1331 test version;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /**************************************************************************//**
kadonotakashi 0:8fdf9a60065b 2 * @file irq_ctrl.h
kadonotakashi 0:8fdf9a60065b 3 * @brief Interrupt Controller API header file
kadonotakashi 0:8fdf9a60065b 4 * @version V1.0.0
kadonotakashi 0:8fdf9a60065b 5 * @date 23. June 2017
kadonotakashi 0:8fdf9a60065b 6 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 7 /*
kadonotakashi 0:8fdf9a60065b 8 * Copyright (c) 2017 ARM Limited. All rights reserved.
kadonotakashi 0:8fdf9a60065b 9 *
kadonotakashi 0:8fdf9a60065b 10 * SPDX-License-Identifier: Apache-2.0
kadonotakashi 0:8fdf9a60065b 11 *
kadonotakashi 0:8fdf9a60065b 12 * Licensed under the Apache License, Version 2.0 (the License); you may
kadonotakashi 0:8fdf9a60065b 13 * not use this file except in compliance with the License.
kadonotakashi 0:8fdf9a60065b 14 * You may obtain a copy of the License at
kadonotakashi 0:8fdf9a60065b 15 *
kadonotakashi 0:8fdf9a60065b 16 * www.apache.org/licenses/LICENSE-2.0
kadonotakashi 0:8fdf9a60065b 17 *
kadonotakashi 0:8fdf9a60065b 18 * Unless required by applicable law or agreed to in writing, software
kadonotakashi 0:8fdf9a60065b 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
kadonotakashi 0:8fdf9a60065b 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kadonotakashi 0:8fdf9a60065b 21 * See the License for the specific language governing permissions and
kadonotakashi 0:8fdf9a60065b 22 * limitations under the License.
kadonotakashi 0:8fdf9a60065b 23 */
kadonotakashi 0:8fdf9a60065b 24
kadonotakashi 0:8fdf9a60065b 25 #if defined ( __ICCARM__ )
kadonotakashi 0:8fdf9a60065b 26 #pragma system_include /* treat file as system include file for MISRA check */
kadonotakashi 0:8fdf9a60065b 27 #elif defined (__clang__)
kadonotakashi 0:8fdf9a60065b 28 #pragma clang system_header /* treat file as system include file */
kadonotakashi 0:8fdf9a60065b 29 #endif
kadonotakashi 0:8fdf9a60065b 30
kadonotakashi 0:8fdf9a60065b 31 #ifndef IRQ_CTRL_H_
kadonotakashi 0:8fdf9a60065b 32 #define IRQ_CTRL_H_
kadonotakashi 0:8fdf9a60065b 33
kadonotakashi 0:8fdf9a60065b 34 #include <stdint.h>
kadonotakashi 0:8fdf9a60065b 35
kadonotakashi 0:8fdf9a60065b 36 #ifndef IRQHANDLER_T
kadonotakashi 0:8fdf9a60065b 37 #define IRQHANDLER_T
kadonotakashi 0:8fdf9a60065b 38 /// Interrupt handler data type
kadonotakashi 0:8fdf9a60065b 39 typedef void (*IRQHandler_t) (void);
kadonotakashi 0:8fdf9a60065b 40 #endif
kadonotakashi 0:8fdf9a60065b 41
kadonotakashi 0:8fdf9a60065b 42 #ifndef IRQN_ID_T
kadonotakashi 0:8fdf9a60065b 43 #define IRQN_ID_T
kadonotakashi 0:8fdf9a60065b 44 /// Interrupt ID number data type
kadonotakashi 0:8fdf9a60065b 45 typedef int32_t IRQn_ID_t;
kadonotakashi 0:8fdf9a60065b 46 #endif
kadonotakashi 0:8fdf9a60065b 47
kadonotakashi 0:8fdf9a60065b 48 /* Interrupt mode bit-masks */
kadonotakashi 0:8fdf9a60065b 49 #define IRQ_MODE_TRIG_Pos (0U)
kadonotakashi 0:8fdf9a60065b 50 #define IRQ_MODE_TRIG_Msk (0x07UL /*<< IRQ_MODE_TRIG_Pos*/)
kadonotakashi 0:8fdf9a60065b 51 #define IRQ_MODE_TRIG_LEVEL (0x00UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: level triggered interrupt
kadonotakashi 0:8fdf9a60065b 52 #define IRQ_MODE_TRIG_LEVEL_LOW (0x01UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: low level triggered interrupt
kadonotakashi 0:8fdf9a60065b 53 #define IRQ_MODE_TRIG_LEVEL_HIGH (0x02UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: high level triggered interrupt
kadonotakashi 0:8fdf9a60065b 54 #define IRQ_MODE_TRIG_EDGE (0x04UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: edge triggered interrupt
kadonotakashi 0:8fdf9a60065b 55 #define IRQ_MODE_TRIG_EDGE_RISING (0x05UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising edge triggered interrupt
kadonotakashi 0:8fdf9a60065b 56 #define IRQ_MODE_TRIG_EDGE_FALLING (0x06UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: falling edge triggered interrupt
kadonotakashi 0:8fdf9a60065b 57 #define IRQ_MODE_TRIG_EDGE_BOTH (0x07UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising and falling edge triggered interrupt
kadonotakashi 0:8fdf9a60065b 58
kadonotakashi 0:8fdf9a60065b 59 #define IRQ_MODE_TYPE_Pos (3U)
kadonotakashi 0:8fdf9a60065b 60 #define IRQ_MODE_TYPE_Msk (0x01UL << IRQ_MODE_TYPE_Pos)
kadonotakashi 0:8fdf9a60065b 61 #define IRQ_MODE_TYPE_IRQ (0x00UL << IRQ_MODE_TYPE_Pos) ///< Type: interrupt source triggers CPU IRQ line
kadonotakashi 0:8fdf9a60065b 62 #define IRQ_MODE_TYPE_FIQ (0x01UL << IRQ_MODE_TYPE_Pos) ///< Type: interrupt source triggers CPU FIQ line
kadonotakashi 0:8fdf9a60065b 63
kadonotakashi 0:8fdf9a60065b 64 #define IRQ_MODE_DOMAIN_Pos (4U)
kadonotakashi 0:8fdf9a60065b 65 #define IRQ_MODE_DOMAIN_Msk (0x01UL << IRQ_MODE_DOMAIN_Pos)
kadonotakashi 0:8fdf9a60065b 66 #define IRQ_MODE_DOMAIN_NONSECURE (0x00UL << IRQ_MODE_DOMAIN_Pos) ///< Domain: interrupt is targeting non-secure domain
kadonotakashi 0:8fdf9a60065b 67 #define IRQ_MODE_DOMAIN_SECURE (0x01UL << IRQ_MODE_DOMAIN_Pos) ///< Domain: interrupt is targeting secure domain
kadonotakashi 0:8fdf9a60065b 68
kadonotakashi 0:8fdf9a60065b 69 #define IRQ_MODE_CPU_Pos (5U)
kadonotakashi 0:8fdf9a60065b 70 #define IRQ_MODE_CPU_Msk (0xFFUL << IRQ_MODE_CPU_Pos)
kadonotakashi 0:8fdf9a60065b 71 #define IRQ_MODE_CPU_ALL (0x00UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets all CPUs
kadonotakashi 0:8fdf9a60065b 72 #define IRQ_MODE_CPU_0 (0x01UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 0
kadonotakashi 0:8fdf9a60065b 73 #define IRQ_MODE_CPU_1 (0x02UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 1
kadonotakashi 0:8fdf9a60065b 74 #define IRQ_MODE_CPU_2 (0x04UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 2
kadonotakashi 0:8fdf9a60065b 75 #define IRQ_MODE_CPU_3 (0x08UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 3
kadonotakashi 0:8fdf9a60065b 76 #define IRQ_MODE_CPU_4 (0x10UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 4
kadonotakashi 0:8fdf9a60065b 77 #define IRQ_MODE_CPU_5 (0x20UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 5
kadonotakashi 0:8fdf9a60065b 78 #define IRQ_MODE_CPU_6 (0x40UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 6
kadonotakashi 0:8fdf9a60065b 79 #define IRQ_MODE_CPU_7 (0x80UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 7
kadonotakashi 0:8fdf9a60065b 80
kadonotakashi 0:8fdf9a60065b 81 #define IRQ_MODE_ERROR (0x80000000UL) ///< Bit indicating mode value error
kadonotakashi 0:8fdf9a60065b 82
kadonotakashi 0:8fdf9a60065b 83 /* Interrupt priority bit-masks */
kadonotakashi 0:8fdf9a60065b 84 #define IRQ_PRIORITY_Msk (0x0000FFFFUL) ///< Interrupt priority value bit-mask
kadonotakashi 0:8fdf9a60065b 85 #define IRQ_PRIORITY_ERROR (0x80000000UL) ///< Bit indicating priority value error
kadonotakashi 0:8fdf9a60065b 86
kadonotakashi 0:8fdf9a60065b 87 /// Initialize interrupt controller.
kadonotakashi 0:8fdf9a60065b 88 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 89 int32_t IRQ_Initialize (void);
kadonotakashi 0:8fdf9a60065b 90
kadonotakashi 0:8fdf9a60065b 91 /// Register interrupt handler.
kadonotakashi 0:8fdf9a60065b 92 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 93 /// \param[in] handler interrupt handler function address
kadonotakashi 0:8fdf9a60065b 94 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 95 int32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler);
kadonotakashi 0:8fdf9a60065b 96
kadonotakashi 0:8fdf9a60065b 97 /// Get the registered interrupt handler.
kadonotakashi 0:8fdf9a60065b 98 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 99 /// \return registered interrupt handler function address.
kadonotakashi 0:8fdf9a60065b 100 IRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 101
kadonotakashi 0:8fdf9a60065b 102 /// Enable interrupt.
kadonotakashi 0:8fdf9a60065b 103 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 104 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 105 int32_t IRQ_Enable (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 106
kadonotakashi 0:8fdf9a60065b 107 /// Disable interrupt.
kadonotakashi 0:8fdf9a60065b 108 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 109 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 110 int32_t IRQ_Disable (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 111
kadonotakashi 0:8fdf9a60065b 112 /// Get interrupt enable state.
kadonotakashi 0:8fdf9a60065b 113 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 114 /// \return 0 - interrupt is disabled, 1 - interrupt is enabled.
kadonotakashi 0:8fdf9a60065b 115 uint32_t IRQ_GetEnableState (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 116
kadonotakashi 0:8fdf9a60065b 117 /// Configure interrupt request mode.
kadonotakashi 0:8fdf9a60065b 118 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 119 /// \param[in] mode mode configuration
kadonotakashi 0:8fdf9a60065b 120 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 121 int32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode);
kadonotakashi 0:8fdf9a60065b 122
kadonotakashi 0:8fdf9a60065b 123 /// Get interrupt mode configuration.
kadonotakashi 0:8fdf9a60065b 124 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 125 /// \return current interrupt mode configuration with optional IRQ_MODE_ERROR bit set.
kadonotakashi 0:8fdf9a60065b 126 uint32_t IRQ_GetMode (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 127
kadonotakashi 0:8fdf9a60065b 128 /// Get ID number of current interrupt request (IRQ).
kadonotakashi 0:8fdf9a60065b 129 /// \return interrupt ID number.
kadonotakashi 0:8fdf9a60065b 130 IRQn_ID_t IRQ_GetActiveIRQ (void);
kadonotakashi 0:8fdf9a60065b 131
kadonotakashi 0:8fdf9a60065b 132 /// Get ID number of current fast interrupt request (FIQ).
kadonotakashi 0:8fdf9a60065b 133 /// \return interrupt ID number.
kadonotakashi 0:8fdf9a60065b 134 IRQn_ID_t IRQ_GetActiveFIQ (void);
kadonotakashi 0:8fdf9a60065b 135
kadonotakashi 0:8fdf9a60065b 136 /// Signal end of interrupt processing.
kadonotakashi 0:8fdf9a60065b 137 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 138 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 139 int32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 140
kadonotakashi 0:8fdf9a60065b 141 /// Set interrupt pending flag.
kadonotakashi 0:8fdf9a60065b 142 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 143 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 144 int32_t IRQ_SetPending (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 145
kadonotakashi 0:8fdf9a60065b 146 /// Get interrupt pending flag.
kadonotakashi 0:8fdf9a60065b 147 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 148 /// \return 0 - interrupt is not pending, 1 - interrupt is pending.
kadonotakashi 0:8fdf9a60065b 149 uint32_t IRQ_GetPending (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 150
kadonotakashi 0:8fdf9a60065b 151 /// Clear interrupt pending flag.
kadonotakashi 0:8fdf9a60065b 152 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 153 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 154 int32_t IRQ_ClearPending (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 155
kadonotakashi 0:8fdf9a60065b 156 /// Set interrupt priority value.
kadonotakashi 0:8fdf9a60065b 157 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 158 /// \param[in] priority interrupt priority value
kadonotakashi 0:8fdf9a60065b 159 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 160 int32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority);
kadonotakashi 0:8fdf9a60065b 161
kadonotakashi 0:8fdf9a60065b 162 /// Get interrupt priority.
kadonotakashi 0:8fdf9a60065b 163 /// \param[in] irqn interrupt ID number
kadonotakashi 0:8fdf9a60065b 164 /// \return current interrupt priority value with optional IRQ_PRIORITY_ERROR bit set.
kadonotakashi 0:8fdf9a60065b 165 uint32_t IRQ_GetPriority (IRQn_ID_t irqn);
kadonotakashi 0:8fdf9a60065b 166
kadonotakashi 0:8fdf9a60065b 167 /// Set priority masking threshold.
kadonotakashi 0:8fdf9a60065b 168 /// \param[in] priority priority masking threshold value
kadonotakashi 0:8fdf9a60065b 169 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 170 int32_t IRQ_SetPriorityMask (uint32_t priority);
kadonotakashi 0:8fdf9a60065b 171
kadonotakashi 0:8fdf9a60065b 172 /// Get priority masking threshold
kadonotakashi 0:8fdf9a60065b 173 /// \return current priority masking threshold value with optional IRQ_PRIORITY_ERROR bit set.
kadonotakashi 0:8fdf9a60065b 174 uint32_t IRQ_GetPriorityMask (void);
kadonotakashi 0:8fdf9a60065b 175
kadonotakashi 0:8fdf9a60065b 176 /// Set priority grouping field split point
kadonotakashi 0:8fdf9a60065b 177 /// \param[in] bits number of MSB bits included in the group priority field comparison
kadonotakashi 0:8fdf9a60065b 178 /// \return 0 on success, -1 on error.
kadonotakashi 0:8fdf9a60065b 179 int32_t IRQ_SetPriorityGroupBits (uint32_t bits);
kadonotakashi 0:8fdf9a60065b 180
kadonotakashi 0:8fdf9a60065b 181 /// Get priority grouping field split point
kadonotakashi 0:8fdf9a60065b 182 /// \return current number of MSB bits included in the group priority field comparison with
kadonotakashi 0:8fdf9a60065b 183 /// optional IRQ_PRIORITY_ERROR bit set.
kadonotakashi 0:8fdf9a60065b 184 uint32_t IRQ_GetPriorityGroupBits (void);
kadonotakashi 0:8fdf9a60065b 185
kadonotakashi 0:8fdf9a60065b 186 #endif // IRQ_CTRL_H_