takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_STM/serial_api.c@3:f3764f852aa8, 2018-10-11 (annotated)

Committer:
kadonotakashi
Date:
Thu Oct 11 02:27:46 2018 +0000
Revision:
3:f3764f852aa8
Parent:
0:8fdf9a60065b 
Nucreo 446 + SSD1331 test version;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /* mbed Microcontroller Library
kadonotakashi 0:8fdf9a60065b 2 *******************************************************************************
kadonotakashi 0:8fdf9a60065b 3 * Copyright (c) 2017, STMicroelectronics
kadonotakashi 0:8fdf9a60065b 4 * All rights reserved.
kadonotakashi 0:8fdf9a60065b 5 *
kadonotakashi 0:8fdf9a60065b 6 * Redistribution and use in source and binary forms, with or without
kadonotakashi 0:8fdf9a60065b 7 * modification, are permitted provided that the following conditions are met:
kadonotakashi 0:8fdf9a60065b 8 *
kadonotakashi 0:8fdf9a60065b 9 * 1. Redistributions of source code must retain the above copyright notice,
kadonotakashi 0:8fdf9a60065b 10 * this list of conditions and the following disclaimer.
kadonotakashi 0:8fdf9a60065b 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
kadonotakashi 0:8fdf9a60065b 12 * this list of conditions and the following disclaimer in the documentation
kadonotakashi 0:8fdf9a60065b 13 * and/or other materials provided with the distribution.
kadonotakashi 0:8fdf9a60065b 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
kadonotakashi 0:8fdf9a60065b 15 * may be used to endorse or promote products derived from this software
kadonotakashi 0:8fdf9a60065b 16 * without specific prior written permission.
kadonotakashi 0:8fdf9a60065b 17 *
kadonotakashi 0:8fdf9a60065b 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
kadonotakashi 0:8fdf9a60065b 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
kadonotakashi 0:8fdf9a60065b 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
kadonotakashi 0:8fdf9a60065b 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
kadonotakashi 0:8fdf9a60065b 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
kadonotakashi 0:8fdf9a60065b 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
kadonotakashi 0:8fdf9a60065b 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
kadonotakashi 0:8fdf9a60065b 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
kadonotakashi 0:8fdf9a60065b 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
kadonotakashi 0:8fdf9a60065b 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
kadonotakashi 0:8fdf9a60065b 28 *******************************************************************************
kadonotakashi 0:8fdf9a60065b 29 */
kadonotakashi 0:8fdf9a60065b 30
kadonotakashi 0:8fdf9a60065b 31 #if DEVICE_SERIAL
kadonotakashi 0:8fdf9a60065b 32
kadonotakashi 0:8fdf9a60065b 33 #include "serial_api_hal.h"
kadonotakashi 0:8fdf9a60065b 34
kadonotakashi 0:8fdf9a60065b 35 // Possible choices of the LPUART_CLOCK_SOURCE configuration set in json file
kadonotakashi 0:8fdf9a60065b 36 #define USE_LPUART_CLK_LSE 0x01
kadonotakashi 0:8fdf9a60065b 37 #define USE_LPUART_CLK_PCLK1 0x02
kadonotakashi 0:8fdf9a60065b 38 #define USE_LPUART_CLK_HSI 0x04
kadonotakashi 0:8fdf9a60065b 39
kadonotakashi 0:8fdf9a60065b 40 int stdio_uart_inited = 0; // used in platform/mbed_board.c and platform/mbed_retarget.cpp
kadonotakashi 0:8fdf9a60065b 41 serial_t stdio_uart;
kadonotakashi 0:8fdf9a60065b 42
kadonotakashi 0:8fdf9a60065b 43 extern UART_HandleTypeDef uart_handlers[];
kadonotakashi 0:8fdf9a60065b 44 extern uint32_t serial_irq_ids[];
kadonotakashi 0:8fdf9a60065b 45
kadonotakashi 0:8fdf9a60065b 46 // Utility functions
kadonotakashi 0:8fdf9a60065b 47 HAL_StatusTypeDef init_uart(serial_t *obj);
kadonotakashi 0:8fdf9a60065b 48 int8_t get_uart_index(UARTName uart_name);
kadonotakashi 0:8fdf9a60065b 49
kadonotakashi 0:8fdf9a60065b 50 void serial_init(serial_t *obj, PinName tx, PinName rx)
kadonotakashi 0:8fdf9a60065b 51 {
kadonotakashi 0:8fdf9a60065b 52 struct serial_s *obj_s = SERIAL_S(obj);
kadonotakashi 0:8fdf9a60065b 53 uint8_t stdio_config = 0;
kadonotakashi 0:8fdf9a60065b 54
kadonotakashi 0:8fdf9a60065b 55 // Determine the UART to use (UART_1, UART_2, ...)
kadonotakashi 0:8fdf9a60065b 56 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
kadonotakashi 0:8fdf9a60065b 57 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
kadonotakashi 0:8fdf9a60065b 58
kadonotakashi 0:8fdf9a60065b 59 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
kadonotakashi 0:8fdf9a60065b 60 obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
kadonotakashi 0:8fdf9a60065b 61 MBED_ASSERT(obj_s->uart != (UARTName)NC);
kadonotakashi 0:8fdf9a60065b 62
kadonotakashi 0:8fdf9a60065b 63 if ((tx == STDIO_UART_TX) || (rx == STDIO_UART_RX)) {
kadonotakashi 0:8fdf9a60065b 64 stdio_config = 1;
kadonotakashi 0:8fdf9a60065b 65 } else {
kadonotakashi 0:8fdf9a60065b 66 if (uart_tx == pinmap_peripheral(STDIO_UART_TX, PinMap_UART_TX)) {
kadonotakashi 0:8fdf9a60065b 67 error("Error: new serial object is using same UART as STDIO");
kadonotakashi 0:8fdf9a60065b 68 }
kadonotakashi 0:8fdf9a60065b 69 }
kadonotakashi 0:8fdf9a60065b 70
kadonotakashi 0:8fdf9a60065b 71 // Reset and enable clock
kadonotakashi 0:8fdf9a60065b 72 #if defined(USART1_BASE)
kadonotakashi 0:8fdf9a60065b 73 if (obj_s->uart == UART_1) {
kadonotakashi 0:8fdf9a60065b 74 __HAL_RCC_USART1_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 75 }
kadonotakashi 0:8fdf9a60065b 76 #endif
kadonotakashi 0:8fdf9a60065b 77
kadonotakashi 0:8fdf9a60065b 78 #if defined (USART2_BASE)
kadonotakashi 0:8fdf9a60065b 79 if (obj_s->uart == UART_2) {
kadonotakashi 0:8fdf9a60065b 80 __HAL_RCC_USART2_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 81 }
kadonotakashi 0:8fdf9a60065b 82 #endif
kadonotakashi 0:8fdf9a60065b 83
kadonotakashi 0:8fdf9a60065b 84 #if defined(USART3_BASE)
kadonotakashi 0:8fdf9a60065b 85 if (obj_s->uart == UART_3) {
kadonotakashi 0:8fdf9a60065b 86 __HAL_RCC_USART3_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 87 }
kadonotakashi 0:8fdf9a60065b 88 #endif
kadonotakashi 0:8fdf9a60065b 89
kadonotakashi 0:8fdf9a60065b 90 #if defined(UART4_BASE)
kadonotakashi 0:8fdf9a60065b 91 if (obj_s->uart == UART_4) {
kadonotakashi 0:8fdf9a60065b 92 __HAL_RCC_UART4_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 93 }
kadonotakashi 0:8fdf9a60065b 94 #endif
kadonotakashi 0:8fdf9a60065b 95
kadonotakashi 0:8fdf9a60065b 96 #if defined(USART4_BASE)
kadonotakashi 0:8fdf9a60065b 97 if (obj_s->uart == UART_4) {
kadonotakashi 0:8fdf9a60065b 98 __HAL_RCC_USART4_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 99 }
kadonotakashi 0:8fdf9a60065b 100 #endif
kadonotakashi 0:8fdf9a60065b 101
kadonotakashi 0:8fdf9a60065b 102 #if defined(UART5_BASE)
kadonotakashi 0:8fdf9a60065b 103 if (obj_s->uart == UART_5) {
kadonotakashi 0:8fdf9a60065b 104 __HAL_RCC_UART5_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 105 }
kadonotakashi 0:8fdf9a60065b 106 #endif
kadonotakashi 0:8fdf9a60065b 107
kadonotakashi 0:8fdf9a60065b 108 #if defined(USART5_BASE)
kadonotakashi 0:8fdf9a60065b 109 if (obj_s->uart == UART_5) {
kadonotakashi 0:8fdf9a60065b 110 __HAL_RCC_USART5_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 111 }
kadonotakashi 0:8fdf9a60065b 112 #endif
kadonotakashi 0:8fdf9a60065b 113
kadonotakashi 0:8fdf9a60065b 114 #if defined(USART6_BASE)
kadonotakashi 0:8fdf9a60065b 115 if (obj_s->uart == UART_6) {
kadonotakashi 0:8fdf9a60065b 116 __HAL_RCC_USART6_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 117 }
kadonotakashi 0:8fdf9a60065b 118 #endif
kadonotakashi 0:8fdf9a60065b 119
kadonotakashi 0:8fdf9a60065b 120 #if defined(UART7_BASE)
kadonotakashi 0:8fdf9a60065b 121 if (obj_s->uart == UART_7) {
kadonotakashi 0:8fdf9a60065b 122 __HAL_RCC_UART7_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 123 }
kadonotakashi 0:8fdf9a60065b 124 #endif
kadonotakashi 0:8fdf9a60065b 125
kadonotakashi 0:8fdf9a60065b 126 #if defined(USART7_BASE)
kadonotakashi 0:8fdf9a60065b 127 if (obj_s->uart == UART_7) {
kadonotakashi 0:8fdf9a60065b 128 __HAL_RCC_USART7_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 129 }
kadonotakashi 0:8fdf9a60065b 130 #endif
kadonotakashi 0:8fdf9a60065b 131
kadonotakashi 0:8fdf9a60065b 132 #if defined(UART8_BASE)
kadonotakashi 0:8fdf9a60065b 133 if (obj_s->uart == UART_8) {
kadonotakashi 0:8fdf9a60065b 134 __HAL_RCC_UART8_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 135 }
kadonotakashi 0:8fdf9a60065b 136 #endif
kadonotakashi 0:8fdf9a60065b 137
kadonotakashi 0:8fdf9a60065b 138 #if defined(USART8_BASE)
kadonotakashi 0:8fdf9a60065b 139 if (obj_s->uart == UART_8) {
kadonotakashi 0:8fdf9a60065b 140 __HAL_RCC_USART8_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 141 }
kadonotakashi 0:8fdf9a60065b 142 #endif
kadonotakashi 0:8fdf9a60065b 143
kadonotakashi 0:8fdf9a60065b 144 #if defined(UART9_BASE)
kadonotakashi 0:8fdf9a60065b 145 if (obj_s->uart == UART_9) {
kadonotakashi 0:8fdf9a60065b 146 __HAL_RCC_UART9_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 147 }
kadonotakashi 0:8fdf9a60065b 148 #endif
kadonotakashi 0:8fdf9a60065b 149
kadonotakashi 0:8fdf9a60065b 150 #if defined(UART10_BASE)
kadonotakashi 0:8fdf9a60065b 151 if (obj_s->uart == UART_10) {
kadonotakashi 0:8fdf9a60065b 152 __HAL_RCC_UART10_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 153 }
kadonotakashi 0:8fdf9a60065b 154 #endif
kadonotakashi 0:8fdf9a60065b 155
kadonotakashi 0:8fdf9a60065b 156 #if defined(LPUART1_BASE)
kadonotakashi 0:8fdf9a60065b 157 if (obj_s->uart == LPUART_1) {
kadonotakashi 0:8fdf9a60065b 158 __HAL_RCC_LPUART1_CLK_ENABLE();
kadonotakashi 0:8fdf9a60065b 159 }
kadonotakashi 0:8fdf9a60065b 160 #endif
kadonotakashi 0:8fdf9a60065b 161
kadonotakashi 0:8fdf9a60065b 162 // Assign serial object index
kadonotakashi 0:8fdf9a60065b 163 obj_s->index = get_uart_index(obj_s->uart);
kadonotakashi 0:8fdf9a60065b 164 MBED_ASSERT(obj_s->index >= 0);
kadonotakashi 0:8fdf9a60065b 165
kadonotakashi 0:8fdf9a60065b 166 // Configure UART pins
kadonotakashi 0:8fdf9a60065b 167 pinmap_pinout(tx, PinMap_UART_TX);
kadonotakashi 0:8fdf9a60065b 168 pinmap_pinout(rx, PinMap_UART_RX);
kadonotakashi 0:8fdf9a60065b 169
kadonotakashi 0:8fdf9a60065b 170 if (tx != NC) {
kadonotakashi 0:8fdf9a60065b 171 pin_mode(tx, PullUp);
kadonotakashi 0:8fdf9a60065b 172 }
kadonotakashi 0:8fdf9a60065b 173 if (rx != NC) {
kadonotakashi 0:8fdf9a60065b 174 pin_mode(rx, PullUp);
kadonotakashi 0:8fdf9a60065b 175 }
kadonotakashi 0:8fdf9a60065b 176
kadonotakashi 0:8fdf9a60065b 177 // Configure UART
kadonotakashi 0:8fdf9a60065b 178 obj_s->baudrate = 9600; // baudrate default value
kadonotakashi 0:8fdf9a60065b 179 if (stdio_config) {
kadonotakashi 0:8fdf9a60065b 180 #if MBED_CONF_PLATFORM_STDIO_BAUD_RATE
kadonotakashi 0:8fdf9a60065b 181 obj_s->baudrate = MBED_CONF_PLATFORM_STDIO_BAUD_RATE; // baudrate takes value from platform/mbed_lib.json
kadonotakashi 0:8fdf9a60065b 182 #endif /* MBED_CONF_PLATFORM_STDIO_BAUD_RATE */
kadonotakashi 0:8fdf9a60065b 183 } else {
kadonotakashi 0:8fdf9a60065b 184 #if MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE
kadonotakashi 0:8fdf9a60065b 185 obj_s->baudrate = MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE; // baudrate takes value from platform/mbed_lib.json
kadonotakashi 0:8fdf9a60065b 186 #endif /* MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE */
kadonotakashi 0:8fdf9a60065b 187 }
kadonotakashi 0:8fdf9a60065b 188 obj_s->databits = UART_WORDLENGTH_8B;
kadonotakashi 0:8fdf9a60065b 189 obj_s->stopbits = UART_STOPBITS_1;
kadonotakashi 0:8fdf9a60065b 190 obj_s->parity = UART_PARITY_NONE;
kadonotakashi 0:8fdf9a60065b 191
kadonotakashi 0:8fdf9a60065b 192 #if DEVICE_SERIAL_FC
kadonotakashi 0:8fdf9a60065b 193 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
kadonotakashi 0:8fdf9a60065b 194 #endif
kadonotakashi 0:8fdf9a60065b 195
kadonotakashi 0:8fdf9a60065b 196 obj_s->pin_tx = tx;
kadonotakashi 0:8fdf9a60065b 197 obj_s->pin_rx = rx;
kadonotakashi 0:8fdf9a60065b 198
kadonotakashi 0:8fdf9a60065b 199 init_uart(obj); /* init_uart will be called again in serial_baud function, so don't worry if init_uart returns HAL_ERROR */
kadonotakashi 0:8fdf9a60065b 200
kadonotakashi 0:8fdf9a60065b 201 // For stdio management in platform/mbed_board.c and platform/mbed_retarget.cpp
kadonotakashi 0:8fdf9a60065b 202 if (stdio_config) {
kadonotakashi 0:8fdf9a60065b 203 stdio_uart_inited = 1;
kadonotakashi 0:8fdf9a60065b 204 memcpy(&stdio_uart, obj, sizeof(serial_t));
kadonotakashi 0:8fdf9a60065b 205 }
kadonotakashi 0:8fdf9a60065b 206 }
kadonotakashi 0:8fdf9a60065b 207
kadonotakashi 0:8fdf9a60065b 208 void serial_free(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 209 {
kadonotakashi 0:8fdf9a60065b 210 struct serial_s *obj_s = SERIAL_S(obj);
kadonotakashi 0:8fdf9a60065b 211
kadonotakashi 0:8fdf9a60065b 212 // Reset UART and disable clock
kadonotakashi 0:8fdf9a60065b 213 #if defined(USART1_BASE)
kadonotakashi 0:8fdf9a60065b 214 if (obj_s->uart == UART_1) {
kadonotakashi 0:8fdf9a60065b 215 __HAL_RCC_USART1_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 216 __HAL_RCC_USART1_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 217 __HAL_RCC_USART1_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 218 }
kadonotakashi 0:8fdf9a60065b 219 #endif
kadonotakashi 0:8fdf9a60065b 220
kadonotakashi 0:8fdf9a60065b 221 #if defined(USART2_BASE)
kadonotakashi 0:8fdf9a60065b 222 if (obj_s->uart == UART_2) {
kadonotakashi 0:8fdf9a60065b 223 __HAL_RCC_USART2_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 224 __HAL_RCC_USART2_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 225 __HAL_RCC_USART2_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 226 }
kadonotakashi 0:8fdf9a60065b 227 #endif
kadonotakashi 0:8fdf9a60065b 228
kadonotakashi 0:8fdf9a60065b 229 #if defined(USART3_BASE)
kadonotakashi 0:8fdf9a60065b 230 if (obj_s->uart == UART_3) {
kadonotakashi 0:8fdf9a60065b 231 __HAL_RCC_USART3_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 232 __HAL_RCC_USART3_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 233 __HAL_RCC_USART3_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 234 }
kadonotakashi 0:8fdf9a60065b 235 #endif
kadonotakashi 0:8fdf9a60065b 236
kadonotakashi 0:8fdf9a60065b 237 #if defined(UART4_BASE)
kadonotakashi 0:8fdf9a60065b 238 if (obj_s->uart == UART_4) {
kadonotakashi 0:8fdf9a60065b 239 __HAL_RCC_UART4_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 240 __HAL_RCC_UART4_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 241 __HAL_RCC_UART4_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 242 }
kadonotakashi 0:8fdf9a60065b 243 #endif
kadonotakashi 0:8fdf9a60065b 244
kadonotakashi 0:8fdf9a60065b 245 #if defined(USART4_BASE)
kadonotakashi 0:8fdf9a60065b 246 if (obj_s->uart == UART_4) {
kadonotakashi 0:8fdf9a60065b 247 __HAL_RCC_USART4_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 248 __HAL_RCC_USART4_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 249 __HAL_RCC_USART4_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 250 }
kadonotakashi 0:8fdf9a60065b 251 #endif
kadonotakashi 0:8fdf9a60065b 252
kadonotakashi 0:8fdf9a60065b 253 #if defined(UART5_BASE)
kadonotakashi 0:8fdf9a60065b 254 if (obj_s->uart == UART_5) {
kadonotakashi 0:8fdf9a60065b 255 __HAL_RCC_UART5_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 256 __HAL_RCC_UART5_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 257 __HAL_RCC_UART5_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 258 }
kadonotakashi 0:8fdf9a60065b 259 #endif
kadonotakashi 0:8fdf9a60065b 260
kadonotakashi 0:8fdf9a60065b 261 #if defined(USART5_BASE)
kadonotakashi 0:8fdf9a60065b 262 if (obj_s->uart == UART_5) {
kadonotakashi 0:8fdf9a60065b 263 __HAL_RCC_USART5_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 264 __HAL_RCC_USART5_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 265 __HAL_RCC_USART5_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 266 }
kadonotakashi 0:8fdf9a60065b 267 #endif
kadonotakashi 0:8fdf9a60065b 268
kadonotakashi 0:8fdf9a60065b 269 #if defined(USART6_BASE)
kadonotakashi 0:8fdf9a60065b 270 if (obj_s->uart == UART_6) {
kadonotakashi 0:8fdf9a60065b 271 __HAL_RCC_USART6_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 272 __HAL_RCC_USART6_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 273 __HAL_RCC_USART6_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 274 }
kadonotakashi 0:8fdf9a60065b 275 #endif
kadonotakashi 0:8fdf9a60065b 276
kadonotakashi 0:8fdf9a60065b 277 #if defined(UART7_BASE)
kadonotakashi 0:8fdf9a60065b 278 if (obj_s->uart == UART_7) {
kadonotakashi 0:8fdf9a60065b 279 __HAL_RCC_UART7_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 280 __HAL_RCC_UART7_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 281 __HAL_RCC_UART7_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 282 }
kadonotakashi 0:8fdf9a60065b 283 #endif
kadonotakashi 0:8fdf9a60065b 284
kadonotakashi 0:8fdf9a60065b 285 #if defined(USART7_BASE)
kadonotakashi 0:8fdf9a60065b 286 if (obj_s->uart == UART_7) {
kadonotakashi 0:8fdf9a60065b 287 __HAL_RCC_USART7_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 288 __HAL_RCC_USART7_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 289 __HAL_RCC_USART7_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 290 }
kadonotakashi 0:8fdf9a60065b 291 #endif
kadonotakashi 0:8fdf9a60065b 292
kadonotakashi 0:8fdf9a60065b 293 #if defined(UART8_BASE)
kadonotakashi 0:8fdf9a60065b 294 if (obj_s->uart == UART_8) {
kadonotakashi 0:8fdf9a60065b 295 __HAL_RCC_UART8_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 296 __HAL_RCC_UART8_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 297 __HAL_RCC_UART8_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 298 }
kadonotakashi 0:8fdf9a60065b 299 #endif
kadonotakashi 0:8fdf9a60065b 300
kadonotakashi 0:8fdf9a60065b 301 #if defined(USART8_BASE)
kadonotakashi 0:8fdf9a60065b 302 if (obj_s->uart == UART_8) {
kadonotakashi 0:8fdf9a60065b 303 __HAL_RCC_USART8_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 304 __HAL_RCC_USART8_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 305 __HAL_RCC_USART8_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 306 }
kadonotakashi 0:8fdf9a60065b 307 #endif
kadonotakashi 0:8fdf9a60065b 308
kadonotakashi 0:8fdf9a60065b 309 #if defined(UART9_BASE)
kadonotakashi 0:8fdf9a60065b 310 if (obj_s->uart == UART_9) {
kadonotakashi 0:8fdf9a60065b 311 __HAL_RCC_UART9_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 312 __HAL_RCC_UART9_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 313 __HAL_RCC_UART9_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 314 }
kadonotakashi 0:8fdf9a60065b 315 #endif
kadonotakashi 0:8fdf9a60065b 316
kadonotakashi 0:8fdf9a60065b 317 #if defined(UART10_BASE)
kadonotakashi 0:8fdf9a60065b 318 if (obj_s->uart == UART_10) {
kadonotakashi 0:8fdf9a60065b 319 __HAL_RCC_UART10_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 320 __HAL_RCC_UART10_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 321 __HAL_RCC_UART10_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 322 }
kadonotakashi 0:8fdf9a60065b 323 #endif
kadonotakashi 0:8fdf9a60065b 324
kadonotakashi 0:8fdf9a60065b 325 #if defined(LPUART1_BASE)
kadonotakashi 0:8fdf9a60065b 326 if (obj_s->uart == LPUART_1) {
kadonotakashi 0:8fdf9a60065b 327 __HAL_RCC_LPUART1_FORCE_RESET();
kadonotakashi 0:8fdf9a60065b 328 __HAL_RCC_LPUART1_RELEASE_RESET();
kadonotakashi 0:8fdf9a60065b 329 __HAL_RCC_LPUART1_CLK_DISABLE();
kadonotakashi 0:8fdf9a60065b 330 }
kadonotakashi 0:8fdf9a60065b 331 #endif
kadonotakashi 0:8fdf9a60065b 332
kadonotakashi 0:8fdf9a60065b 333 // Configure GPIOs
kadonotakashi 0:8fdf9a60065b 334 pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
kadonotakashi 0:8fdf9a60065b 335 pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
kadonotakashi 0:8fdf9a60065b 336
kadonotakashi 0:8fdf9a60065b 337 serial_irq_ids[obj_s->index] = 0;
kadonotakashi 0:8fdf9a60065b 338 }
kadonotakashi 0:8fdf9a60065b 339
kadonotakashi 0:8fdf9a60065b 340 void serial_baud(serial_t *obj, int baudrate)
kadonotakashi 0:8fdf9a60065b 341 {
kadonotakashi 0:8fdf9a60065b 342 struct serial_s *obj_s = SERIAL_S(obj);
kadonotakashi 0:8fdf9a60065b 343
kadonotakashi 0:8fdf9a60065b 344 obj_s->baudrate = baudrate;
kadonotakashi 0:8fdf9a60065b 345
kadonotakashi 0:8fdf9a60065b 346 #if defined(LPUART1_BASE)
kadonotakashi 0:8fdf9a60065b 347 /* Note that LPUART clock source must be in the range [3 x baud rate, 4096 x baud rate], check Ref Manual */
kadonotakashi 0:8fdf9a60065b 348 if (obj_s->uart == LPUART_1) {
kadonotakashi 0:8fdf9a60065b 349 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
kadonotakashi 0:8fdf9a60065b 350 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
kadonotakashi 0:8fdf9a60065b 351 #if ((MBED_CONF_TARGET_LPUART_CLOCK_SOURCE) & USE_LPUART_CLK_LSE)
kadonotakashi 0:8fdf9a60065b 352 if (baudrate <= 9600) {
kadonotakashi 0:8fdf9a60065b 353 // Enable LSE in case it is not already done
kadonotakashi 0:8fdf9a60065b 354 if (!__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY)) {
kadonotakashi 0:8fdf9a60065b 355 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
kadonotakashi 0:8fdf9a60065b 356 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
kadonotakashi 0:8fdf9a60065b 357 RCC_OscInitStruct.LSEState = RCC_LSE_ON;
kadonotakashi 0:8fdf9a60065b 358 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_OFF;
kadonotakashi 0:8fdf9a60065b 359 HAL_RCC_OscConfig(&RCC_OscInitStruct);
kadonotakashi 0:8fdf9a60065b 360 }
kadonotakashi 0:8fdf9a60065b 361 // Keep it to verify if HAL_RCC_OscConfig didn't exit with a timeout
kadonotakashi 0:8fdf9a60065b 362 if (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY)) {
kadonotakashi 0:8fdf9a60065b 363 PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_LSE;
kadonotakashi 0:8fdf9a60065b 364 HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
kadonotakashi 0:8fdf9a60065b 365 if (init_uart(obj) == HAL_OK) {
kadonotakashi 0:8fdf9a60065b 366 return;
kadonotakashi 0:8fdf9a60065b 367 }
kadonotakashi 0:8fdf9a60065b 368 }
kadonotakashi 0:8fdf9a60065b 369 }
kadonotakashi 0:8fdf9a60065b 370 #endif
kadonotakashi 0:8fdf9a60065b 371 #if ((MBED_CONF_TARGET_LPUART_CLOCK_SOURCE) & USE_LPUART_CLK_PCLK1)
kadonotakashi 0:8fdf9a60065b 372 PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
kadonotakashi 0:8fdf9a60065b 373 HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
kadonotakashi 0:8fdf9a60065b 374 if (init_uart(obj) == HAL_OK) {
kadonotakashi 0:8fdf9a60065b 375 return;
kadonotakashi 0:8fdf9a60065b 376 }
kadonotakashi 0:8fdf9a60065b 377 #endif
kadonotakashi 0:8fdf9a60065b 378 #if ((MBED_CONF_TARGET_LPUART_CLOCK_SOURCE) & USE_LPUART_CLK_HSI)
kadonotakashi 0:8fdf9a60065b 379 // Enable HSI in case it is not already done
kadonotakashi 0:8fdf9a60065b 380 if (!__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY)) {
kadonotakashi 0:8fdf9a60065b 381 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
kadonotakashi 0:8fdf9a60065b 382 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
kadonotakashi 0:8fdf9a60065b 383 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
kadonotakashi 0:8fdf9a60065b 384 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_OFF;
kadonotakashi 0:8fdf9a60065b 385 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
kadonotakashi 0:8fdf9a60065b 386 HAL_RCC_OscConfig(&RCC_OscInitStruct);
kadonotakashi 0:8fdf9a60065b 387 }
kadonotakashi 0:8fdf9a60065b 388 // Keep it to verify if HAL_RCC_OscConfig didn't exit with a timeout
kadonotakashi 0:8fdf9a60065b 389 if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY)) {
kadonotakashi 0:8fdf9a60065b 390 PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
kadonotakashi 0:8fdf9a60065b 391 HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
kadonotakashi 0:8fdf9a60065b 392 if (init_uart(obj) == HAL_OK) {
kadonotakashi 0:8fdf9a60065b 393 return;
kadonotakashi 0:8fdf9a60065b 394 }
kadonotakashi 0:8fdf9a60065b 395 }
kadonotakashi 0:8fdf9a60065b 396 #endif
kadonotakashi 0:8fdf9a60065b 397 // Last chance using SYSCLK
kadonotakashi 0:8fdf9a60065b 398 PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_SYSCLK;
kadonotakashi 0:8fdf9a60065b 399 HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
kadonotakashi 0:8fdf9a60065b 400 }
kadonotakashi 0:8fdf9a60065b 401 #endif /* LPUART1_BASE */
kadonotakashi 0:8fdf9a60065b 402
kadonotakashi 0:8fdf9a60065b 403 if (init_uart(obj) != HAL_OK) {
kadonotakashi 0:8fdf9a60065b 404 debug("Cannot initialize UART with baud rate %u\n", baudrate);
kadonotakashi 0:8fdf9a60065b 405 }
kadonotakashi 0:8fdf9a60065b 406 }
kadonotakashi 0:8fdf9a60065b 407
kadonotakashi 0:8fdf9a60065b 408 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
kadonotakashi 0:8fdf9a60065b 409 {
kadonotakashi 0:8fdf9a60065b 410 struct serial_s *obj_s = SERIAL_S(obj);
kadonotakashi 0:8fdf9a60065b 411
kadonotakashi 0:8fdf9a60065b 412 switch (parity) {
kadonotakashi 0:8fdf9a60065b 413 case ParityOdd:
kadonotakashi 0:8fdf9a60065b 414 obj_s->parity = UART_PARITY_ODD;
kadonotakashi 0:8fdf9a60065b 415 break;
kadonotakashi 0:8fdf9a60065b 416 case ParityEven:
kadonotakashi 0:8fdf9a60065b 417 obj_s->parity = UART_PARITY_EVEN;
kadonotakashi 0:8fdf9a60065b 418 break;
kadonotakashi 0:8fdf9a60065b 419 default: // ParityNone
kadonotakashi 0:8fdf9a60065b 420 case ParityForced0: // unsupported!
kadonotakashi 0:8fdf9a60065b 421 case ParityForced1: // unsupported!
kadonotakashi 0:8fdf9a60065b 422 obj_s->parity = UART_PARITY_NONE;
kadonotakashi 0:8fdf9a60065b 423 break;
kadonotakashi 0:8fdf9a60065b 424 }
kadonotakashi 0:8fdf9a60065b 425
kadonotakashi 0:8fdf9a60065b 426 switch (data_bits) {
kadonotakashi 0:8fdf9a60065b 427 case 7:
kadonotakashi 0:8fdf9a60065b 428 if (parity != UART_PARITY_NONE) {
kadonotakashi 0:8fdf9a60065b 429 obj_s->databits = UART_WORDLENGTH_8B;
kadonotakashi 0:8fdf9a60065b 430 } else {
kadonotakashi 0:8fdf9a60065b 431 #if defined UART_WORDLENGTH_7B
kadonotakashi 0:8fdf9a60065b 432 obj_s->databits = UART_WORDLENGTH_7B;
kadonotakashi 0:8fdf9a60065b 433 #else
kadonotakashi 0:8fdf9a60065b 434 error("7-bit data format without parity is not supported");
kadonotakashi 0:8fdf9a60065b 435 #endif
kadonotakashi 0:8fdf9a60065b 436 }
kadonotakashi 0:8fdf9a60065b 437 break;
kadonotakashi 0:8fdf9a60065b 438 case 8:
kadonotakashi 0:8fdf9a60065b 439 if (parity != UART_PARITY_NONE) {
kadonotakashi 0:8fdf9a60065b 440 obj_s->databits = UART_WORDLENGTH_9B;
kadonotakashi 0:8fdf9a60065b 441 } else {
kadonotakashi 0:8fdf9a60065b 442 obj_s->databits = UART_WORDLENGTH_8B;
kadonotakashi 0:8fdf9a60065b 443 }
kadonotakashi 0:8fdf9a60065b 444 break;
kadonotakashi 0:8fdf9a60065b 445 case 9:
kadonotakashi 0:8fdf9a60065b 446 if (parity != UART_PARITY_NONE) {
kadonotakashi 0:8fdf9a60065b 447 error("Parity is not supported with 9-bit data format");
kadonotakashi 0:8fdf9a60065b 448 } else {
kadonotakashi 0:8fdf9a60065b 449 obj_s->databits = UART_WORDLENGTH_9B;
kadonotakashi 0:8fdf9a60065b 450 }
kadonotakashi 0:8fdf9a60065b 451 break;
kadonotakashi 0:8fdf9a60065b 452 default:
kadonotakashi 0:8fdf9a60065b 453 error("Only 7, 8 or 9-bit data formats are supported");
kadonotakashi 0:8fdf9a60065b 454 break;
kadonotakashi 0:8fdf9a60065b 455 }
kadonotakashi 0:8fdf9a60065b 456
kadonotakashi 0:8fdf9a60065b 457 if (stop_bits == 2) {
kadonotakashi 0:8fdf9a60065b 458 obj_s->stopbits = UART_STOPBITS_2;
kadonotakashi 0:8fdf9a60065b 459 } else {
kadonotakashi 0:8fdf9a60065b 460 obj_s->stopbits = UART_STOPBITS_1;
kadonotakashi 0:8fdf9a60065b 461 }
kadonotakashi 0:8fdf9a60065b 462
kadonotakashi 0:8fdf9a60065b 463 init_uart(obj);
kadonotakashi 0:8fdf9a60065b 464 }
kadonotakashi 0:8fdf9a60065b 465
kadonotakashi 0:8fdf9a60065b 466 /******************************************************************************
kadonotakashi 0:8fdf9a60065b 467 * READ/WRITE
kadonotakashi 0:8fdf9a60065b 468 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 469
kadonotakashi 0:8fdf9a60065b 470 int serial_readable(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 471 {
kadonotakashi 0:8fdf9a60065b 472 struct serial_s *obj_s = SERIAL_S(obj);
kadonotakashi 0:8fdf9a60065b 473 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
kadonotakashi 0:8fdf9a60065b 474 /* To avoid a target blocking case, let's check for
kadonotakashi 0:8fdf9a60065b 475 * possible OVERRUN error and discard it
kadonotakashi 0:8fdf9a60065b 476 */
kadonotakashi 0:8fdf9a60065b 477 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE)) {
kadonotakashi 0:8fdf9a60065b 478 __HAL_UART_CLEAR_OREFLAG(huart);
kadonotakashi 0:8fdf9a60065b 479 }
kadonotakashi 0:8fdf9a60065b 480 // Check if data is received
kadonotakashi 0:8fdf9a60065b 481 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) ? 1 : 0;
kadonotakashi 0:8fdf9a60065b 482 }
kadonotakashi 0:8fdf9a60065b 483
kadonotakashi 0:8fdf9a60065b 484 int serial_writable(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 485 {
kadonotakashi 0:8fdf9a60065b 486 struct serial_s *obj_s = SERIAL_S(obj);
kadonotakashi 0:8fdf9a60065b 487 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
kadonotakashi 0:8fdf9a60065b 488
kadonotakashi 0:8fdf9a60065b 489 // Check if data is transmitted
kadonotakashi 0:8fdf9a60065b 490 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) ? 1 : 0;
kadonotakashi 0:8fdf9a60065b 491 }
kadonotakashi 0:8fdf9a60065b 492
kadonotakashi 0:8fdf9a60065b 493 void serial_pinout_tx(PinName tx)
kadonotakashi 0:8fdf9a60065b 494 {
kadonotakashi 0:8fdf9a60065b 495 pinmap_pinout(tx, PinMap_UART_TX);
kadonotakashi 0:8fdf9a60065b 496 }
kadonotakashi 0:8fdf9a60065b 497
kadonotakashi 0:8fdf9a60065b 498 void serial_break_clear(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 499 {
kadonotakashi 0:8fdf9a60065b 500 (void)obj;
kadonotakashi 0:8fdf9a60065b 501 }
kadonotakashi 0:8fdf9a60065b 502
kadonotakashi 0:8fdf9a60065b 503 /******************************************************************************
kadonotakashi 0:8fdf9a60065b 504 * UTILITY FUNCTIONS
kadonotakashi 0:8fdf9a60065b 505 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 506
kadonotakashi 0:8fdf9a60065b 507 HAL_StatusTypeDef init_uart(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 508 {
kadonotakashi 0:8fdf9a60065b 509 struct serial_s *obj_s = SERIAL_S(obj);
kadonotakashi 0:8fdf9a60065b 510 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
kadonotakashi 0:8fdf9a60065b 511 huart->Instance = (USART_TypeDef *)(obj_s->uart);
kadonotakashi 0:8fdf9a60065b 512
kadonotakashi 0:8fdf9a60065b 513 huart->Init.BaudRate = obj_s->baudrate;
kadonotakashi 0:8fdf9a60065b 514 huart->Init.WordLength = obj_s->databits;
kadonotakashi 0:8fdf9a60065b 515 huart->Init.StopBits = obj_s->stopbits;
kadonotakashi 0:8fdf9a60065b 516 huart->Init.Parity = obj_s->parity;
kadonotakashi 0:8fdf9a60065b 517 #if DEVICE_SERIAL_FC
kadonotakashi 0:8fdf9a60065b 518 huart->Init.HwFlowCtl = obj_s->hw_flow_ctl;
kadonotakashi 0:8fdf9a60065b 519 #else
kadonotakashi 0:8fdf9a60065b 520 huart->Init.HwFlowCtl = UART_HWCONTROL_NONE;
kadonotakashi 0:8fdf9a60065b 521 #endif
kadonotakashi 0:8fdf9a60065b 522 huart->Init.OverSampling = UART_OVERSAMPLING_16;
kadonotakashi 0:8fdf9a60065b 523 huart->TxXferCount = 0;
kadonotakashi 0:8fdf9a60065b 524 huart->TxXferSize = 0;
kadonotakashi 0:8fdf9a60065b 525 huart->RxXferCount = 0;
kadonotakashi 0:8fdf9a60065b 526 huart->RxXferSize = 0;
kadonotakashi 0:8fdf9a60065b 527
kadonotakashi 0:8fdf9a60065b 528 if (obj_s->pin_rx == NC) {
kadonotakashi 0:8fdf9a60065b 529 huart->Init.Mode = UART_MODE_TX;
kadonotakashi 0:8fdf9a60065b 530 } else if (obj_s->pin_tx == NC) {
kadonotakashi 0:8fdf9a60065b 531 huart->Init.Mode = UART_MODE_RX;
kadonotakashi 0:8fdf9a60065b 532 } else {
kadonotakashi 0:8fdf9a60065b 533 huart->Init.Mode = UART_MODE_TX_RX;
kadonotakashi 0:8fdf9a60065b 534 }
kadonotakashi 0:8fdf9a60065b 535
kadonotakashi 0:8fdf9a60065b 536 #if defined(LPUART1_BASE)
kadonotakashi 0:8fdf9a60065b 537 if (huart->Instance == LPUART1) {
kadonotakashi 0:8fdf9a60065b 538 if (obj_s->baudrate <= 9600) {
kadonotakashi 0:8fdf9a60065b 539 HAL_UARTEx_EnableClockStopMode(huart);
kadonotakashi 0:8fdf9a60065b 540 HAL_UARTEx_EnableStopMode(huart);
kadonotakashi 0:8fdf9a60065b 541 } else {
kadonotakashi 0:8fdf9a60065b 542 HAL_UARTEx_DisableClockStopMode(huart);
kadonotakashi 0:8fdf9a60065b 543 HAL_UARTEx_DisableStopMode(huart);
kadonotakashi 0:8fdf9a60065b 544 }
kadonotakashi 0:8fdf9a60065b 545 }
kadonotakashi 0:8fdf9a60065b 546 #endif
kadonotakashi 0:8fdf9a60065b 547
kadonotakashi 0:8fdf9a60065b 548 return HAL_UART_Init(huart);
kadonotakashi 0:8fdf9a60065b 549 }
kadonotakashi 0:8fdf9a60065b 550
kadonotakashi 0:8fdf9a60065b 551 int8_t get_uart_index(UARTName uart_name)
kadonotakashi 0:8fdf9a60065b 552 {
kadonotakashi 0:8fdf9a60065b 553 uint8_t index = 0;
kadonotakashi 0:8fdf9a60065b 554
kadonotakashi 0:8fdf9a60065b 555 #if defined(USART1_BASE)
kadonotakashi 0:8fdf9a60065b 556 if (uart_name == UART_1) {
kadonotakashi 0:8fdf9a60065b 557 return index;
kadonotakashi 0:8fdf9a60065b 558 }
kadonotakashi 0:8fdf9a60065b 559 index++;
kadonotakashi 0:8fdf9a60065b 560 #endif
kadonotakashi 0:8fdf9a60065b 561
kadonotakashi 0:8fdf9a60065b 562 #if defined(USART2_BASE)
kadonotakashi 0:8fdf9a60065b 563 if (uart_name == UART_2) {
kadonotakashi 0:8fdf9a60065b 564 return index;
kadonotakashi 0:8fdf9a60065b 565 }
kadonotakashi 0:8fdf9a60065b 566 index++;
kadonotakashi 0:8fdf9a60065b 567 #endif
kadonotakashi 0:8fdf9a60065b 568
kadonotakashi 0:8fdf9a60065b 569 #if defined(USART3_BASE)
kadonotakashi 0:8fdf9a60065b 570 if (uart_name == UART_3) {
kadonotakashi 0:8fdf9a60065b 571 return index;
kadonotakashi 0:8fdf9a60065b 572 }
kadonotakashi 0:8fdf9a60065b 573 index++;
kadonotakashi 0:8fdf9a60065b 574 #endif
kadonotakashi 0:8fdf9a60065b 575
kadonotakashi 0:8fdf9a60065b 576 #if defined(UART4_BASE)
kadonotakashi 0:8fdf9a60065b 577 if (uart_name == UART_4) {
kadonotakashi 0:8fdf9a60065b 578 return index;
kadonotakashi 0:8fdf9a60065b 579 }
kadonotakashi 0:8fdf9a60065b 580 index++;
kadonotakashi 0:8fdf9a60065b 581 #endif
kadonotakashi 0:8fdf9a60065b 582
kadonotakashi 0:8fdf9a60065b 583 #if defined(USART4_BASE)
kadonotakashi 0:8fdf9a60065b 584 if (uart_name == UART_4) {
kadonotakashi 0:8fdf9a60065b 585 return index;
kadonotakashi 0:8fdf9a60065b 586 }
kadonotakashi 0:8fdf9a60065b 587 index++;
kadonotakashi 0:8fdf9a60065b 588 #endif
kadonotakashi 0:8fdf9a60065b 589
kadonotakashi 0:8fdf9a60065b 590 #if defined(UART5_BASE)
kadonotakashi 0:8fdf9a60065b 591 if (uart_name == UART_5) {
kadonotakashi 0:8fdf9a60065b 592 return index;
kadonotakashi 0:8fdf9a60065b 593 }
kadonotakashi 0:8fdf9a60065b 594 index++;
kadonotakashi 0:8fdf9a60065b 595 #endif
kadonotakashi 0:8fdf9a60065b 596
kadonotakashi 0:8fdf9a60065b 597 #if defined(USART5_BASE)
kadonotakashi 0:8fdf9a60065b 598 if (uart_name == UART_5) {
kadonotakashi 0:8fdf9a60065b 599 return index;
kadonotakashi 0:8fdf9a60065b 600 }
kadonotakashi 0:8fdf9a60065b 601 index++;
kadonotakashi 0:8fdf9a60065b 602 #endif
kadonotakashi 0:8fdf9a60065b 603
kadonotakashi 0:8fdf9a60065b 604 #if defined(USART6_BASE)
kadonotakashi 0:8fdf9a60065b 605 if (uart_name == UART_6) {
kadonotakashi 0:8fdf9a60065b 606 return index;
kadonotakashi 0:8fdf9a60065b 607 }
kadonotakashi 0:8fdf9a60065b 608 index++;
kadonotakashi 0:8fdf9a60065b 609 #endif
kadonotakashi 0:8fdf9a60065b 610
kadonotakashi 0:8fdf9a60065b 611 #if defined(UART7_BASE)
kadonotakashi 0:8fdf9a60065b 612 if (uart_name == UART_7) {
kadonotakashi 0:8fdf9a60065b 613 return index;
kadonotakashi 0:8fdf9a60065b 614 }
kadonotakashi 0:8fdf9a60065b 615 index++;
kadonotakashi 0:8fdf9a60065b 616 #endif
kadonotakashi 0:8fdf9a60065b 617
kadonotakashi 0:8fdf9a60065b 618 #if defined(USART7_BASE)
kadonotakashi 0:8fdf9a60065b 619 if (uart_name == UART_7) {
kadonotakashi 0:8fdf9a60065b 620 return index;
kadonotakashi 0:8fdf9a60065b 621 }
kadonotakashi 0:8fdf9a60065b 622 index++;
kadonotakashi 0:8fdf9a60065b 623 #endif
kadonotakashi 0:8fdf9a60065b 624
kadonotakashi 0:8fdf9a60065b 625 #if defined(UART8_BASE)
kadonotakashi 0:8fdf9a60065b 626 if (uart_name == UART_8) {
kadonotakashi 0:8fdf9a60065b 627 return index;
kadonotakashi 0:8fdf9a60065b 628 }
kadonotakashi 0:8fdf9a60065b 629 index++;
kadonotakashi 0:8fdf9a60065b 630 #endif
kadonotakashi 0:8fdf9a60065b 631
kadonotakashi 0:8fdf9a60065b 632 #if defined(USART8_BASE)
kadonotakashi 0:8fdf9a60065b 633 if (uart_name == UART_8) {
kadonotakashi 0:8fdf9a60065b 634 return index;
kadonotakashi 0:8fdf9a60065b 635 }
kadonotakashi 0:8fdf9a60065b 636 index++;
kadonotakashi 0:8fdf9a60065b 637 #endif
kadonotakashi 0:8fdf9a60065b 638
kadonotakashi 0:8fdf9a60065b 639 #if defined(UART9_BASE)
kadonotakashi 0:8fdf9a60065b 640 if (uart_name == UART_9) {
kadonotakashi 0:8fdf9a60065b 641 return index;
kadonotakashi 0:8fdf9a60065b 642 }
kadonotakashi 0:8fdf9a60065b 643 index++;
kadonotakashi 0:8fdf9a60065b 644 #endif
kadonotakashi 0:8fdf9a60065b 645
kadonotakashi 0:8fdf9a60065b 646 #if defined(UART10_BASE)
kadonotakashi 0:8fdf9a60065b 647 if (uart_name == UART_10) {
kadonotakashi 0:8fdf9a60065b 648 return index;
kadonotakashi 0:8fdf9a60065b 649 }
kadonotakashi 0:8fdf9a60065b 650 index++;
kadonotakashi 0:8fdf9a60065b 651 #endif
kadonotakashi 0:8fdf9a60065b 652
kadonotakashi 0:8fdf9a60065b 653 #if defined(LPUART1_BASE)
kadonotakashi 0:8fdf9a60065b 654 if (uart_name == LPUART_1) {
kadonotakashi 0:8fdf9a60065b 655 return index;
kadonotakashi 0:8fdf9a60065b 656 }
kadonotakashi 0:8fdf9a60065b 657 index++;
kadonotakashi 0:8fdf9a60065b 658 #endif
kadonotakashi 0:8fdf9a60065b 659
kadonotakashi 0:8fdf9a60065b 660 return -1;
kadonotakashi 0:8fdf9a60065b 661 }
kadonotakashi 0:8fdf9a60065b 662
kadonotakashi 0:8fdf9a60065b 663 /* Function to protect deep sleep while a seral Tx is ongoing on not complete
kadonotakashi 0:8fdf9a60065b 664 * yet. Returns 1 if there is at least 1 serial instance with ongoing ransfer
kadonotakashi 0:8fdf9a60065b 665 * 0 otherwise.
kadonotakashi 0:8fdf9a60065b 666 */
kadonotakashi 0:8fdf9a60065b 667 int serial_is_tx_ongoing(void) {
kadonotakashi 0:8fdf9a60065b 668 int TxOngoing = 0;
kadonotakashi 0:8fdf9a60065b 669
kadonotakashi 0:8fdf9a60065b 670 #if defined(USART1_BASE)
kadonotakashi 0:8fdf9a60065b 671 if (LL_USART_IsEnabled(USART1) && !LL_USART_IsActiveFlag_TC(USART1)) {
kadonotakashi 0:8fdf9a60065b 672 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 673 }
kadonotakashi 0:8fdf9a60065b 674 #endif
kadonotakashi 0:8fdf9a60065b 675
kadonotakashi 0:8fdf9a60065b 676 #if defined(USART2_BASE)
kadonotakashi 0:8fdf9a60065b 677 if (LL_USART_IsEnabled(USART2) && !LL_USART_IsActiveFlag_TC(USART2)) {
kadonotakashi 0:8fdf9a60065b 678 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 679 }
kadonotakashi 0:8fdf9a60065b 680 #endif
kadonotakashi 0:8fdf9a60065b 681
kadonotakashi 0:8fdf9a60065b 682 #if defined(USART3_BASE)
kadonotakashi 0:8fdf9a60065b 683 if (LL_USART_IsEnabled(USART3) && !LL_USART_IsActiveFlag_TC(USART3)) {
kadonotakashi 0:8fdf9a60065b 684 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 685 }
kadonotakashi 0:8fdf9a60065b 686 #endif
kadonotakashi 0:8fdf9a60065b 687
kadonotakashi 0:8fdf9a60065b 688 #if defined(UART4_BASE)
kadonotakashi 0:8fdf9a60065b 689 if (LL_USART_IsEnabled(UART4) && !LL_USART_IsActiveFlag_TC(UART4)) {
kadonotakashi 0:8fdf9a60065b 690 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 691 }
kadonotakashi 0:8fdf9a60065b 692 #endif
kadonotakashi 0:8fdf9a60065b 693
kadonotakashi 0:8fdf9a60065b 694 #if defined(USART4_BASE)
kadonotakashi 0:8fdf9a60065b 695 if (LL_USART_IsEnabled(USART4) && !LL_USART_IsActiveFlag_TC(USART4)) {
kadonotakashi 0:8fdf9a60065b 696 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 697 }
kadonotakashi 0:8fdf9a60065b 698 #endif
kadonotakashi 0:8fdf9a60065b 699
kadonotakashi 0:8fdf9a60065b 700 #if defined(UART5_BASE)
kadonotakashi 0:8fdf9a60065b 701 if (LL_USART_IsEnabled(UART5) && !LL_USART_IsActiveFlag_TC(UART5)) {
kadonotakashi 0:8fdf9a60065b 702 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 703 }
kadonotakashi 0:8fdf9a60065b 704 #endif
kadonotakashi 0:8fdf9a60065b 705
kadonotakashi 0:8fdf9a60065b 706 #if defined(USART5_BASE)
kadonotakashi 0:8fdf9a60065b 707 if (LL_USART_IsEnabled(USART5) && !LL_USART_IsActiveFlag_TC(USART5)) {
kadonotakashi 0:8fdf9a60065b 708 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 709 }
kadonotakashi 0:8fdf9a60065b 710 #endif
kadonotakashi 0:8fdf9a60065b 711
kadonotakashi 0:8fdf9a60065b 712 #if defined(USART6_BASE)
kadonotakashi 0:8fdf9a60065b 713 if (LL_USART_IsEnabled(USART6) && !LL_USART_IsActiveFlag_TC(USART6)) {
kadonotakashi 0:8fdf9a60065b 714 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 715 }
kadonotakashi 0:8fdf9a60065b 716 #endif
kadonotakashi 0:8fdf9a60065b 717
kadonotakashi 0:8fdf9a60065b 718 #if defined(UART7_BASE)
kadonotakashi 0:8fdf9a60065b 719 if (LL_USART_IsEnabled(UART7) && !LL_USART_IsActiveFlag_TC(UART7)) {
kadonotakashi 0:8fdf9a60065b 720 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 721 }
kadonotakashi 0:8fdf9a60065b 722 #endif
kadonotakashi 0:8fdf9a60065b 723
kadonotakashi 0:8fdf9a60065b 724 #if defined(USART7_BASE)
kadonotakashi 0:8fdf9a60065b 725 if (LL_USART_IsEnabled(USART7) && !LL_USART_IsActiveFlag_TC(USART7)) {
kadonotakashi 0:8fdf9a60065b 726 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 727 }
kadonotakashi 0:8fdf9a60065b 728 #endif
kadonotakashi 0:8fdf9a60065b 729
kadonotakashi 0:8fdf9a60065b 730 #if defined(UART8_BASE)
kadonotakashi 0:8fdf9a60065b 731 if (LL_USART_IsEnabled(UART8) && !LL_USART_IsActiveFlag_TC(UART8)) {
kadonotakashi 0:8fdf9a60065b 732 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 733 }
kadonotakashi 0:8fdf9a60065b 734 #endif
kadonotakashi 0:8fdf9a60065b 735
kadonotakashi 0:8fdf9a60065b 736 #if defined(USART8_BASE)
kadonotakashi 0:8fdf9a60065b 737 if (LL_USART_IsEnabled(USART8) && !LL_USART_IsActiveFlag_TC(USART8)) {
kadonotakashi 0:8fdf9a60065b 738 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 739 }
kadonotakashi 0:8fdf9a60065b 740 #endif
kadonotakashi 0:8fdf9a60065b 741
kadonotakashi 0:8fdf9a60065b 742 #if defined(UART9_BASE)
kadonotakashi 0:8fdf9a60065b 743 if (LL_USART_IsEnabled(UART9) && !LL_USART_IsActiveFlag_TC(UART9)) {
kadonotakashi 0:8fdf9a60065b 744 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 745 }
kadonotakashi 0:8fdf9a60065b 746 #endif
kadonotakashi 0:8fdf9a60065b 747
kadonotakashi 0:8fdf9a60065b 748 #if defined(UART10_BASE)
kadonotakashi 0:8fdf9a60065b 749 if (LL_USART_IsEnabled(UART10) && !LL_USART_IsActiveFlag_TC(UART10)) {
kadonotakashi 0:8fdf9a60065b 750 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 751 }
kadonotakashi 0:8fdf9a60065b 752 #endif
kadonotakashi 0:8fdf9a60065b 753
kadonotakashi 0:8fdf9a60065b 754 #if defined(LPUART1_BASE)
kadonotakashi 0:8fdf9a60065b 755 if (LL_USART_IsEnabled(LPUART1) && !LL_USART_IsActiveFlag_TC(LPUART1)) {
kadonotakashi 0:8fdf9a60065b 756 TxOngoing |= 1;
kadonotakashi 0:8fdf9a60065b 757 }
kadonotakashi 0:8fdf9a60065b 758 #endif
kadonotakashi 0:8fdf9a60065b 759
kadonotakashi 0:8fdf9a60065b 760 /* If Tx is ongoing, then transfer is */
kadonotakashi 0:8fdf9a60065b 761 return TxOngoing;
kadonotakashi 0:8fdf9a60065b 762 }
kadonotakashi 0:8fdf9a60065b 763
kadonotakashi 0:8fdf9a60065b 764 #endif /* DEVICE_SERIAL */