Kazuki Yamamoto / Mbed 2 deprecated uart_i2c_conv

UART to I2C master(s) converter, targetting to emulate SC18IM700(NXP) chip

Dependencies:   mbed

UART to I2C master(s) converter, targetting to emulate SC18IM700(NXP) chip

Features

up to 4x I2C master

  • for LPC824 implement, we can use up to 4 channels of I2C masters
    • 1x Fm+ and 3x Fm I2C channels
  • for LPC1768 implement, we can use up to 2 channels of I2C masters
    • 2x Fm I2C channels
  • for LPC11U35 implement, only one channel for I2C master, but program uses USB CDC class for UART communication (means no external USB-Serial converter chip)
    • 1x Fm+ I2C channels

1x SPI master

up to 2x 8bit GPIO

Tested Platforms

LPC824

LPC1768

LPC11U35

Quote:

LPC11U35 implement requires importing USBDevice library to use USBSerial class

visit https://github.com/K4zuki/tinyI2C for more information

main.cpp@85:4b1489cd5623, 2016-09-19 (annotated)

Committer:
K4zuki
Date:
Mon Sep 19 17:56:32 2016 +0900
Revision:
85:4b1489cd5623
Parent:
84:394b8cc7bef2 
fix indents

Who changed what in which revision?

UserRevisionLine numberNew contents of line
K4zuki 78:434514b8d383 1 /** uart_i2c_conv for LPC824
K4zuki 78:434514b8d383 2 */
K4zuki 78:434514b8d383 3
K4zuki 78:434514b8d383 4 #include "mbed.h"
K4zuki 78:434514b8d383 5 #include "settings.h"
K4zuki 78:434514b8d383 6 //Table 3. ASCII commands supported by SC18IM700
K4zuki 78:434514b8d383 7 //ASCII command Hex value Command function
K4zuki 78:434514b8d383 8 //[X] S 0x53 I2C-bus START
K4zuki 80:3cbe7972872b 9 //[X] P 0x50 I2C/SPI-bus STOP, end of packet
K4zuki 78:434514b8d383 10 //[X] R 0x52 read SC18IM700 internal register
K4zuki 80:3cbe7972872b 11 //[X] W 0x57 write to internal register(s)
K4zuki 80:3cbe7972872b 12 //[X] I 0x49 read GPIO port
K4zuki 80:3cbe7972872b 13 //[X] O 0x4F write to GPIO port
K4zuki 78:434514b8d383 14 //[_] Z 0x5A power down
K4zuki 78:434514b8d383 15 //[X] C 0x43 change channel
K4zuki 80:3cbe7972872b 16 //[X] E 0x45 SPI transfer start
K4zuki 78:434514b8d383 17 //[_] V 0x__ enable VDDIO output to chip
K4zuki 78:434514b8d383 18
K4zuki 78:434514b8d383 19 /**
K4zuki 78:434514b8d383 20 "C| '0'| P"
K4zuki 78:434514b8d383 21 "C| '1'| P"
K4zuki 78:434514b8d383 22 "C| '2'| P"
K4zuki 78:434514b8d383 23 "C| '3'| P"
K4zuki 78:434514b8d383 24 "S| 0x_8 _0| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P"
K4zuki 78:434514b8d383 25 "S| 0x_8 _0| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| S| 0x_8 _1| 0x_0 _4| P"
K4zuki 78:434514b8d383 26 "S| 0x_8 _1| 0x_0 _4| P"
K4zuki 78:434514b8d383 27 "R| '0'| P"
K4zuki 78:434514b8d383 28 "R| '0'| '1'| ...| P"
K4zuki 78:434514b8d383 29 "W| '0' 0x_a _a| P"
K4zuki 78:434514b8d383 30 "W| '0' 0x_a _a| '1' 0x_b _b| ...| P"
K4zuki 78:434514b8d383 31 "I| '0'| P"
K4zuki 78:434514b8d383 32 "O| '0'| 0x_a _a| P"
K4zuki 78:434514b8d383 33 "E| 0x_0 _4| 0x_0 _0| 0x_D _E _A _D _B _E _A _F| P" //write
K4zuki 78:434514b8d383 34 "E| 0x_0 _4| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P" //write and read
K4zuki 78:434514b8d383 35 */
K4zuki 78:434514b8d383 36 int main()
K4zuki 78:434514b8d383 37 {
K4zuki 80:3cbe7972872b 38 I2C* dev = &dev1;
K4zuki 78:434514b8d383 39
K4zuki 80:3cbe7972872b 40 #ifdef isUART
K4zuki 80:3cbe7972872b 41 pc.baud(115200);
K4zuki 80:3cbe7972872b 42 #endif
K4zuki 80:3cbe7972872b 43 _spi.frequency(8000000);
K4zuki 78:434514b8d383 44
K4zuki 80:3cbe7972872b 45 bool s = false;
K4zuki 80:3cbe7972872b 46 dev1.frequency(400000);
K4zuki 80:3cbe7972872b 47 #if defined(TARGET_SSCI824) || defined(TARGET_LP824MAX)
K4zuki 80:3cbe7972872b 48 dev1.frequency(800000);//800k; works around 940kHz with 200ohm pullups/ not work at 1M?
K4zuki 80:3cbe7972872b 49 LPC_IOCON->PIO0_11 &= ~(0x03<<8);
K4zuki 80:3cbe7972872b 50 LPC_IOCON->PIO0_11 |= (0x02<<8);
K4zuki 80:3cbe7972872b 51 LPC_IOCON->PIO0_10 &= ~(0x03<<8);
K4zuki 80:3cbe7972872b 52 LPC_IOCON->PIO0_10 |= (0x02<<8);
K4zuki 80:3cbe7972872b 53 #elif defined(TARGET_MCU_LPC11U35_501) || defined(TARGET_LPC11U35_401)
K4zuki 80:3cbe7972872b 54 dev1.frequency(800000);//800k; works around 940kHz with 200ohm pullups/ not work at 1M?
K4zuki 80:3cbe7972872b 55 LPC_IOCON->PIO0_4 &= ~(0x03<<8);
K4zuki 80:3cbe7972872b 56 LPC_IOCON->PIO0_4 |= (0x02<<8);
K4zuki 80:3cbe7972872b 57 LPC_IOCON->PIO0_5 &= ~(0x03<<8);
K4zuki 80:3cbe7972872b 58 LPC_IOCON->PIO0_5 |= (0x02<<8);
K4zuki 80:3cbe7972872b 59 #endif
K4zuki 78:434514b8d383 60
K4zuki 80:3cbe7972872b 61 #ifdef isI2C2
K4zuki 80:3cbe7972872b 62 dev2.frequency(400000);//400k
K4zuki 80:3cbe7972872b 63 #endif
K4zuki 80:3cbe7972872b 64 #ifdef isI2C3
K4zuki 80:3cbe7972872b 65 dev3.frequency(400000);//400k
K4zuki 80:3cbe7972872b 66 #endif
K4zuki 80:3cbe7972872b 67 #ifdef isI2C4
K4zuki 80:3cbe7972872b 68 dev4.frequency(400000);//400k
K4zuki 80:3cbe7972872b 69 #endif
K4zuki 80:3cbe7972872b 70 #ifdef isGPIO1
K4zuki 80:3cbe7972872b 71 DigitalInOut* gpio1[] = {
K4zuki 80:3cbe7972872b 72 &_GPIO10,
K4zuki 80:3cbe7972872b 73 &_GPIO11,
K4zuki 80:3cbe7972872b 74 &_GPIO12,
K4zuki 80:3cbe7972872b 75 &_GPIO13,
K4zuki 80:3cbe7972872b 76 &_GPIO14,
K4zuki 80:3cbe7972872b 77 &_GPIO15,
K4zuki 80:3cbe7972872b 78 &_GPIO16,
K4zuki 80:3cbe7972872b 79 &_GPIO17,
K4zuki 80:3cbe7972872b 80 };
K4zuki 80:3cbe7972872b 81 for(int k = 0; k < 8; k++){
K4zuki 80:3cbe7972872b 82 gpio1[k]->input();
K4zuki 80:3cbe7972872b 83 gpio1[k]->mode( PullUp );
K4zuki 80:3cbe7972872b 84 }
K4zuki 80:3cbe7972872b 85 #endif
K4zuki 78:434514b8d383 86
K4zuki 80:3cbe7972872b 87 DigitalInOut* gpio0[] = {
K4zuki 80:3cbe7972872b 88 &_GPIO00,
K4zuki 80:3cbe7972872b 89 &_GPIO01,
K4zuki 80:3cbe7972872b 90 &_GPIO02,
K4zuki 80:3cbe7972872b 91 &_GPIO03,
K4zuki 80:3cbe7972872b 92 &_GPIO04,
K4zuki 80:3cbe7972872b 93 &_GPIO05,
K4zuki 80:3cbe7972872b 94 &_GPIO06,
K4zuki 80:3cbe7972872b 95 &_GPIO07,
K4zuki 80:3cbe7972872b 96 };
K4zuki 80:3cbe7972872b 97 for(int k = 0; k < 8; k++){
K4zuki 80:3cbe7972872b 98 gpio0[k]->input();
K4zuki 80:3cbe7972872b 99 gpio0[k]->mode( PullUp );
K4zuki 80:3cbe7972872b 100 }
K4zuki 80:3cbe7972872b 101
K4zuki 80:3cbe7972872b 102 int ack = 0;
K4zuki 80:3cbe7972872b 103 int plength = 0;
K4zuki 80:3cbe7972872b 104 int recieve[256];
K4zuki 80:3cbe7972872b 105 char send[256];
K4zuki 80:3cbe7972872b 106 for(int k = 0; k < 256; k+=4){
K4zuki 80:3cbe7972872b 107 // cafe moca
K4zuki 80:3cbe7972872b 108 recieve[k + 0] = send[k + 0] = 0xC4;
K4zuki 80:3cbe7972872b 109 recieve[k + 1] = send[k + 1] = 0xFE;
K4zuki 80:3cbe7972872b 110 recieve[k + 2] = send[k + 2] = 0xE0;
K4zuki 80:3cbe7972872b 111 recieve[k + 3] = send[k + 3] = 0xCA;
K4zuki 80:3cbe7972872b 112 }
K4zuki 78:434514b8d383 113
K4zuki 80:3cbe7972872b 114 int read = 0;
K4zuki 80:3cbe7972872b 115 int address = 0;
K4zuki 80:3cbe7972872b 116 int data = 0;
K4zuki 80:3cbe7972872b 117 int _data = 0;
K4zuki 80:3cbe7972872b 118 int length = 0;
K4zuki 80:3cbe7972872b 119 int channel = 0;
K4zuki 80:3cbe7972872b 120 int format = 8;
K4zuki 80:3cbe7972872b 121 int enabled = 0;
K4zuki 80:3cbe7972872b 122 int disabled = 0;
K4zuki 80:3cbe7972872b 123 enum command_e {
K4zuki 80:3cbe7972872b 124 CMD_S = 'S',
K4zuki 80:3cbe7972872b 125 CMD_P = 'P',
K4zuki 80:3cbe7972872b 126 CMD_C = 'C',
K4zuki 80:3cbe7972872b 127 CMD_R = 'R',
K4zuki 80:3cbe7972872b 128 CMD_W = 'W',
K4zuki 80:3cbe7972872b 129 CMD_I = 'I',
K4zuki 80:3cbe7972872b 130 CMD_O = 'O',
K4zuki 80:3cbe7972872b 131 CMD_E = 'E',
K4zuki 80:3cbe7972872b 132 };
K4zuki 80:3cbe7972872b 133 enum channel_e {
K4zuki 80:3cbe7972872b 134 CH0 = '0',
K4zuki 80:3cbe7972872b 135 CH1 = '1',
K4zuki 80:3cbe7972872b 136 CH2 = '2',
K4zuki 80:3cbe7972872b 137 CH3 = '3',
K4zuki 80:3cbe7972872b 138 };
K4zuki 80:3cbe7972872b 139 enum register_e {
K4zuki 80:3cbe7972872b 140 CHIP_ID = '0',
K4zuki 80:3cbe7972872b 141 GPIO0_STAT = '1',
K4zuki 80:3cbe7972872b 142 GPIO1_STAT = '2',
K4zuki 80:3cbe7972872b 143 GPIO0_CONF = '3',
K4zuki 80:3cbe7972872b 144 GPIO1_CONF = '4',
K4zuki 80:3cbe7972872b 145 I2C_CONF = '5',
K4zuki 80:3cbe7972872b 146 SPI_CONF = '6',
K4zuki 80:3cbe7972872b 147 REG7,
K4zuki 80:3cbe7972872b 148 REG8,
K4zuki 80:3cbe7972872b 149 REG9,
K4zuki 80:3cbe7972872b 150 };
K4zuki 80:3cbe7972872b 151 static uint8_t registers[]={
K4zuki 80:3cbe7972872b 152 chip_id,
K4zuki 80:3cbe7972872b 153 0x00,
K4zuki 80:3cbe7972872b 154 0x00,
K4zuki 80:3cbe7972872b 155 0x00,
K4zuki 80:3cbe7972872b 156 0x00,
K4zuki 80:3cbe7972872b 157 0xFF,
K4zuki 80:3cbe7972872b 158 0x70,
K4zuki 80:3cbe7972872b 159 REG7,
K4zuki 80:3cbe7972872b 160 REG8,
K4zuki 80:3cbe7972872b 161 REG9,
K4zuki 80:3cbe7972872b 162 };
K4zuki 78:434514b8d383 163
K4zuki 80:3cbe7972872b 164 int i = 0;
K4zuki 80:3cbe7972872b 165 while(1) {
K4zuki 80:3cbe7972872b 166 i = 0;
K4zuki 80:3cbe7972872b 167 length = 0;
Kazuki Yamamoto 84:394b8cc7bef2 168 s = false;
K4zuki 80:3cbe7972872b 169 while( true ) {
K4zuki 80:3cbe7972872b 170 read = pc.getc();
K4zuki 80:3cbe7972872b 171 recieve[i] = read;
K4zuki 80:3cbe7972872b 172 i++;
K4zuki 80:3cbe7972872b 173 if(read == 'P') {
K4zuki 80:3cbe7972872b 174 plength = i;
K4zuki 80:3cbe7972872b 175 break;
K4zuki 80:3cbe7972872b 176 }
K4zuki 80:3cbe7972872b 177 }
K4zuki 80:3cbe7972872b 178 i = 0;
K4zuki 80:3cbe7972872b 179 while( i < plength ) {
K4zuki 80:3cbe7972872b 180 switch( recieve[ i ] ) {
K4zuki 80:3cbe7972872b 181 case CMD_C:
K4zuki 80:3cbe7972872b 182 {
K4zuki 80:3cbe7972872b 183 s = false;
K4zuki 80:3cbe7972872b 184 channel = recieve[i + 1];
K4zuki 80:3cbe7972872b 185 switch( channel ) {
K4zuki 80:3cbe7972872b 186 case CH0:
K4zuki 80:3cbe7972872b 187 {
K4zuki 80:3cbe7972872b 188 channel = CH0;
K4zuki 80:3cbe7972872b 189 dev = &dev1;
K4zuki 80:3cbe7972872b 190 break;
K4zuki 78:434514b8d383 191 }
K4zuki 80:3cbe7972872b 192 #ifdef isI2C2
K4zuki 80:3cbe7972872b 193 case CH1:
K4zuki 80:3cbe7972872b 194 {
K4zuki 80:3cbe7972872b 195 channel = CH1;
K4zuki 80:3cbe7972872b 196 dev = &dev2;
K4zuki 80:3cbe7972872b 197 break;
K4zuki 80:3cbe7972872b 198 }
K4zuki 80:3cbe7972872b 199 #endif
K4zuki 80:3cbe7972872b 200 #ifdef isI2C3
K4zuki 80:3cbe7972872b 201 case CH2:
K4zuki 80:3cbe7972872b 202 {
K4zuki 80:3cbe7972872b 203 channel = CH2;
K4zuki 80:3cbe7972872b 204 dev = &dev3;
K4zuki 80:3cbe7972872b 205 break;
K4zuki 80:3cbe7972872b 206 }
K4zuki 80:3cbe7972872b 207 #endif
K4zuki 80:3cbe7972872b 208 #ifdef isI2C4
K4zuki 80:3cbe7972872b 209 case CH3:
K4zuki 80:3cbe7972872b 210 {
K4zuki 80:3cbe7972872b 211 channel = CH3;
K4zuki 80:3cbe7972872b 212 dev = &dev4;
K4zuki 80:3cbe7972872b 213 break;
K4zuki 80:3cbe7972872b 214 }
K4zuki 80:3cbe7972872b 215 #endif
K4zuki 80:3cbe7972872b 216 default:
K4zuki 80:3cbe7972872b 217 {
K4zuki 80:3cbe7972872b 218 channel = CH0;
K4zuki 80:3cbe7972872b 219 dev = &dev1;
K4zuki 80:3cbe7972872b 220 break;
K4zuki 80:3cbe7972872b 221 }
K4zuki 80:3cbe7972872b 222 }
K4zuki 80:3cbe7972872b 223 i += 2;
K4zuki 80:3cbe7972872b 224 break;
K4zuki 78:434514b8d383 225 }
K4zuki 80:3cbe7972872b 226 case CMD_S:
K4zuki 80:3cbe7972872b 227 {
K4zuki 80:3cbe7972872b 228 s = true;
K4zuki 80:3cbe7972872b 229 ack = plength - 2 - (i+1) + (recieve[i+2] & 0x01);
K4zuki 80:3cbe7972872b 230 if( ack >= 4 ) { //valid packet
K4zuki 80:3cbe7972872b 231 address = 0xff & (recieve[i+1] << 4 | (recieve[i+2] & 0x0F));
K4zuki 80:3cbe7972872b 232 length = 0xff & (recieve[i+3] << 4 | (recieve[i+4] & 0x0F));
K4zuki 78:434514b8d383 233
K4zuki 80:3cbe7972872b 234 if( address & 0x01 ) { //read
K4zuki 80:3cbe7972872b 235 ack = dev->read(address, send, length, false); //added
K4zuki 80:3cbe7972872b 236 send[length] = ack;
K4zuki 80:3cbe7972872b 237 length += 1;
K4zuki 80:3cbe7972872b 238 i += 5;
K4zuki 80:3cbe7972872b 239 } else { // write
K4zuki 80:3cbe7972872b 240 for(int j = 0; j < (length * 2); j += 2) {
K4zuki 80:3cbe7972872b 241 ack = 0xff&((recieve[5+j] << 4) | (recieve[6+j] & 0x0F));
K4zuki 80:3cbe7972872b 242 *(send+(j/2)) = ack; //added
K4zuki 80:3cbe7972872b 243 }
K4zuki 80:3cbe7972872b 244 ack = dev->write(address, send, length, true); //added
K4zuki 80:3cbe7972872b 245 i += (5 + length * 2);
K4zuki 80:3cbe7972872b 246 send[0] = ack;
K4zuki 80:3cbe7972872b 247 length = 1;
K4zuki 80:3cbe7972872b 248 }
K4zuki 80:3cbe7972872b 249 } else {
K4zuki 80:3cbe7972872b 250 pc.printf("bad packet! %d, %d, %02X, %d\n\r",
K4zuki 80:3cbe7972872b 251 plength, i, recieve[(i + 2)] & 0x0F, ack);
K4zuki 80:3cbe7972872b 252 s = false;
K4zuki 80:3cbe7972872b 253 i = plength;
K4zuki 80:3cbe7972872b 254 }
K4zuki 80:3cbe7972872b 255 break;
K4zuki 80:3cbe7972872b 256 }
K4zuki 80:3cbe7972872b 257 case CMD_P:
K4zuki 80:3cbe7972872b 258 {
K4zuki 80:3cbe7972872b 259 if(s){
K4zuki 80:3cbe7972872b 260 dev->stop();
K4zuki 80:3cbe7972872b 261 s = false;
K4zuki 80:3cbe7972872b 262 if( send[length - 1] == 0 ){
K4zuki 80:3cbe7972872b 263 pc.printf("ACK,");
K4zuki 80:3cbe7972872b 264 }else{
K4zuki 80:3cbe7972872b 265 pc.printf("NAK,");
K4zuki 80:3cbe7972872b 266 }
K4zuki 80:3cbe7972872b 267 length--;
K4zuki 80:3cbe7972872b 268 }
K4zuki 80:3cbe7972872b 269 i = plength;
K4zuki 80:3cbe7972872b 270 for(int j = 0; j < length; j++) {
K4zuki 80:3cbe7972872b 271 pc.printf("%02X,", send[j]);
K4zuki 80:3cbe7972872b 272 }
K4zuki 80:3cbe7972872b 273 pc.printf("ok\n\r");
K4zuki 80:3cbe7972872b 274 break;
K4zuki 80:3cbe7972872b 275 }
K4zuki 80:3cbe7972872b 276 case CMD_R:
K4zuki 80:3cbe7972872b 277 {
K4zuki 80:3cbe7972872b 278 s = false;
K4zuki 80:3cbe7972872b 279 length = plength - 2;
K4zuki 80:3cbe7972872b 280 if(length < 1){
K4zuki 80:3cbe7972872b 281 pc.printf("bad packet! %d\n\r",length);
K4zuki 80:3cbe7972872b 282 i = plength + 1;
K4zuki 80:3cbe7972872b 283 length = 0;
K4zuki 80:3cbe7972872b 284 }else{
K4zuki 80:3cbe7972872b 285 for(int j = 0; j < length; j++){
K4zuki 80:3cbe7972872b 286 address = recieve[i+1+j];
K4zuki 80:3cbe7972872b 287 switch(address){
K4zuki 80:3cbe7972872b 288 case CHIP_ID:
K4zuki 78:434514b8d383 289 {
K4zuki 80:3cbe7972872b 290 data = chip_id;
K4zuki 80:3cbe7972872b 291 break;
K4zuki 78:434514b8d383 292 }
K4zuki 80:3cbe7972872b 293 case GPIO0_STAT:
K4zuki 80:3cbe7972872b 294 {
K4zuki 80:3cbe7972872b 295 for(int k = 0; k < 8; k++){
K4zuki 80:3cbe7972872b 296 _data = gpio0[k]->read();
K4zuki 80:3cbe7972872b 297 data |= (_data << k);
K4zuki 80:3cbe7972872b 298 }
K4zuki 80:3cbe7972872b 299 registers[GPIO0_STAT-'0'] = data;
K4zuki 80:3cbe7972872b 300 break;
K4zuki 80:3cbe7972872b 301 }
K4zuki 80:3cbe7972872b 302 case GPIO0_CONF:
K4zuki 80:3cbe7972872b 303 {
K4zuki 80:3cbe7972872b 304 data = registers[GPIO0_CONF-'0'];
K4zuki 80:3cbe7972872b 305 break;
K4zuki 80:3cbe7972872b 306 }
K4zuki 80:3cbe7972872b 307 #ifdef isGPIO1
K4zuki 80:3cbe7972872b 308 case GPIO1_STAT:
K4zuki 78:434514b8d383 309 {
K4zuki 80:3cbe7972872b 310 for(int k = 0; k < 8; k++){
K4zuki 80:3cbe7972872b 311 _data = gpio1[k]->read();
K4zuki 80:3cbe7972872b 312 data |= (_data << k);
K4zuki 80:3cbe7972872b 313 }
K4zuki 80:3cbe7972872b 314 registers[GPIO1_STAT-'0'] = data;
K4zuki 80:3cbe7972872b 315 break;
K4zuki 78:434514b8d383 316 }
K4zuki 80:3cbe7972872b 317 case GPIO1_CONF:
K4zuki 78:434514b8d383 318 {
K4zuki 80:3cbe7972872b 319 data = registers[GPIO1_CONF-'0'];
K4zuki 80:3cbe7972872b 320 break;
K4zuki 78:434514b8d383 321 }
K4zuki 80:3cbe7972872b 322 #endif
K4zuki 80:3cbe7972872b 323 case I2C_CONF:
K4zuki 78:434514b8d383 324 {
K4zuki 80:3cbe7972872b 325 data = registers[I2C_CONF-'0'];
K4zuki 80:3cbe7972872b 326 break;
K4zuki 78:434514b8d383 327 }
K4zuki 80:3cbe7972872b 328 case SPI_CONF:
K4zuki 78:434514b8d383 329 {
K4zuki 80:3cbe7972872b 330 data = registers[SPI_CONF-'0'];
K4zuki 80:3cbe7972872b 331 break;
K4zuki 78:434514b8d383 332 }
K4zuki 78:434514b8d383 333 default:
K4zuki 78:434514b8d383 334 {
K4zuki 80:3cbe7972872b 335 data = 0xAA;
K4zuki 80:3cbe7972872b 336 break;
K4zuki 80:3cbe7972872b 337 }
K4zuki 80:3cbe7972872b 338 }
K4zuki 80:3cbe7972872b 339 send[j] = (char)data;
K4zuki 80:3cbe7972872b 340 data = 0;
K4zuki 80:3cbe7972872b 341 }
K4zuki 80:3cbe7972872b 342 i += (length+1);
K4zuki 80:3cbe7972872b 343 }
K4zuki 80:3cbe7972872b 344 break;
K4zuki 80:3cbe7972872b 345 }
K4zuki 80:3cbe7972872b 346 case CMD_W:
K4zuki 80:3cbe7972872b 347 {
K4zuki 80:3cbe7972872b 348 s = false;
K4zuki 80:3cbe7972872b 349 length = plength - 2;
K4zuki 80:3cbe7972872b 350 if(length < 3){
K4zuki 80:3cbe7972872b 351 pc.printf("bad packet! %d\n\r",length);
K4zuki 80:3cbe7972872b 352 i = plength + 1;
K4zuki 80:3cbe7972872b 353 length = 0;
K4zuki 80:3cbe7972872b 354 }else{
K4zuki 80:3cbe7972872b 355 for(int j = 0; j < length; j +=3){
K4zuki 80:3cbe7972872b 356 address = recieve[i+1+j];
K4zuki 80:3cbe7972872b 357 data = 0xff & (recieve[i+2+j] << 4 | (recieve[i+3+j] & 0x0F));
K4zuki 80:3cbe7972872b 358 _data = 0;
K4zuki 80:3cbe7972872b 359 switch(address){
K4zuki 80:3cbe7972872b 360 case CHIP_ID:
K4zuki 80:3cbe7972872b 361 {
K4zuki 80:3cbe7972872b 362 //READ ONLY: do nothing
K4zuki 80:3cbe7972872b 363 data = registers[CHIP_ID-'0'];
K4zuki 80:3cbe7972872b 364 break;
K4zuki 80:3cbe7972872b 365 }
K4zuki 80:3cbe7972872b 366 case GPIO0_STAT:
K4zuki 80:3cbe7972872b 367 {
K4zuki 80:3cbe7972872b 368 _data = registers[GPIO0_CONF-'0'];
K4zuki 80:3cbe7972872b 369 for(int k=0; k<8; k++){
K4zuki 80:3cbe7972872b 370 if(_data&0x01){ // output
K4zuki 80:3cbe7972872b 371 gpio0[k]->write((data>>k)&0x01);
K4zuki 80:3cbe7972872b 372 }else{ // input
K4zuki 80:3cbe7972872b 373 ; // do nothing
K4zuki 80:3cbe7972872b 374 }
K4zuki 80:3cbe7972872b 375 _data >>= 1;
K4zuki 80:3cbe7972872b 376 }
K4zuki 80:3cbe7972872b 377 break;
K4zuki 80:3cbe7972872b 378 }
K4zuki 80:3cbe7972872b 379 case GPIO0_CONF:
K4zuki 80:3cbe7972872b 380 {
K4zuki 80:3cbe7972872b 381 registers[GPIO0_CONF-'0'] = data;
K4zuki 80:3cbe7972872b 382 for(int k = 0; k < 8; k++){
K4zuki 80:3cbe7972872b 383 if(data & 0x01){//output
K4zuki 80:3cbe7972872b 384 gpio0[k]->output();
K4zuki 80:3cbe7972872b 385 }else{//input
K4zuki 80:3cbe7972872b 386 gpio0[k]->input();
K4zuki 80:3cbe7972872b 387 gpio0[k]->mode(PullUp);
K4zuki 80:3cbe7972872b 388 }
K4zuki 80:3cbe7972872b 389 data >>= 1;
K4zuki 80:3cbe7972872b 390 }
K4zuki 80:3cbe7972872b 391 data = registers[GPIO0_CONF-'0'];
K4zuki 80:3cbe7972872b 392 break;
K4zuki 78:434514b8d383 393 }
K4zuki 80:3cbe7972872b 394 #ifdef isGPIO1
K4zuki 80:3cbe7972872b 395 case GPIO1_STAT:
K4zuki 80:3cbe7972872b 396 {
K4zuki 80:3cbe7972872b 397 _data = registers[GPIO1_CONF-'0'];
K4zuki 80:3cbe7972872b 398 for(int k = 0; k < 8; k++){
K4zuki 80:3cbe7972872b 399 if(_data & 0x01){ // output
K4zuki 80:3cbe7972872b 400 gpio1[k]->write((data>>k)&0x01);
K4zuki 80:3cbe7972872b 401 }else{ // input
K4zuki 80:3cbe7972872b 402 ; // do nothing
K4zuki 80:3cbe7972872b 403 }
K4zuki 80:3cbe7972872b 404 _data >>= 1;
K4zuki 80:3cbe7972872b 405 }
K4zuki 80:3cbe7972872b 406 break;
K4zuki 80:3cbe7972872b 407 }
K4zuki 80:3cbe7972872b 408 case GPIO1_CONF:
K4zuki 80:3cbe7972872b 409 {
K4zuki 80:3cbe7972872b 410 registers[GPIO1_CONF-'0'] = data;
K4zuki 80:3cbe7972872b 411 for(int k = 0; k < 6; k++){
K4zuki 80:3cbe7972872b 412 if(data & 0x01){//output
K4zuki 80:3cbe7972872b 413 gpio1[k]->output();
K4zuki 80:3cbe7972872b 414 }else{//input
K4zuki 80:3cbe7972872b 415 gpio1[k]->input();
K4zuki 80:3cbe7972872b 416 gpio1[k]->mode(PullUp);
K4zuki 80:3cbe7972872b 417 }
K4zuki 80:3cbe7972872b 418 data >>= 1;
K4zuki 80:3cbe7972872b 419 }
K4zuki 80:3cbe7972872b 420 data = registers[GPIO1_CONF-'0'];
K4zuki 80:3cbe7972872b 421 break;
K4zuki 80:3cbe7972872b 422 }
K4zuki 80:3cbe7972872b 423 #endif
K4zuki 80:3cbe7972872b 424 case I2C_CONF:
K4zuki 80:3cbe7972872b 425 {
K4zuki 80:3cbe7972872b 426 registers[I2C_CONF-'0'] = data;
K4zuki 80:3cbe7972872b 427 #if defined(TARGET_LPC1768)
K4zuki 80:3cbe7972872b 428 dev1.frequency(100000 * ((0x03 & (data >> 6)) + 1));
K4zuki 80:3cbe7972872b 429 #else
K4zuki 80:3cbe7972872b 430 dev1.frequency(200000 * ((0x03 & (data >> 6)) + 1));
K4zuki 80:3cbe7972872b 431 #endif
K4zuki 80:3cbe7972872b 432 #ifdef isI2C2
K4zuki 80:3cbe7972872b 433 dev2.frequency(100000 * ((0x03 & (data >> 4)) + 1));
K4zuki 80:3cbe7972872b 434 #endif
K4zuki 80:3cbe7972872b 435 #ifdef isI2C3
K4zuki 80:3cbe7972872b 436 dev3.frequency(100000 * ((0x03 & (data >> 2)) + 1));
K4zuki 80:3cbe7972872b 437 #endif
K4zuki 80:3cbe7972872b 438 #ifdef isI2C4
K4zuki 80:3cbe7972872b 439 dev4.frequency(100000 * ((0x03 & (data >> 0)) + 1));
K4zuki 80:3cbe7972872b 440 #endif
K4zuki 80:3cbe7972872b 441 break;
K4zuki 80:3cbe7972872b 442 }
K4zuki 80:3cbe7972872b 443 case SPI_CONF:
K4zuki 80:3cbe7972872b 444 {
K4zuki 80:3cbe7972872b 445 registers[SPI_CONF-'0'] = data;
K4zuki 80:3cbe7972872b 446 format = ((data & 0x04) + 4) << 1;
K4zuki 80:3cbe7972872b 447 _spi.format(format, 0x03 & (data));
K4zuki 80:3cbe7972872b 448 _spi.frequency(1000000 * ((0x07 & (data >> 4)) + 1));
K4zuki 80:3cbe7972872b 449 enabled = (data & 0x08) >> 3;
K4zuki 80:3cbe7972872b 450 /*
K4zuki 80:3cbe7972872b 451 7 not used
K4zuki 80:3cbe7972872b 452 6:4 frequency
K4zuki 80:3cbe7972872b 453 3 CE pol
K4zuki 80:3cbe7972872b 454 2 word size(0=8bit,1=16bit)
K4zuki 80:3cbe7972872b 455 1:0 pol(corresponds to spi.format())
K4zuki 80:3cbe7972872b 456 */
K4zuki 80:3cbe7972872b 457 disabled = ~enabled;
K4zuki 80:3cbe7972872b 458 break;
K4zuki 80:3cbe7972872b 459 }
K4zuki 80:3cbe7972872b 460 default:
K4zuki 80:3cbe7972872b 461 {
K4zuki 80:3cbe7972872b 462 break;
K4zuki 80:3cbe7972872b 463 }
K4zuki 80:3cbe7972872b 464 }
K4zuki 80:3cbe7972872b 465 send[j/3] = data;
K4zuki 78:434514b8d383 466 }
K4zuki 80:3cbe7972872b 467 i += (length + 1);
K4zuki 80:3cbe7972872b 468 length /= 3;
K4zuki 80:3cbe7972872b 469 }
K4zuki 80:3cbe7972872b 470 break;
K4zuki 78:434514b8d383 471 }
K4zuki 80:3cbe7972872b 472 case CMD_I:
K4zuki 80:3cbe7972872b 473 {
K4zuki 80:3cbe7972872b 474 s = false;
K4zuki 80:3cbe7972872b 475 length = plength - 2;
K4zuki 80:3cbe7972872b 476 if(length < 1){
K4zuki 80:3cbe7972872b 477 pc.printf("bad packet! %d\n\r",length);
K4zuki 80:3cbe7972872b 478 i = plength + 1;
K4zuki 80:3cbe7972872b 479 length = 0;
K4zuki 80:3cbe7972872b 480 }else{
K4zuki 80:3cbe7972872b 481 for(int j=0; j<length; j++){
K4zuki 80:3cbe7972872b 482 address = recieve[i+1+j];
K4zuki 80:3cbe7972872b 483 _data=0;
K4zuki 80:3cbe7972872b 484 switch(address){
K4zuki 80:3cbe7972872b 485 case GPIO0_STAT:
K4zuki 80:3cbe7972872b 486 {
K4zuki 80:3cbe7972872b 487 for(int k=0; k<8; k++){
K4zuki 80:3cbe7972872b 488 _data = gpio0[k]->read();
K4zuki 80:3cbe7972872b 489 data |= (_data << k);
K4zuki 80:3cbe7972872b 490 }
K4zuki 80:3cbe7972872b 491 registers[GPIO0_STAT-'0'] = data;
K4zuki 80:3cbe7972872b 492 break;
K4zuki 80:3cbe7972872b 493 }
K4zuki 80:3cbe7972872b 494 #ifdef isGPIO1
K4zuki 80:3cbe7972872b 495 case GPIO1_STAT:
K4zuki 80:3cbe7972872b 496 {
K4zuki 80:3cbe7972872b 497 for(int k=0; k<8; k++){
K4zuki 80:3cbe7972872b 498 _data = gpio1[k]->read();
K4zuki 80:3cbe7972872b 499 data |= (_data << k);
K4zuki 80:3cbe7972872b 500 }
K4zuki 80:3cbe7972872b 501 registers[GPIO1_STAT-'0'] = data;
K4zuki 80:3cbe7972872b 502 break;
K4zuki 80:3cbe7972872b 503 }
K4zuki 80:3cbe7972872b 504 #endif
K4zuki 80:3cbe7972872b 505 default:
K4zuki 80:3cbe7972872b 506 {
K4zuki 80:3cbe7972872b 507 data = 0xAA;
K4zuki 80:3cbe7972872b 508 break;
K4zuki 80:3cbe7972872b 509 }
K4zuki 80:3cbe7972872b 510 }
K4zuki 80:3cbe7972872b 511 send[j] = (char)data;
K4zuki 80:3cbe7972872b 512 data = 0;
K4zuki 80:3cbe7972872b 513 }
K4zuki 80:3cbe7972872b 514 i += (length+1);
K4zuki 80:3cbe7972872b 515 }
K4zuki 80:3cbe7972872b 516 break;
K4zuki 80:3cbe7972872b 517 }
K4zuki 80:3cbe7972872b 518 case CMD_O:
K4zuki 80:3cbe7972872b 519 {
K4zuki 80:3cbe7972872b 520 s = false;
K4zuki 80:3cbe7972872b 521 length = plength - 2;
K4zuki 80:3cbe7972872b 522 if(length < 3){
K4zuki 80:3cbe7972872b 523 pc.printf("bad packet! %d\n\r",length);
K4zuki 80:3cbe7972872b 524 i = plength + 1;
K4zuki 80:3cbe7972872b 525 length = 0;
K4zuki 80:3cbe7972872b 526 }else{
K4zuki 80:3cbe7972872b 527 for(int j=0; j<length; j+=3){
K4zuki 80:3cbe7972872b 528 address = recieve[i+1+j];
K4zuki 80:3cbe7972872b 529 data = 0xff & (recieve[i+2+j] << 4 | (recieve[i+3+j] & 0x0F));
K4zuki 80:3cbe7972872b 530 switch(address){
K4zuki 80:3cbe7972872b 531 case GPIO0_STAT:
K4zuki 80:3cbe7972872b 532 {
K4zuki 80:3cbe7972872b 533 _data = registers[GPIO0_CONF-'0'];
K4zuki 80:3cbe7972872b 534 for(int k=0; k<8; k++){
K4zuki 80:3cbe7972872b 535 if(_data&0x01){ // output
K4zuki 80:3cbe7972872b 536 gpio0[k]->write(data&0x01);
K4zuki 80:3cbe7972872b 537 }else{ // input
K4zuki 80:3cbe7972872b 538 ; // do nothing
K4zuki 80:3cbe7972872b 539 }
K4zuki 80:3cbe7972872b 540 data >>= 1;
K4zuki 80:3cbe7972872b 541 _data >>= 1;
K4zuki 80:3cbe7972872b 542 }
K4zuki 80:3cbe7972872b 543 break;
K4zuki 80:3cbe7972872b 544 }
K4zuki 80:3cbe7972872b 545 #ifdef isGPIO1
K4zuki 80:3cbe7972872b 546 case GPIO1_STAT:
K4zuki 80:3cbe7972872b 547 {
K4zuki 80:3cbe7972872b 548 _data = registers[GPIO1_CONF-'0'];
K4zuki 80:3cbe7972872b 549 for(int k=0; k<8; k++){
K4zuki 80:3cbe7972872b 550 if(_data&0x01){ // output
K4zuki 80:3cbe7972872b 551 gpio1[k]->write(data&0x01);
K4zuki 80:3cbe7972872b 552 }else{ // input
K4zuki 80:3cbe7972872b 553 ; // do nothing
K4zuki 80:3cbe7972872b 554 }
K4zuki 80:3cbe7972872b 555 data >>= 1;
K4zuki 80:3cbe7972872b 556 _data >>= 1;
K4zuki 80:3cbe7972872b 557 }
K4zuki 80:3cbe7972872b 558 break;
K4zuki 80:3cbe7972872b 559 }
K4zuki 80:3cbe7972872b 560 #endif
K4zuki 80:3cbe7972872b 561 default:
K4zuki 80:3cbe7972872b 562 {
K4zuki 80:3cbe7972872b 563 break;
K4zuki 80:3cbe7972872b 564 }
K4zuki 80:3cbe7972872b 565 }
K4zuki 80:3cbe7972872b 566 send[j/3] = data;
K4zuki 80:3cbe7972872b 567 }
K4zuki 80:3cbe7972872b 568 }
K4zuki 80:3cbe7972872b 569 i += (length+1);
K4zuki 80:3cbe7972872b 570 length /= 3;
K4zuki 80:3cbe7972872b 571 // pc.printf("command O is not implemented, ");
K4zuki 80:3cbe7972872b 572 break;
K4zuki 80:3cbe7972872b 573 }
K4zuki 80:3cbe7972872b 574 case CMD_E:
K4zuki 80:3cbe7972872b 575 {
K4zuki 80:3cbe7972872b 576 s = false;
K4zuki 80:3cbe7972872b 577 /*
K4zuki 80:3cbe7972872b 578 "0| 1 2| 3 4| 5 6 7 8 9 10 11 12|13" //plength=14
K4zuki 80:3cbe7972872b 579 "E| 0x_0 _1| 0x_0 _0| 0x_D _E| P" //minimum plength=8
K4zuki 80:3cbe7972872b 580 "E| 0x_0 _1| 0x_0 _0| 0x_D _E|_A _D| P" //minimum plength=10(16bit)
K4zuki 80:3cbe7972872b 581 "E| 0x_0 _4| 0x_0 _0| 0x_D _E _A _D _B _E _A _F| P" //write
K4zuki 80:3cbe7972872b 582 "E| 0x_0 _4| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P" //write and read
K4zuki 80:3cbe7972872b 583 */
K4zuki 80:3cbe7972872b 584 length = plength - 2; //6
K4zuki 80:3cbe7972872b 585 if(length < 6){
K4zuki 80:3cbe7972872b 586 pc.printf("bad packet! %d\n\r",length);
K4zuki 80:3cbe7972872b 587 i = plength + 1;
K4zuki 80:3cbe7972872b 588 length = 0;
K4zuki 80:3cbe7972872b 589 }else{
K4zuki 80:3cbe7972872b 590 length = length-4; //actual data in packet
K4zuki 80:3cbe7972872b 591 data = 0xff & ((recieve[i+1]<<4) | (recieve[i+2]&0x0F)); // write length
K4zuki 80:3cbe7972872b 592 read = 0xff & ((recieve[i+3]<<4) | (recieve[i+4]&0x0F)); // read length
K4zuki 80:3cbe7972872b 593 switch(format){
K4zuki 80:3cbe7972872b 594 case 8:
K4zuki 80:3cbe7972872b 595 {
K4zuki 80:3cbe7972872b 596 _cs.write(enabled);
K4zuki 80:3cbe7972872b 597 for(int j = 0; j < length; j += 2){
K4zuki 80:3cbe7972872b 598 _data = 0xff & ((recieve[i+5+j+0]<<4) | (recieve[i+5+j+1]&0x0F));
K4zuki 80:3cbe7972872b 599 ack = _spi.write(_data);
K4zuki 85:4b1489cd5623 600 // pc.printf("s%02X,",_data);
K4zuki 80:3cbe7972872b 601 send[j/2] = ack;
K4zuki 80:3cbe7972872b 602 }
K4zuki 80:3cbe7972872b 603 for(int j = length; j < (length+2*read); j+=2){
K4zuki 80:3cbe7972872b 604 ack = _spi.write(0xAA); //dummy data to write
K4zuki 85:4b1489cd5623 605 // pc.printf("a%02X,",ack);
K4zuki 80:3cbe7972872b 606 send[j/2] = ack;
K4zuki 80:3cbe7972872b 607 }
K4zuki 80:3cbe7972872b 608 _cs.write(disabled);
K4zuki 80:3cbe7972872b 609 break;
K4zuki 80:3cbe7972872b 610 }
K4zuki 80:3cbe7972872b 611 case 16:
K4zuki 80:3cbe7972872b 612 {
K4zuki 80:3cbe7972872b 613 if((data%2) || (read%2)){ //invalid
K4zuki 80:3cbe7972872b 614 pc.printf("bad packet! %d, %d\n\r",data,read);
K4zuki 80:3cbe7972872b 615 i = plength + 1;
K4zuki 80:3cbe7972872b 616 length = 0;
K4zuki 80:3cbe7972872b 617 }else{
K4zuki 80:3cbe7972872b 618 _cs.write(enabled);
K4zuki 80:3cbe7972872b 619 for(int j = 0; j < length; j += 4){
K4zuki 85:4b1489cd5623 620 _data = 0xffff & (((recieve[i+5+j+0] & 0x0F)<<12)|
K4zuki 85:4b1489cd5623 621 ((recieve[i+5+j+1] & 0x0F)<<8 )|
K4zuki 85:4b1489cd5623 622 ((recieve[i+5+j+2] & 0x0F)<<4 )|
K4zuki 85:4b1489cd5623 623 ((recieve[i+5+j+3] & 0x0F)<<0 )
K4zuki 85:4b1489cd5623 624 );
K4zuki 85:4b1489cd5623 625 ack = _spi.write(_data);
K4zuki 85:4b1489cd5623 626 // pc.printf("s%04X,",_data);
K4zuki 85:4b1489cd5623 627 send[(j/2)+0] = 0xFF & (ack>>8);
K4zuki 85:4b1489cd5623 628 send[(j/2)+1] = 0xFF & (ack>>0);
Kazuki Yamamoto 83:f10af47696bb 629 }
Kazuki Yamamoto 83:f10af47696bb 630 for(int j = length; j < (length+2*read); j += 4){
Kazuki Yamamoto 83:f10af47696bb 631 ack = _spi.write(0xAAAA); //dummy data to write
Kazuki Yamamoto 83:f10af47696bb 632 // pc.printf("a%04X,",ack);
Kazuki Yamamoto 83:f10af47696bb 633 send[(j/2)+0] = 0xFF & (ack>>8);
Kazuki Yamamoto 83:f10af47696bb 634 send[(j/2)+1] = 0xFF & (ack>>0);
Kazuki Yamamoto 83:f10af47696bb 635 }
Kazuki Yamamoto 83:f10af47696bb 636 _cs.write(disabled);
K4zuki 80:3cbe7972872b 637 }
Kazuki Yamamoto 83:f10af47696bb 638 break;
K4zuki 80:3cbe7972872b 639 }
K4zuki 80:3cbe7972872b 640 default:
K4zuki 80:3cbe7972872b 641 {
K4zuki 80:3cbe7972872b 642 pc.printf("this shold not happen %d\n\r",format);
K4zuki 80:3cbe7972872b 643 break;
K4zuki 80:3cbe7972872b 644 }
K4zuki 80:3cbe7972872b 645 }
Kazuki Yamamoto 83:f10af47696bb 646 // pc.printf("command E is for SPI transmission\n\r");
Kazuki Yamamoto 83:f10af47696bb 647 length = read + data;
Kazuki Yamamoto 83:f10af47696bb 648 i = (plength-1);
Kazuki Yamamoto 83:f10af47696bb 649 }
Kazuki Yamamoto 83:f10af47696bb 650 break;
Kazuki Yamamoto 83:f10af47696bb 651 }
Kazuki Yamamoto 83:f10af47696bb 652 case 'Z':
Kazuki Yamamoto 83:f10af47696bb 653 {
Kazuki Yamamoto 83:f10af47696bb 654 s = false;
Kazuki Yamamoto 83:f10af47696bb 655 pc.printf("command Z is not implemented\n\r");
Kazuki Yamamoto 83:f10af47696bb 656 i=plength;
Kazuki Yamamoto 83:f10af47696bb 657 break;
K4zuki 80:3cbe7972872b 658 }
Kazuki Yamamoto 83:f10af47696bb 659 case 'V':
Kazuki Yamamoto 83:f10af47696bb 660 {
Kazuki Yamamoto 83:f10af47696bb 661 s = false;
Kazuki Yamamoto 83:f10af47696bb 662 pc.printf("command V is not implemented\n\r");
Kazuki Yamamoto 83:f10af47696bb 663 i=plength;
Kazuki Yamamoto 83:f10af47696bb 664 break;
Kazuki Yamamoto 83:f10af47696bb 665 }
Kazuki Yamamoto 83:f10af47696bb 666 default:
Kazuki Yamamoto 83:f10af47696bb 667 {
Kazuki Yamamoto 83:f10af47696bb 668 s = false;
Kazuki Yamamoto 83:f10af47696bb 669 pc.printf("command %c is not implemented\n\r", recieve[i]);
Kazuki Yamamoto 83:f10af47696bb 670 i = plength;
Kazuki Yamamoto 83:f10af47696bb 671 break;
Kazuki Yamamoto 83:f10af47696bb 672 }
K4zuki 80:3cbe7972872b 673 }
K4zuki 78:434514b8d383 674 }
Kazuki Yamamoto 83:f10af47696bb 675 i = 0;
Kazuki Yamamoto 83:f10af47696bb 676 length = 0;
K4zuki 80:3cbe7972872b 677 }
K4zuki 78:434514b8d383 678 }