John Tarasidis
/
VGA
I2S speed test wip
main.cpp@0:b847a1ffc64f, 2020-04-13 (annotated)
- Committer:
- jtarasidis
- Date:
- Mon Apr 13 14:01:48 2020 +0000
- Revision:
- 0:b847a1ffc64f
- Child:
- 1:3c1ad60f5cf3
stuck on i2s config
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
jtarasidis | 0:b847a1ffc64f | 1 | #include "mbed.h" |
jtarasidis | 0:b847a1ffc64f | 2 | //#include "SDFileSystem" |
jtarasidis | 0:b847a1ffc64f | 3 | //#include "FastIO.h" |
jtarasidis | 0:b847a1ffc64f | 4 | #include "MODDMA.h" |
jtarasidis | 0:b847a1ffc64f | 5 | |
jtarasidis | 0:b847a1ffc64f | 6 | |
jtarasidis | 0:b847a1ffc64f | 7 | void pllfeed() { |
jtarasidis | 0:b847a1ffc64f | 8 | __disable_irq(); |
jtarasidis | 0:b847a1ffc64f | 9 | LPC_SC->PLL0FEED=0x000000aa; |
jtarasidis | 0:b847a1ffc64f | 10 | LPC_SC->PLL0FEED=0x00000055; |
jtarasidis | 0:b847a1ffc64f | 11 | __enable_irq(); |
jtarasidis | 0:b847a1ffc64f | 12 | } |
jtarasidis | 0:b847a1ffc64f | 13 | void setpll() { |
jtarasidis | 0:b847a1ffc64f | 14 | // the MBED crystal oscillator is 12 MHz |
jtarasidis | 0:b847a1ffc64f | 15 | // main oscillator frequency 300 MHz: M = (300 x N) / (2 x 12) |
jtarasidis | 0:b847a1ffc64f | 16 | int n=2; |
jtarasidis | 0:b847a1ffc64f | 17 | int m=25; |
jtarasidis | 0:b847a1ffc64f | 18 | // processor clock 100 MHz = 300 MHz / D |
jtarasidis | 0:b847a1ffc64f | 19 | int d=3; |
jtarasidis | 0:b847a1ffc64f | 20 | // disconnect |
jtarasidis | 0:b847a1ffc64f | 21 | LPC_SC->PLL0CON=0x00000001; pllfeed(); |
jtarasidis | 0:b847a1ffc64f | 22 | // disable |
jtarasidis | 0:b847a1ffc64f | 23 | LPC_SC->PLL0CON=0x00000000; pllfeed(); |
jtarasidis | 0:b847a1ffc64f | 24 | // set new PLL values |
jtarasidis | 0:b847a1ffc64f | 25 | LPC_SC->PLL0CFG=((n-1)<<16)|(m-1); pllfeed(); |
jtarasidis | 0:b847a1ffc64f | 26 | // enable |
jtarasidis | 0:b847a1ffc64f | 27 | LPC_SC->PLL0CON=0x00000001; pllfeed(); |
jtarasidis | 0:b847a1ffc64f | 28 | // set cpu clock divider |
jtarasidis | 0:b847a1ffc64f | 29 | LPC_SC->CCLKCFG=d-1; |
jtarasidis | 0:b847a1ffc64f | 30 | // wait for lock |
jtarasidis | 0:b847a1ffc64f | 31 | while (LPC_SC->PLL0STAT&0x04000000==0); |
jtarasidis | 0:b847a1ffc64f | 32 | // connect |
jtarasidis | 0:b847a1ffc64f | 33 | LPC_SC->PLL0CON=0x00000003; pllfeed(); |
jtarasidis | 0:b847a1ffc64f | 34 | } |
jtarasidis | 0:b847a1ffc64f | 35 | |
jtarasidis | 0:b847a1ffc64f | 36 | |
jtarasidis | 0:b847a1ffc64f | 37 | DigitalOut led1(LED1); |
jtarasidis | 0:b847a1ffc64f | 38 | DigitalOut led2(LED2); |
jtarasidis | 0:b847a1ffc64f | 39 | |
jtarasidis | 0:b847a1ffc64f | 40 | MODDMA dma; |
jtarasidis | 0:b847a1ffc64f | 41 | |
jtarasidis | 0:b847a1ffc64f | 42 | void TC0_callback(void) { |
jtarasidis | 0:b847a1ffc64f | 43 | led1 = 1; |
jtarasidis | 0:b847a1ffc64f | 44 | } |
jtarasidis | 0:b847a1ffc64f | 45 | |
jtarasidis | 0:b847a1ffc64f | 46 | Serial test(p13, p14); |
jtarasidis | 0:b847a1ffc64f | 47 | |
jtarasidis | 0:b847a1ffc64f | 48 | int main() { |
jtarasidis | 0:b847a1ffc64f | 49 | setpll(); |
jtarasidis | 0:b847a1ffc64f | 50 | pllfeed(); |
jtarasidis | 0:b847a1ffc64f | 51 | |
jtarasidis | 0:b847a1ffc64f | 52 | char s[] = "I2S CCLK/4 Verification Test"; |
jtarasidis | 0:b847a1ffc64f | 53 | |
jtarasidis | 0:b847a1ffc64f | 54 | //turn on i2s periph |
jtarasidis | 0:b847a1ffc64f | 55 | LPC_SC -> PCONP |= (1 << 27); |
jtarasidis | 0:b847a1ffc64f | 56 | |
jtarasidis | 0:b847a1ffc64f | 57 | //set PCLK_peripheral = CCLK/2; such that bitstream is CCLK/4 |
jtarasidis | 0:b847a1ffc64f | 58 | LPC_SC -> PCLKSEL1 |= (2 << 22); |
jtarasidis | 0:b847a1ffc64f | 59 | |
jtarasidis | 0:b847a1ffc64f | 60 | //monaural format; master mode |
jtarasidis | 0:b847a1ffc64f | 61 | LPC_I2S -> I2SDAO |= (0x8); |
jtarasidis | 0:b847a1ffc64f | 62 | |
jtarasidis | 0:b847a1ffc64f | 63 | //connect i2s channel 0 tx to dma |
jtarasidis | 0:b847a1ffc64f | 64 | LPC_I2S -> I2SDMA1 |= (0x80002); |
jtarasidis | 0:b847a1ffc64f | 65 | |
jtarasidis | 0:b847a1ffc64f | 66 | //select p5 pin for i2s tx |
jtarasidis | 0:b847a1ffc64f | 67 | LPC_PINCON -> PINSEL0 |= (1 << 18); |
jtarasidis | 0:b847a1ffc64f | 68 | |
jtarasidis | 0:b847a1ffc64f | 69 | |
jtarasidis | 0:b847a1ffc64f | 70 | MODDMA_Config *config = new MODDMA_Config; |
jtarasidis | 0:b847a1ffc64f | 71 | config |
jtarasidis | 0:b847a1ffc64f | 72 | ->channelNum ( MODDMA::Channel_0 ) |
jtarasidis | 0:b847a1ffc64f | 73 | ->srcMemAddr ( (uint32_t) &s ) |
jtarasidis | 0:b847a1ffc64f | 74 | ->dstMemAddr ( 0 ) |
jtarasidis | 0:b847a1ffc64f | 75 | ->transferSize ( sizeof(s) ) |
jtarasidis | 0:b847a1ffc64f | 76 | ->transferType ( MODDMA::m2p ) |
jtarasidis | 0:b847a1ffc64f | 77 | ->transferWidth ( 8 ) |
jtarasidis | 0:b847a1ffc64f | 78 | ->srcConn ( 0 ) |
jtarasidis | 0:b847a1ffc64f | 79 | ->dstConn ( MODDMA::I2S_Channel_0 ) |
jtarasidis | 0:b847a1ffc64f | 80 | ->dmaLLI ( 0 ) |
jtarasidis | 0:b847a1ffc64f | 81 | ->attach_tc ( &TC0_callback ) |
jtarasidis | 0:b847a1ffc64f | 82 | ; |
jtarasidis | 0:b847a1ffc64f | 83 | |
jtarasidis | 0:b847a1ffc64f | 84 | dma.Setup(config); |
jtarasidis | 0:b847a1ffc64f | 85 | dma.Enable(config); |
jtarasidis | 0:b847a1ffc64f | 86 | while(1) { |
jtarasidis | 0:b847a1ffc64f | 87 | printf("%d ;", LPC_I2S -> I2SSTATE); |
jtarasidis | 0:b847a1ffc64f | 88 | wait(0.5); |
jtarasidis | 0:b847a1ffc64f | 89 | } |
jtarasidis | 0:b847a1ffc64f | 90 | } |
jtarasidis | 0:b847a1ffc64f | 91 |