LAN2CAN Test

Committer:
jsoh91
Date:
Wed Oct 30 06:26:56 2019 +0000
Revision:
1:309149d38e77
Parent:
0:e367ec7e677f
CAN problem fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jsoh91 1:309149d38e77 1 //#if !FEATURE_LWIP
jsoh91 1:309149d38e77 2 //#error [NOT_SUPPORTED] LWIP not supported for this target
jsoh91 1:309149d38e77 3 //#endif
jsoh91 0:e367ec7e677f 4
jsoh91 0:e367ec7e677f 5
jsoh91 0:e367ec7e677f 6 #include "mbed.h"
jsoh91 1:309149d38e77 7 //#include "EthernetInterface.h"
jsoh91 0:e367ec7e677f 8
jsoh91 0:e367ec7e677f 9 #define IP "10.12.3.26"
jsoh91 0:e367ec7e677f 10 #define NETMASK "255.255.255.0"
jsoh91 0:e367ec7e677f 11 #define GATEWAY "192.168.137.1"
jsoh91 0:e367ec7e677f 12
jsoh91 0:e367ec7e677f 13 #define serv_IP "10.12.3.25"
jsoh91 0:e367ec7e677f 14
jsoh91 1:309149d38e77 15 #define TMR3_COUNT 21800 // loop 5k , for stm32f767zi
jsoh91 1:309149d38e77 16 #define TMR3_COUNT 10900 // loop 10k , for stm32f767zi
jsoh91 1:309149d38e77 17 //#define TMR3_COUNT 18000 // loop 5k , for stm32f446re
jsoh91 1:309149d38e77 18 //#define TMR3_COUNT 9000 // loop 10k , for stm32f446re
jsoh91 0:e367ec7e677f 19
jsoh91 0:e367ec7e677f 20 #include <cstdlib>
jsoh91 0:e367ec7e677f 21 #include <iostream>
jsoh91 0:e367ec7e677f 22
jsoh91 0:e367ec7e677f 23 using namespace std;
jsoh91 0:e367ec7e677f 24
jsoh91 0:e367ec7e677f 25 float calc_time = 0.0f;
jsoh91 1:309149d38e77 26
jsoh91 0:e367ec7e677f 27 Timer t;
jsoh91 0:e367ec7e677f 28
jsoh91 1:309149d38e77 29 //DigitalOut tpin(PC_8);
jsoh91 0:e367ec7e677f 30
jsoh91 0:e367ec7e677f 31
jsoh91 0:e367ec7e677f 32
jsoh91 0:e367ec7e677f 33 void Init_TMR3()
jsoh91 0:e367ec7e677f 34 {
jsoh91 0:e367ec7e677f 35
jsoh91 0:e367ec7e677f 36
jsoh91 0:e367ec7e677f 37 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // enable TIM3 clock
jsoh91 0:e367ec7e677f 38
jsoh91 0:e367ec7e677f 39 //ISR Setup
jsoh91 0:e367ec7e677f 40
jsoh91 0:e367ec7e677f 41 NVIC_EnableIRQ(TIM3_IRQn); //Enable TIM3 IRQ
jsoh91 0:e367ec7e677f 42
jsoh91 0:e367ec7e677f 43 TIM3->DIER |= TIM_DIER_UIE; // enable update interrupt
jsoh91 0:e367ec7e677f 44 TIM3->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode
jsoh91 0:e367ec7e677f 45 TIM3->CR1 |= TIM_CR1_UDIS;
jsoh91 0:e367ec7e677f 46 TIM3->CR1 |= TIM_CR1_ARPE; // autoreload on,
jsoh91 0:e367ec7e677f 47 TIM3->RCR |= 0x001; // update event once per up/down count of TIM3
jsoh91 0:e367ec7e677f 48 TIM3->EGR |= TIM_EGR_UG;
jsoh91 0:e367ec7e677f 49
jsoh91 1:309149d38e77 50 TIM3->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock
jsoh91 0:e367ec7e677f 51 TIM3->ARR = TMR3_COUNT; // set auto reload, 5 khz
jsoh91 0:e367ec7e677f 52 TIM3->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on.
jsoh91 0:e367ec7e677f 53 TIM3->CR1 |= TIM_CR1_CEN; // enable TIM4
jsoh91 0:e367ec7e677f 54 }
jsoh91 0:e367ec7e677f 55
jsoh91 1:309149d38e77 56 //CAN can(PB_8, PB_9); //for stm32f446re
jsoh91 0:e367ec7e677f 57
jsoh91 1:309149d38e77 58 CAN can(PD_0, PD_1); // CAN Rx pin name, CAN Tx pin name, for stm32f767zi
jsoh91 1:309149d38e77 59 CANMessage rxMsg;
jsoh91 1:309149d38e77 60 CANMessage txMsg;
jsoh91 1:309149d38e77 61
jsoh91 1:309149d38e77 62 void onMsgReceived()
jsoh91 1:309149d38e77 63 {
jsoh91 1:309149d38e77 64 //msgAvailable = true;
jsoh91 1:309149d38e77 65 // printf("%df\n\r", rxMsg.id);
jsoh91 1:309149d38e77 66 can.read(rxMsg);
jsoh91 1:309149d38e77 67 if((rxMsg.id == 20)) {
jsoh91 1:309149d38e77 68
jsoh91 1:309149d38e77 69
jsoh91 1:309149d38e77 70
jsoh91 1:309149d38e77 71 can.write(txMsg);
jsoh91 1:309149d38e77 72
jsoh91 1:309149d38e77 73
jsoh91 1:309149d38e77 74 // controller.timeout = 0;
jsoh91 1:309149d38e77 75 // if(((rxMsg.data[0]==0xFF) & (rxMsg.data[1]==0xFF) & (rxMsg.data[2]==0xFF) & (rxMsg.data[3]==0xFF) & (rxMsg.data[4]==0xFF) & (rxMsg.data[5]==0xFF) & (rxMsg.data[6]==0xFF) & (rxMsg.data[7]==0xFC))){
jsoh91 1:309149d38e77 76 // state = MOTOR_MODE;
jsoh91 1:309149d38e77 77 // state_change = 1;
jsoh91 1:309149d38e77 78 // }
jsoh91 1:309149d38e77 79 // else if(((rxMsg.data[0]==0xFF) & (rxMsg.data[1]==0xFF) & (rxMsg.data[2]==0xFF) & (rxMsg.data[3]==0xFF) * (rxMsg.data[4]==0xFF) & (rxMsg.data[5]==0xFF) & (rxMsg.data[6]==0xFF) & (rxMsg.data[7]==0xFD))){
jsoh91 1:309149d38e77 80 // state = REST_MODE;
jsoh91 1:309149d38e77 81 // state_change = 1;
jsoh91 1:309149d38e77 82 // gpio.led->write(0);;
jsoh91 1:309149d38e77 83 // }
jsoh91 1:309149d38e77 84 // else if(((rxMsg.data[0]==0xFF) & (rxMsg.data[1]==0xFF) & (rxMsg.data[2]==0xFF) & (rxMsg.data[3]==0xFF) * (rxMsg.data[4]==0xFF) & (rxMsg.data[5]==0xFF) & (rxMsg.data[6]==0xFF) & (rxMsg.data[7]==0xFE))){
jsoh91 1:309149d38e77 85 // spi.ZeroPosition();
jsoh91 1:309149d38e77 86 // }
jsoh91 1:309149d38e77 87 // else if(state == MOTOR_MODE){
jsoh91 1:309149d38e77 88 // unpack_cmd(rxMsg, &controller);
jsoh91 1:309149d38e77 89 // }
jsoh91 1:309149d38e77 90 // pack_reply(&txMsg, controller.theta_mech, controller.dtheta_mech, controller.i_q_filt*KT_OUT);
jsoh91 1:309149d38e77 91 // can.write(txMsg);
jsoh91 1:309149d38e77 92 }
jsoh91 1:309149d38e77 93
jsoh91 1:309149d38e77 94 }
jsoh91 1:309149d38e77 95
jsoh91 1:309149d38e77 96 extern "C" void TIM3_IRQHandler(void)
jsoh91 1:309149d38e77 97 {
jsoh91 1:309149d38e77 98 if ( TIM3->SR & TIM_SR_UIF ) {
jsoh91 1:309149d38e77 99
jsoh91 1:309149d38e77 100 can.write(txMsg);
jsoh91 1:309149d38e77 101
jsoh91 1:309149d38e77 102 // if(tpin == 1)
jsoh91 1:309149d38e77 103 // tpin = 0;
jsoh91 1:309149d38e77 104 // else
jsoh91 1:309149d38e77 105 // tpin = 1;
jsoh91 1:309149d38e77 106
jsoh91 1:309149d38e77 107 }
jsoh91 1:309149d38e77 108 TIM3->SR = 0x0;
jsoh91 1:309149d38e77 109 }
jsoh91 0:e367ec7e677f 110 int main()
jsoh91 0:e367ec7e677f 111 {
jsoh91 1:309149d38e77 112
jsoh91 1:309149d38e77 113 // NVIC_SetPriority(CAN1_RX0_IRQn, 3);
jsoh91 1:309149d38e77 114 // can.filter(20, 0xFFE00004, CANStandard, 0);
jsoh91 1:309149d38e77 115
jsoh91 1:309149d38e77 116 // txMsg.id = CAN_MASTER;
jsoh91 1:309149d38e77 117 // txMsg.len = 6;
jsoh91 1:309149d38e77 118 rxMsg.len = 4;
jsoh91 1:309149d38e77 119 txMsg.len = 4;
jsoh91 1:309149d38e77 120 txMsg.id = 10;
jsoh91 1:309149d38e77 121 txMsg.data[0] = 'a';
jsoh91 1:309149d38e77 122 txMsg.data[1] = 'b';
jsoh91 1:309149d38e77 123 txMsg.data[2] = 'c';
jsoh91 1:309149d38e77 124 txMsg.data[3] = 'd';
jsoh91 1:309149d38e77 125 can.attach(&onMsgReceived); // attach 'CAN receive-complete' interrupt handler
jsoh91 1:309149d38e77 126 NVIC_SetPriority(CAN1_RX0_IRQn, 3);
jsoh91 1:309149d38e77 127 can.filter(20,0xFFF00,CANStandard,0);
jsoh91 1:309149d38e77 128
jsoh91 1:309149d38e77 129 if(!can.frequency(1000000))
jsoh91 1:309149d38e77 130 cout << "CAN freq setting fail !" << endl;
jsoh91 1:309149d38e77 131 else
jsoh91 1:309149d38e77 132 cout << "CAN 1Mbps setting OK !" << endl;
jsoh91 1:309149d38e77 133
jsoh91 0:e367ec7e677f 134 Init_TMR3();
jsoh91 0:e367ec7e677f 135 TIM3->CR1 ^= TIM_CR1_UDIS;
jsoh91 0:e367ec7e677f 136 NVIC_SetPriority(TIM3_IRQn, 2);
jsoh91 1:309149d38e77 137
jsoh91 1:309149d38e77 138
jsoh91 1:309149d38e77 139 //
jsoh91 1:309149d38e77 140 // t.reset();
jsoh91 1:309149d38e77 141 // t.start();
jsoh91 0:e367ec7e677f 142 //
jsoh91 0:e367ec7e677f 143 // wait(1.0);
jsoh91 0:e367ec7e677f 144 // printf("Basic HTTP client example\n");
jsoh91 0:e367ec7e677f 145 //
jsoh91 0:e367ec7e677f 146 // EthernetInterface eth;
jsoh91 0:e367ec7e677f 147 // eth.set_network(IP, NETMASK, GATEWAY);
jsoh91 0:e367ec7e677f 148 // eth.connect();
jsoh91 0:e367ec7e677f 149 ////
jsoh91 0:e367ec7e677f 150 //// int eth_state = eth.connect();
jsoh91 0:e367ec7e677f 151 ////
jsoh91 0:e367ec7e677f 152 // printf("The target IP address is '%s'\n", eth.get_ip_address());
jsoh91 0:e367ec7e677f 153 //
jsoh91 0:e367ec7e677f 154 // TCPSocket clt_sock;
jsoh91 0:e367ec7e677f 155 // clt_sock.open(&eth);
jsoh91 0:e367ec7e677f 156 // clt_sock.connect(serv_IP,80);
jsoh91 0:e367ec7e677f 157 //
jsoh91 0:e367ec7e677f 158 // // UDPSocket clt_sock;
jsoh91 0:e367ec7e677f 159 //// clt_sock.open(&eth);
jsoh91 0:e367ec7e677f 160 ////// clt_sock.connect("192.168.137.25",80);
jsoh91 0:e367ec7e677f 161 //
jsoh91 0:e367ec7e677f 162 //// SocketAddress serv_IP;
jsoh91 0:e367ec7e677f 163 //
jsoh91 0:e367ec7e677f 164 // char tbuffer[] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa";
jsoh91 0:e367ec7e677f 165 // char rbuffer[128];
jsoh91 0:e367ec7e677f 166
jsoh91 0:e367ec7e677f 167 while (true) {
jsoh91 1:309149d38e77 168
jsoh91 1:309149d38e77 169 // cout << "result : " << result << endl;
jsoh91 1:309149d38e77 170 // wait(1.0f);
jsoh91 1:309149d38e77 171 //
jsoh91 1:309149d38e77 172 // cout << "t : " << calc_time << endl;
jsoh91 1:309149d38e77 173 // wait(0.2f);
jsoh91 0:e367ec7e677f 174
jsoh91 0:e367ec7e677f 175
jsoh91 0:e367ec7e677f 176
jsoh91 0:e367ec7e677f 177 // t.reset();
jsoh91 0:e367ec7e677f 178 // t.start();
jsoh91 0:e367ec7e677f 179 // clt_sock.send(tbuffer, strlen(tbuffer));
jsoh91 0:e367ec7e677f 180 // t.stop();
jsoh91 0:e367ec7e677f 181 // printf("send time: %f\n",t.read()*1000.0f);
jsoh91 0:e367ec7e677f 182 //
jsoh91 0:e367ec7e677f 183 // t.reset();
jsoh91 0:e367ec7e677f 184 // t.start();
jsoh91 0:e367ec7e677f 185 // clt_sock.recv(rbuffer,50);
jsoh91 0:e367ec7e677f 186 // t.stop();
jsoh91 0:e367ec7e677f 187 // printf("recv time: %f\n",t.read()*1000.0f);
jsoh91 0:e367ec7e677f 188
jsoh91 0:e367ec7e677f 189 }
jsoh91 0:e367ec7e677f 190 }