Jasper Sikken / Mbed 2 deprecated HeartRate

This program displays heart rate and time between heart beats on LCD, prints it to a USB serial port, print it to a bluetooth serial port and store it on a USB mass storage device. The program has two interrupt routines: 1.Every 1ms a counter is increased with one, 2. On every heart beat the counter is value copied. In the main loop the beats per minute are calculated. Ext.Modules:- Polar RMCM-01 heart rate module connected to pin8. - 2x16 LCD - a RF-BT0417CB bluetooth serial device connected to p27 and p28 - an USB mass storage device

Dependencies:   TextLCD mbed

USBHostLite/usbhost_lpc17xx.h@2:e660e68a91fa, 2011-01-04 (annotated)

Committer:
jrsikken
Date:
Tue Jan 04 21:33:59 2011 +0000
Revision:
2:e660e68a91fa
Parent:
1:8b001f936bb0 
Now the heart rate is also send over a serial port to a bluetooth device.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jrsikken 1:8b001f936bb0 1 /*
jrsikken 1:8b001f936bb0 2 **************************************************************************************************************
jrsikken 1:8b001f936bb0 3 * NXP USB Host Stack
jrsikken 1:8b001f936bb0 4 *
jrsikken 1:8b001f936bb0 5 * (c) Copyright 2008, NXP SemiConductors
jrsikken 1:8b001f936bb0 6 * (c) Copyright 2008, OnChip Technologies LLC
jrsikken 1:8b001f936bb0 7 * All Rights Reserved
jrsikken 1:8b001f936bb0 8 *
jrsikken 1:8b001f936bb0 9 * www.nxp.com
jrsikken 1:8b001f936bb0 10 * www.onchiptech.com
jrsikken 1:8b001f936bb0 11 *
jrsikken 1:8b001f936bb0 12 * File : usbhost_lpc17xx.h
jrsikken 1:8b001f936bb0 13 * Programmer(s) : Ravikanth.P
jrsikken 1:8b001f936bb0 14 * Version :
jrsikken 1:8b001f936bb0 15 *
jrsikken 1:8b001f936bb0 16 **************************************************************************************************************
jrsikken 1:8b001f936bb0 17 */
jrsikken 1:8b001f936bb0 18
jrsikken 1:8b001f936bb0 19 #ifndef USBHOST_LPC17xx_H
jrsikken 1:8b001f936bb0 20 #define USBHOST_LPC17xx_H
jrsikken 1:8b001f936bb0 21
jrsikken 1:8b001f936bb0 22 /*
jrsikken 1:8b001f936bb0 23 **************************************************************************************************************
jrsikken 1:8b001f936bb0 24 * INCLUDE HEADER FILES
jrsikken 1:8b001f936bb0 25 **************************************************************************************************************
jrsikken 1:8b001f936bb0 26 */
jrsikken 1:8b001f936bb0 27
jrsikken 1:8b001f936bb0 28 #include "usbhost_inc.h"
jrsikken 1:8b001f936bb0 29
jrsikken 1:8b001f936bb0 30 /*
jrsikken 1:8b001f936bb0 31 **************************************************************************************************************
jrsikken 1:8b001f936bb0 32 * PRINT CONFIGURATION
jrsikken 1:8b001f936bb0 33 **************************************************************************************************************
jrsikken 1:8b001f936bb0 34 */
jrsikken 1:8b001f936bb0 35
jrsikken 1:8b001f936bb0 36 #define PRINT_ENABLE 1
jrsikken 1:8b001f936bb0 37
jrsikken 1:8b001f936bb0 38 #if PRINT_ENABLE
jrsikken 1:8b001f936bb0 39 #define PRINT_Log(...) printf(__VA_ARGS__)
jrsikken 1:8b001f936bb0 40 #define PRINT_Err(rc) printf("ERROR: In %s at Line %u - rc = %d\n", __FUNCTION__, __LINE__, rc)
jrsikken 1:8b001f936bb0 41
jrsikken 1:8b001f936bb0 42 #else
jrsikken 1:8b001f936bb0 43 #define PRINT_Log(...) do {} while(0)
jrsikken 1:8b001f936bb0 44 #define PRINT_Err(rc) do {} while(0)
jrsikken 1:8b001f936bb0 45
jrsikken 1:8b001f936bb0 46 #endif
jrsikken 1:8b001f936bb0 47
jrsikken 1:8b001f936bb0 48 /*
jrsikken 1:8b001f936bb0 49 **************************************************************************************************************
jrsikken 1:8b001f936bb0 50 * GENERAL DEFINITIONS
jrsikken 1:8b001f936bb0 51 **************************************************************************************************************
jrsikken 1:8b001f936bb0 52 */
jrsikken 1:8b001f936bb0 53
jrsikken 1:8b001f936bb0 54 #define DESC_LENGTH(x) x[0]
jrsikken 1:8b001f936bb0 55 #define DESC_TYPE(x) x[1]
jrsikken 1:8b001f936bb0 56
jrsikken 1:8b001f936bb0 57
jrsikken 1:8b001f936bb0 58 #define HOST_GET_DESCRIPTOR(descType, descIndex, data, length) \
jrsikken 1:8b001f936bb0 59 Host_CtrlRecv(USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, GET_DESCRIPTOR, \
jrsikken 1:8b001f936bb0 60 (descType << 8)|(descIndex), 0, length, data)
jrsikken 1:8b001f936bb0 61
jrsikken 1:8b001f936bb0 62 #define HOST_SET_ADDRESS(new_addr) \
jrsikken 1:8b001f936bb0 63 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_ADDRESS, \
jrsikken 1:8b001f936bb0 64 new_addr, 0, 0, NULL)
jrsikken 1:8b001f936bb0 65
jrsikken 1:8b001f936bb0 66 #define USBH_SET_CONFIGURATION(configNum) \
jrsikken 1:8b001f936bb0 67 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_CONFIGURATION, \
jrsikken 1:8b001f936bb0 68 configNum, 0, 0, NULL)
jrsikken 1:8b001f936bb0 69
jrsikken 1:8b001f936bb0 70 #define USBH_SET_INTERFACE(ifNum, altNum) \
jrsikken 1:8b001f936bb0 71 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_INTERFACE, SET_INTERFACE, \
jrsikken 1:8b001f936bb0 72 altNum, ifNum, 0, NULL)
jrsikken 1:8b001f936bb0 73
jrsikken 1:8b001f936bb0 74 /*
jrsikken 1:8b001f936bb0 75 **************************************************************************************************************
jrsikken 1:8b001f936bb0 76 * OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
jrsikken 1:8b001f936bb0 77 **************************************************************************************************************
jrsikken 1:8b001f936bb0 78 */
jrsikken 1:8b001f936bb0 79
jrsikken 1:8b001f936bb0 80 /* ------------------ HcControl Register --------------------- */
jrsikken 1:8b001f936bb0 81 #define OR_CONTROL_CLE 0x00000010
jrsikken 1:8b001f936bb0 82 #define OR_CONTROL_BLE 0x00000020
jrsikken 1:8b001f936bb0 83 #define OR_CONTROL_HCFS 0x000000C0
jrsikken 1:8b001f936bb0 84 #define OR_CONTROL_HC_OPER 0x00000080
jrsikken 1:8b001f936bb0 85 /* ----------------- HcCommandStatus Register ----------------- */
jrsikken 1:8b001f936bb0 86 #define OR_CMD_STATUS_HCR 0x00000001
jrsikken 1:8b001f936bb0 87 #define OR_CMD_STATUS_CLF 0x00000002
jrsikken 1:8b001f936bb0 88 #define OR_CMD_STATUS_BLF 0x00000004
jrsikken 1:8b001f936bb0 89 /* --------------- HcInterruptStatus Register ----------------- */
jrsikken 1:8b001f936bb0 90 #define OR_INTR_STATUS_WDH 0x00000002
jrsikken 1:8b001f936bb0 91 #define OR_INTR_STATUS_RHSC 0x00000040
jrsikken 1:8b001f936bb0 92 /* --------------- HcInterruptEnable Register ----------------- */
jrsikken 1:8b001f936bb0 93 #define OR_INTR_ENABLE_WDH 0x00000002
jrsikken 1:8b001f936bb0 94 #define OR_INTR_ENABLE_RHSC 0x00000040
jrsikken 1:8b001f936bb0 95 #define OR_INTR_ENABLE_MIE 0x80000000
jrsikken 1:8b001f936bb0 96 /* ---------------- HcRhDescriptorA Register ------------------ */
jrsikken 1:8b001f936bb0 97 #define OR_RH_STATUS_LPSC 0x00010000
jrsikken 1:8b001f936bb0 98 #define OR_RH_STATUS_DRWE 0x00008000
jrsikken 1:8b001f936bb0 99 /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
jrsikken 1:8b001f936bb0 100 #define OR_RH_PORT_CCS 0x00000001
jrsikken 1:8b001f936bb0 101 #define OR_RH_PORT_PRS 0x00000010
jrsikken 1:8b001f936bb0 102 #define OR_RH_PORT_CSC 0x00010000
jrsikken 1:8b001f936bb0 103 #define OR_RH_PORT_PRSC 0x00100000
jrsikken 1:8b001f936bb0 104
jrsikken 1:8b001f936bb0 105
jrsikken 1:8b001f936bb0 106 /*
jrsikken 1:8b001f936bb0 107 **************************************************************************************************************
jrsikken 1:8b001f936bb0 108 * FRAME INTERVAL
jrsikken 1:8b001f936bb0 109 **************************************************************************************************************
jrsikken 1:8b001f936bb0 110 */
jrsikken 1:8b001f936bb0 111
jrsikken 1:8b001f936bb0 112 #define FI 0x2EDF /* 12000 bits per frame (-1) */
jrsikken 1:8b001f936bb0 113 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
jrsikken 1:8b001f936bb0 114
jrsikken 1:8b001f936bb0 115 /*
jrsikken 1:8b001f936bb0 116 **************************************************************************************************************
jrsikken 1:8b001f936bb0 117 * TRANSFER DESCRIPTOR CONTROL FIELDS
jrsikken 1:8b001f936bb0 118 **************************************************************************************************************
jrsikken 1:8b001f936bb0 119 */
jrsikken 1:8b001f936bb0 120
jrsikken 1:8b001f936bb0 121 #define TD_ROUNDING (USB_INT32U) (0x00040000) /* Buffer Rounding */
jrsikken 1:8b001f936bb0 122 #define TD_SETUP (USB_INT32U)(0) /* Direction of Setup Packet */
jrsikken 1:8b001f936bb0 123 #define TD_IN (USB_INT32U)(0x00100000) /* Direction In */
jrsikken 1:8b001f936bb0 124 #define TD_OUT (USB_INT32U)(0x00080000) /* Direction Out */
jrsikken 1:8b001f936bb0 125 #define TD_DELAY_INT(x) (USB_INT32U)((x) << 21) /* Delay Interrupt */
jrsikken 1:8b001f936bb0 126 #define TD_TOGGLE_0 (USB_INT32U)(0x02000000) /* Toggle 0 */
jrsikken 1:8b001f936bb0 127 #define TD_TOGGLE_1 (USB_INT32U)(0x03000000) /* Toggle 1 */
jrsikken 1:8b001f936bb0 128 #define TD_CC (USB_INT32U)(0xF0000000) /* Completion Code */
jrsikken 1:8b001f936bb0 129
jrsikken 1:8b001f936bb0 130 /*
jrsikken 1:8b001f936bb0 131 **************************************************************************************************************
jrsikken 1:8b001f936bb0 132 * USB STANDARD REQUEST DEFINITIONS
jrsikken 1:8b001f936bb0 133 **************************************************************************************************************
jrsikken 1:8b001f936bb0 134 */
jrsikken 1:8b001f936bb0 135
jrsikken 1:8b001f936bb0 136 #define USB_DESCRIPTOR_TYPE_DEVICE 1
jrsikken 1:8b001f936bb0 137 #define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
jrsikken 1:8b001f936bb0 138 #define USB_DESCRIPTOR_TYPE_INTERFACE 4
jrsikken 1:8b001f936bb0 139 #define USB_DESCRIPTOR_TYPE_ENDPOINT 5
jrsikken 1:8b001f936bb0 140 /* ----------- Control RequestType Fields ----------- */
jrsikken 1:8b001f936bb0 141 #define USB_DEVICE_TO_HOST 0x80
jrsikken 1:8b001f936bb0 142 #define USB_HOST_TO_DEVICE 0x00
jrsikken 1:8b001f936bb0 143 #define USB_REQUEST_TYPE_CLASS 0x20
jrsikken 1:8b001f936bb0 144 #define USB_RECIPIENT_DEVICE 0x00
jrsikken 1:8b001f936bb0 145 #define USB_RECIPIENT_INTERFACE 0x01
jrsikken 1:8b001f936bb0 146 /* -------------- USB Standard Requests -------------- */
jrsikken 1:8b001f936bb0 147 #define SET_ADDRESS 5
jrsikken 1:8b001f936bb0 148 #define GET_DESCRIPTOR 6
jrsikken 1:8b001f936bb0 149 #define SET_CONFIGURATION 9
jrsikken 1:8b001f936bb0 150 #define SET_INTERFACE 11
jrsikken 1:8b001f936bb0 151
jrsikken 1:8b001f936bb0 152 /*
jrsikken 1:8b001f936bb0 153 **************************************************************************************************************
jrsikken 1:8b001f936bb0 154 * TYPE DEFINITIONS
jrsikken 1:8b001f936bb0 155 **************************************************************************************************************
jrsikken 1:8b001f936bb0 156 */
jrsikken 1:8b001f936bb0 157
jrsikken 1:8b001f936bb0 158 typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
jrsikken 1:8b001f936bb0 159 volatile USB_INT32U Control; /* Endpoint descriptor control */
jrsikken 1:8b001f936bb0 160 volatile USB_INT32U TailTd; /* Physical address of tail in Transfer descriptor list */
jrsikken 1:8b001f936bb0 161 volatile USB_INT32U HeadTd; /* Physcial address of head in Transfer descriptor list */
jrsikken 1:8b001f936bb0 162 volatile USB_INT32U Next; /* Physical address of next Endpoint descriptor */
jrsikken 1:8b001f936bb0 163 } HCED;
jrsikken 1:8b001f936bb0 164
jrsikken 1:8b001f936bb0 165 typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
jrsikken 1:8b001f936bb0 166 volatile USB_INT32U Control; /* Transfer descriptor control */
jrsikken 1:8b001f936bb0 167 volatile USB_INT32U CurrBufPtr; /* Physical address of current buffer pointer */
jrsikken 1:8b001f936bb0 168 volatile USB_INT32U Next; /* Physical pointer to next Transfer Descriptor */
jrsikken 1:8b001f936bb0 169 volatile USB_INT32U BufEnd; /* Physical address of end of buffer */
jrsikken 1:8b001f936bb0 170 } HCTD;
jrsikken 1:8b001f936bb0 171
jrsikken 1:8b001f936bb0 172 typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
jrsikken 1:8b001f936bb0 173 volatile USB_INT32U IntTable[32]; /* Interrupt Table */
jrsikken 1:8b001f936bb0 174 volatile USB_INT32U FrameNumber; /* Frame Number */
jrsikken 1:8b001f936bb0 175 volatile USB_INT32U DoneHead; /* Done Head */
jrsikken 1:8b001f936bb0 176 volatile USB_INT08U Reserved[116]; /* Reserved for future use */
jrsikken 1:8b001f936bb0 177 volatile USB_INT08U Unknown[4]; /* Unused */
jrsikken 1:8b001f936bb0 178 } HCCA;
jrsikken 1:8b001f936bb0 179
jrsikken 1:8b001f936bb0 180 /*
jrsikken 1:8b001f936bb0 181 **************************************************************************************************************
jrsikken 1:8b001f936bb0 182 * EXTERN DECLARATIONS
jrsikken 1:8b001f936bb0 183 **************************************************************************************************************
jrsikken 1:8b001f936bb0 184 */
jrsikken 1:8b001f936bb0 185
jrsikken 1:8b001f936bb0 186 extern volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
jrsikken 1:8b001f936bb0 187 extern volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
jrsikken 1:8b001f936bb0 188 extern volatile HCTD *TDHead; /* Head transfer descriptor structure */
jrsikken 1:8b001f936bb0 189 extern volatile HCTD *TDTail; /* Tail transfer descriptor structure */
jrsikken 1:8b001f936bb0 190 extern volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
jrsikken 1:8b001f936bb0 191
jrsikken 1:8b001f936bb0 192 /*
jrsikken 1:8b001f936bb0 193 **************************************************************************************************************
jrsikken 1:8b001f936bb0 194 * FUNCTION PROTOTYPES
jrsikken 1:8b001f936bb0 195 **************************************************************************************************************
jrsikken 1:8b001f936bb0 196 */
jrsikken 1:8b001f936bb0 197
jrsikken 1:8b001f936bb0 198 void Host_Init (void);
jrsikken 1:8b001f936bb0 199
jrsikken 1:8b001f936bb0 200 extern "C" void USB_IRQHandler(void) __irq;
jrsikken 1:8b001f936bb0 201
jrsikken 1:8b001f936bb0 202 USB_INT32S Host_EnumDev (void);
jrsikken 1:8b001f936bb0 203
jrsikken 1:8b001f936bb0 204 USB_INT32S Host_ProcessTD(volatile HCED *ed,
jrsikken 1:8b001f936bb0 205 volatile USB_INT32U token,
jrsikken 1:8b001f936bb0 206 volatile USB_INT08U *buffer,
jrsikken 1:8b001f936bb0 207 USB_INT32U buffer_len);
jrsikken 1:8b001f936bb0 208
jrsikken 1:8b001f936bb0 209 void Host_DelayUS ( USB_INT32U delay);
jrsikken 1:8b001f936bb0 210 void Host_DelayMS ( USB_INT32U delay);
jrsikken 1:8b001f936bb0 211
jrsikken 1:8b001f936bb0 212
jrsikken 1:8b001f936bb0 213 void Host_TDInit (volatile HCTD *td);
jrsikken 1:8b001f936bb0 214 void Host_EDInit (volatile HCED *ed);
jrsikken 1:8b001f936bb0 215 void Host_HCCAInit (volatile HCCA *hcca);
jrsikken 1:8b001f936bb0 216
jrsikken 1:8b001f936bb0 217 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
jrsikken 1:8b001f936bb0 218 USB_INT08U b_request,
jrsikken 1:8b001f936bb0 219 USB_INT16U w_value,
jrsikken 1:8b001f936bb0 220 USB_INT16U w_index,
jrsikken 1:8b001f936bb0 221 USB_INT16U w_length,
jrsikken 1:8b001f936bb0 222 volatile USB_INT08U *buffer);
jrsikken 1:8b001f936bb0 223
jrsikken 1:8b001f936bb0 224 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
jrsikken 1:8b001f936bb0 225 USB_INT08U b_request,
jrsikken 1:8b001f936bb0 226 USB_INT16U w_value,
jrsikken 1:8b001f936bb0 227 USB_INT16U w_index,
jrsikken 1:8b001f936bb0 228 USB_INT16U w_length,
jrsikken 1:8b001f936bb0 229 volatile USB_INT08U *buffer);
jrsikken 1:8b001f936bb0 230
jrsikken 1:8b001f936bb0 231 void Host_FillSetup( USB_INT08U bm_request_type,
jrsikken 1:8b001f936bb0 232 USB_INT08U b_request,
jrsikken 1:8b001f936bb0 233 USB_INT16U w_value,
jrsikken 1:8b001f936bb0 234 USB_INT16U w_index,
jrsikken 1:8b001f936bb0 235 USB_INT16U w_length);
jrsikken 1:8b001f936bb0 236
jrsikken 1:8b001f936bb0 237
jrsikken 1:8b001f936bb0 238 void Host_WDHWait (void);
jrsikken 1:8b001f936bb0 239
jrsikken 1:8b001f936bb0 240
jrsikken 1:8b001f936bb0 241 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem);
jrsikken 1:8b001f936bb0 242 void WriteLE32U (volatile USB_INT08U *pmem,
jrsikken 1:8b001f936bb0 243 USB_INT32U val);
jrsikken 1:8b001f936bb0 244 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem);
jrsikken 1:8b001f936bb0 245 void WriteLE16U (volatile USB_INT08U *pmem,
jrsikken 1:8b001f936bb0 246 USB_INT16U val);
jrsikken 1:8b001f936bb0 247 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem);
jrsikken 1:8b001f936bb0 248 void WriteBE32U (volatile USB_INT08U *pmem,
jrsikken 1:8b001f936bb0 249 USB_INT32U val);
jrsikken 1:8b001f936bb0 250 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem);
jrsikken 1:8b001f936bb0 251 void WriteBE16U (volatile USB_INT08U *pmem,
jrsikken 1:8b001f936bb0 252 USB_INT16U val);
jrsikken 1:8b001f936bb0 253
jrsikken 1:8b001f936bb0 254 #endif