Diff: dds.cpp

Revision:

0:b444ea725ba7

Child:

1:7c424a3e12ea

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/dds.cpp	Tue Dec 02 02:27:30 2014 +0000
@@ -0,0 +1,333 @@
+#include "dds.h"
+
+static unsigned char controlRegister[4];
+static unsigned char read_spi_data[6];
+/*
+static unsigned short phase1[2];
+static unsigned short phase2[2];
+static unsigned long long freq1[6];
+static unsigned long long freq2[6];
+*/
+
+DDS::DDS(SPI *spi_dev, DigitalOut *mreset, DigitalIn *outramp, DigitalOut *spmode, DigitalOut *cs, DigitalOut *ioreset, DigitalInOut *updclk){
+    
+    spi_device      = spi_dev;
+    
+    dds_mreset      = mreset;
+    dds_outramp     = outramp;
+    dds_sp_mode     = spmode;
+    dds_cs          = cs;
+    dds_io_reset    = ioreset;
+    dds_updclk      = updclk;
+    
+    dds_updclk->input();
+    *dds_sp_mode = 0;
+    *dds_cs = 1;
+    
+    spi_device->format(SPI_BITS, SPI_MODE);
+    spi_device->frequency(SPI_FREQ);
+    
+    this->isConfig = false;
+    
+}
+    
+int DDS::__writeData(unsigned char addr, unsigned char ndata, const unsigned char* data){
+    
+    // I/O reset
+    *dds_updclk = 0;
+    *dds_io_reset = 1;
+    wait_us(10);
+    *dds_io_reset = 0;
+    wait_us(10);
+    
+    *dds_cs = 0;
+    
+    //Sending serial address
+    printf("\r\nWriting Addr = %d", addr);
+    spi_device->write(addr & 0x0F);
+    
+    for(unsigned char i = ndata; i > 0; i--)
+    {
+        wait_us(150);
+        spi_device->write(data[i-1]);
+    }
+       
+    *dds_cs = 1;
+
+    for(unsigned char i = ndata; i > 0; i--)
+    {
+        printf("\r\nData[%d] = %d", i-1, data[i-1]);
+    }
+    
+    wait_us(10);
+    *dds_updclk = 1;
+    wait_us(10);
+    *dds_updclk = 0;
+    wait_us(10);
+    
+    return 1;
+}
+
+
+unsigned char* DDS::__readData(unsigned char addr, unsigned char ndata){
+    
+    // I/O reset
+    *dds_io_reset = 1;
+    wait_us(10);
+    *dds_io_reset = 0;
+    wait_us(10);
+    
+    *dds_cs = 0;
+    
+    //Sending serial address
+    printf("\r\nReading Addr = %d", addr);
+    spi_device->write((addr & 0x0F) | 0x80);
+    
+    for(unsigned char i = ndata; i > 0; i--)
+    {
+        wait_us(150);
+        read_spi_data[i-1] = spi_device->write(0x00);
+    }
+    
+    *dds_cs = 1;
+
+    for(unsigned char i = ndata; i > 0; i--)
+    {
+        printf("\r\nData[%d] = %d", i-1, read_spi_data[i-1]);
+    } 
+    
+    wait_us(10);
+    
+    return read_spi_data;
+    }
+
+int DDS::__writeDataAndVerify(unsigned char addr, unsigned char ndata, const unsigned char* wr_spi_data){
+    
+    bool            success;
+    unsigned char*  rd_spi_data;
+    
+    this->__writeData(addr, ndata, wr_spi_data);
+    rd_spi_data = this->__readData(addr, ndata);
+    
+    success = true;
+    
+    for(unsigned char i = 0; i < ndata; i++)
+    {
+        
+        if (wr_spi_data[i] != rd_spi_data[i])
+        {
+            success = false;
+            break;
+        }
+        
+    }
+    
+    printf("\r\nSuccessful writting = %d\r\n", success);
+    
+    return success;
+}
+
+unsigned char* DDS::__getControlRegister(){
+    
+    bool pll_range = 0;
+    bool pll_bypass = 1;
+    
+    if (cr_multiplier >= 4){
+        pll_bypass = 0;
+    }
+
+    if (frequency >= 200.0){
+        pll_range = 1;
+    }
+       
+    controlRegister[3] = 0x10;
+    controlRegister[2] = pll_range*64 + pll_bypass*32 + (cr_multiplier & 0x1F);
+    controlRegister[1] = (cr_mode & 0x07)*2 + cr_ioupdclk;
+    controlRegister[0] = cr_inv_sinc*64 + cr_osk_en*32 + cr_osk_int*16 + cr_msb_lsb*2 + cr_sdo;
+    
+    return controlRegister;
+    
+    }
+    
+int DDS::__writeControlRegister(){
+    
+    bool            success;
+    unsigned char*  wr_spi_data;
+    unsigned char*  rd_spi_data;
+    unsigned char   addr = 0x07, ndata = 4;
+    
+    wr_spi_data = this->__getControlRegister();
+    
+    success = this->__writeData(addr, ndata, wr_spi_data);
+    
+    //printf("\r\nChanging UPD_CLK as an OUTPUT ...");
+    dds_updclk->output();
+    
+    wait_us(100);
+    *dds_updclk = 1;
+    wait_us(10);
+    *dds_updclk = 0;
+    wait_us(10);
+    
+    rd_spi_data = this->__readData(addr, ndata);
+    
+    success = true;
+    
+    for(unsigned char i = 0; i < ndata; i++)
+    {
+        if (wr_spi_data[i] != rd_spi_data[i])
+        {
+            success = false;
+            break;
+        }
+    }
+    
+    return success;
+}   
+
+                    
+int DDS::reset(){
+    
+    // Master reset
+    //Set as a input, temporary
+    //printf("\r\nChange updclk direction as an INPUT ...\r\n");
+    dds_updclk->input();
+    dds_updclk->mode(PullDown);
+    
+    //printf("\r\nReseting DDS ...\r\n");
+    *dds_mreset = 1;
+    wait_ms(1);
+    *dds_mreset = 0;
+    wait_ms(1);
+    return 0;
+    }
+    
+int DDS::scanIOUpdate(){
+    
+    unsigned int cont = 0;
+    
+    this->reset();
+    
+    printf("\r\nWaiting a upd_clk ...\r\n");
+    while(true){
+        if (*dds_updclk == 1)
+            break;
+        
+        cont += 1;
+        if (cont > 10000)
+            break;
+            
+        wait_us(1);
+    }
+    
+    if (cont > 10000){
+        printf("\r\nupd_clk did not found\r\n");
+        return 0;
+    }
+    
+    printf("\r\nupd_clk found ...\r\n");
+    
+    return 1;
+    }
+    
+int DDS::find(){
+    /*
+    unsigned char phase[];
+    
+    phase[0] = 0x0A;
+    phase[1] = 0x55;
+    
+    this->__writeDataAndVerify(0x00, 5, phase);
+    */
+    this->__readData(0x05, 4);
+    this->__readData(0x0A, 1);
+    return 1;
+    
+    }
+    
+    
+int DDS::init(){
+    
+    //printf("\r\nSetting default parameters in CR ...\r\n");
+    
+    //Serial mode enabled
+    this->frequency = 200.0;      // Work frequency in MHz
+    this->cr_multiplier = 20;     // Multiplier 4- 20
+    this->cr_mode = 0;            // Single, FSK, Ramped FSK, Chirp, BPSK
+    this->cr_ioupdclk = 0;        // IO Update clock direction: 0 -> input,  1 -> output
+    this->cr_inv_sinc  = 0;        // Sinc inverser filter enable: 0 -> enable
+    this->cr_osk_en = 0;          // Enable AM: 0 -> disabled
+    this->cr_osk_int = 0;         // ext/int output shaped control: 0 -> external
+    this->cr_msb_lsb = 0;         // msb/lsb bit first: 0 -> MSB, 1 -> LSB
+    this->cr_sdo = 1;             // SDO pin active: 0 -> inactive
+
+    //printf("\r\nSetting in serial mode ...\r\n");
+    *dds_sp_mode = 0;
+    *dds_cs = 1;
+     
+    this->reset();
+    
+    //printf("\r\nWritting CR ...\r\n");
+    
+    if (not this->__writeControlRegister()){
+        printf("\r\nUnsuccessful DDS initialization");
+        this->isConfig = false;
+        return false;
+        }
+        
+    printf("\r\nSuccessfull DDS initialization");
+    
+    this->isConfig = true;
+    
+    return true;
+}
+    
+int DDS::setSingleMode(){
+    return 0;
+    }
+    
+int DDS::setFSKMode(){
+    return 0;
+    }
+    
+int DDS::setBPSKMode(){
+    return 0;
+    }
+    
+int DDS::setMode(unsigned char mode){
+    
+    this->cr_mode = mode & 0x07;
+    
+    return this->__writeControlRegister();
+    }
+
+int DDS::setMultiplier(unsigned char multiplier, float clock){
+    
+    this->cr_multiplier = multiplier & 0x1F;
+    this->frequency = clock;
+    
+    return this->__writeControlRegister();
+    }
+        
+int DDS::setPhase1(unsigned char* phase){
+    
+    return this->__writeDataAndVerify(0x00, 2, phase);
+    
+    }
+    
+int DDS::setPhase2(unsigned char* phase){
+    
+    return this->__writeDataAndVerify(0x01, 2, phase);
+    
+    }
+    
+int DDS::setFrequency1(unsigned char* freq){
+    
+    return this->__writeDataAndVerify(0x02, 6, freq);
+    
+    }
+int DDS::setFrequency2(unsigned char* freq){
+    
+    return this->__writeDataAndVerify(0x03, 6, freq);
+    
+    }
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