Diff: dds.h

Revision:

1:7c424a3e12ea

Parent:

0:b444ea725ba7

--- a/dds.h	Tue Dec 02 02:27:30 2014 +0000
+++ b/dds.h	Thu Dec 04 14:35:52 2014 +0000
@@ -7,8 +7,9 @@
 class DDS{
     private:
         float           frequency;              // Work frequency in MHz
-        unsigned char   cr_multiplier;         // Multiplier 4- 20
-        unsigned char   cr_mode;                // Single, FSK, Ramped FSK, Chirp, BPSK
+        char            cr_multiplier;         // Multiplier 4- 20
+        char            cr_mode;                // Single, FSK, Ramped FSK, Chirp, BPSK
+        bool            cr_qdac_pwdn;           // Q DAC power down enable: 0 -> disable
         bool            cr_ioupdclk;            // IO Update clock enable: 0 -> input
         bool            cr_inv_sinc;            // Inverse sinc filter enable: 0 -> enable
         bool            cr_osk_en;              // Enable AM: 0 -> disabled
@@ -19,35 +20,58 @@
         SPI             *spi_device;
         //DDS I/O
         DigitalOut      *dds_mreset;
-        DigitalIn       *dds_outramp;
+        DigitalOut      *dds_outramp;
         DigitalOut      *dds_sp_mode;
         DigitalOut      *dds_cs;
         DigitalOut      *dds_io_reset;
         DigitalInOut    *dds_updclk;
-
-    
-        int __writeData(unsigned char addr, unsigned char ndata, const unsigned char* data);
-        unsigned char* __readData(unsigned char addr, unsigned char ndata);
-        int __writeDataAndVerify(unsigned char addr, unsigned char ndata, const unsigned char* wr_spi_data);
-        unsigned char* __getControlRegister();
+        
+        char            frequency1[6];
+        char            frequency2[6];
+        char            phase1[2];
+        char            phase2[2];       
+        char            amplitudeI[2];
+        char            amplitudeQ[2];
+        bool            rf_enabled;
+        
+        char*           cmd_answer;
+        unsigned long   cmd_answer_len;
+        
+        int __writeData(char addr, char ndata, const char* data);
+        char* __readData(char addr, char ndata);
+        int __writeDataAndVerify(char addr, char ndata, const char* wr_spi_data);
+        char* __getControlRegister();
         int __writeControlRegister();
-        int setSingleMode();
-        int setFSKMode();
-        int setBPSKMode();
         
     public:
         bool isConfig;
         
-        DDS(SPI *spi_dev, DigitalOut *mreset, DigitalIn *outramp, DigitalOut *spmode, DigitalOut *cs, DigitalOut *ioreset, DigitalInOut *updclk);
+        DDS(SPI *spi_dev, DigitalOut *mreset, DigitalOut *outramp, DigitalOut *spmode, DigitalOut *cs, DigitalOut *ioreset, DigitalInOut *updclk);
         int init();
         int reset();
         int scanIOUpdate();
         int find();
-        int setMode(unsigned char mode);
-        int setMultiplier(unsigned char multiplier, float clock);
-        int setPhase1(unsigned char* phase);
-        int setPhase2(unsigned char* phase);
-        int setFrequency1(unsigned char* freq);
-        int setFrequency2(unsigned char* freq);
+        char* rdMode();
+        char* rdMultiplier();
+        char* rdPhase1();
+        char* rdPhase2();
+        char* rdFrequency1();
+        char* rdFrequency2();
+        char* rdAmplitudeI();
+        char* rdAmplitudeQ();
+        int wrMode(char mode);
+        int wrMultiplier(char multiplier, float clock);
+        int wrPhase1(char* phase);
+        int wrPhase2(char* phase);
+        int wrFrequency1(char* freq);
+        int wrFrequency2(char* freq);
+        int wrAmplitudeI(char* amplitude);
+        int wrAmplitudeQ(char* amplitude);
+        int enableRF();
+        int disableRF();
+        int defaultSettings();
+        char* newCommand(unsigned short cmd, char* payload, unsigned long payload_len);
+        char* getCmdAnswer();
+        unsigned long getCmdAnswerLen();
     
 };
\ No newline at end of file