Joaquin Verastegui / jro

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Dependents:   JRO_CR2 frdm_test

Fork of jro by Miguel Urco

dds.h@0:b444ea725ba7, 2014-12-02 (annotated)

Committer:
miguelcordero191
Date:
Tue Dec 02 02:27:30 2014 +0000
Revision:
0:b444ea725ba7
Child:
1:7c424a3e12ea
Primer programa del DDS funcionando

Who changed what in which revision?

UserRevisionLine numberNew contents of line
miguelcordero191 0:b444ea725ba7 1 #include "mbed.h"
miguelcordero191 0:b444ea725ba7 2
miguelcordero191 0:b444ea725ba7 3 #define SPI_BITS 8
miguelcordero191 0:b444ea725ba7 4 #define SPI_MODE 0
miguelcordero191 0:b444ea725ba7 5 #define SPI_FREQ 10000
miguelcordero191 0:b444ea725ba7 6
miguelcordero191 0:b444ea725ba7 7 class DDS{
miguelcordero191 0:b444ea725ba7 8 private:
miguelcordero191 0:b444ea725ba7 9 float frequency; // Work frequency in MHz
miguelcordero191 0:b444ea725ba7 10 unsigned char cr_multiplier; // Multiplier 4- 20
miguelcordero191 0:b444ea725ba7 11 unsigned char cr_mode; // Single, FSK, Ramped FSK, Chirp, BPSK
miguelcordero191 0:b444ea725ba7 12 bool cr_ioupdclk; // IO Update clock enable: 0 -> input
miguelcordero191 0:b444ea725ba7 13 bool cr_inv_sinc; // Inverse sinc filter enable: 0 -> enable
miguelcordero191 0:b444ea725ba7 14 bool cr_osk_en; // Enable AM: 0 -> disabled
miguelcordero191 0:b444ea725ba7 15 bool cr_osk_int; // ext/int output shaped control: 0 -> external
miguelcordero191 0:b444ea725ba7 16 bool cr_msb_lsb; // msb/lsb bit first: 0 -> MSB
miguelcordero191 0:b444ea725ba7 17 bool cr_sdo; // SDO pin active: 0 -> inactive
miguelcordero191 0:b444ea725ba7 18
miguelcordero191 0:b444ea725ba7 19 SPI *spi_device;
miguelcordero191 0:b444ea725ba7 20 //DDS I/O
miguelcordero191 0:b444ea725ba7 21 DigitalOut *dds_mreset;
miguelcordero191 0:b444ea725ba7 22 DigitalIn *dds_outramp;
miguelcordero191 0:b444ea725ba7 23 DigitalOut *dds_sp_mode;
miguelcordero191 0:b444ea725ba7 24 DigitalOut *dds_cs;
miguelcordero191 0:b444ea725ba7 25 DigitalOut *dds_io_reset;
miguelcordero191 0:b444ea725ba7 26 DigitalInOut *dds_updclk;
miguelcordero191 0:b444ea725ba7 27
miguelcordero191 0:b444ea725ba7 28
miguelcordero191 0:b444ea725ba7 29 int __writeData(unsigned char addr, unsigned char ndata, const unsigned char* data);
miguelcordero191 0:b444ea725ba7 30 unsigned char* __readData(unsigned char addr, unsigned char ndata);
miguelcordero191 0:b444ea725ba7 31 int __writeDataAndVerify(unsigned char addr, unsigned char ndata, const unsigned char* wr_spi_data);
miguelcordero191 0:b444ea725ba7 32 unsigned char* __getControlRegister();
miguelcordero191 0:b444ea725ba7 33 int __writeControlRegister();
miguelcordero191 0:b444ea725ba7 34 int setSingleMode();
miguelcordero191 0:b444ea725ba7 35 int setFSKMode();
miguelcordero191 0:b444ea725ba7 36 int setBPSKMode();
miguelcordero191 0:b444ea725ba7 37
miguelcordero191 0:b444ea725ba7 38 public:
miguelcordero191 0:b444ea725ba7 39 bool isConfig;
miguelcordero191 0:b444ea725ba7 40
miguelcordero191 0:b444ea725ba7 41 DDS(SPI *spi_dev, DigitalOut *mreset, DigitalIn *outramp, DigitalOut *spmode, DigitalOut *cs, DigitalOut *ioreset, DigitalInOut *updclk);
miguelcordero191 0:b444ea725ba7 42 int init();
miguelcordero191 0:b444ea725ba7 43 int reset();
miguelcordero191 0:b444ea725ba7 44 int scanIOUpdate();
miguelcordero191 0:b444ea725ba7 45 int find();
miguelcordero191 0:b444ea725ba7 46 int setMode(unsigned char mode);
miguelcordero191 0:b444ea725ba7 47 int setMultiplier(unsigned char multiplier, float clock);
miguelcordero191 0:b444ea725ba7 48 int setPhase1(unsigned char* phase);
miguelcordero191 0:b444ea725ba7 49 int setPhase2(unsigned char* phase);
miguelcordero191 0:b444ea725ba7 50 int setFrequency1(unsigned char* freq);
miguelcordero191 0:b444ea725ba7 51 int setFrequency2(unsigned char* freq);
miguelcordero191 0:b444ea725ba7 52
miguelcordero191 0:b444ea725ba7 53 };