,

Dependencies:   mbed

Committer:
jjeong
Date:
Sat Dec 03 08:21:37 2022 +0000
Revision:
0:9d06cdd73bc7
controller for quadrotor with RF24 driver;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jjeong 0:9d06cdd73bc7 1 /*
jjeong 0:9d06cdd73bc7 2 * mbed SDK
jjeong 0:9d06cdd73bc7 3 * Copyright (c) 2017 ARM Limited
jjeong 0:9d06cdd73bc7 4 *
jjeong 0:9d06cdd73bc7 5 * Licensed under the Apache License, Version 2.0 (the "License");
jjeong 0:9d06cdd73bc7 6 * you may not use this file except in compliance with the License.
jjeong 0:9d06cdd73bc7 7 * You may obtain a copy of the License at
jjeong 0:9d06cdd73bc7 8 *
jjeong 0:9d06cdd73bc7 9 * http://www.apache.org/licenses/LICENSE-2.0
jjeong 0:9d06cdd73bc7 10 *
jjeong 0:9d06cdd73bc7 11 * Unless required by applicable law or agreed to in writing, software
jjeong 0:9d06cdd73bc7 12 * distributed under the License is distributed on an "AS IS" BASIS,
jjeong 0:9d06cdd73bc7 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
jjeong 0:9d06cdd73bc7 14 * See the License for the specific language governing permissions and
jjeong 0:9d06cdd73bc7 15 * limitations under the License.
jjeong 0:9d06cdd73bc7 16 */
jjeong 0:9d06cdd73bc7 17
jjeong 0:9d06cdd73bc7 18 // Automatically generated configuration file.
jjeong 0:9d06cdd73bc7 19 // DO NOT EDIT, content will be overwritten.
jjeong 0:9d06cdd73bc7 20
jjeong 0:9d06cdd73bc7 21 #ifndef __MBED_CONFIG_DATA__
jjeong 0:9d06cdd73bc7 22 #define __MBED_CONFIG_DATA__
jjeong 0:9d06cdd73bc7 23
jjeong 0:9d06cdd73bc7 24 // Configuration parameters
jjeong 0:9d06cdd73bc7 25 #define CLOCK_SOURCE USE_PLL_MSI // set by target:NUCLEO_L432KC
jjeong 0:9d06cdd73bc7 26 #define LPTICKER_DELAY_TICKS 0 // set by target:NUCLEO_L432KC
jjeong 0:9d06cdd73bc7 27 #define MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE 9600 // set by library:platform
jjeong 0:9d06cdd73bc7 28 #define MBED_CONF_PLATFORM_STDIO_BAUD_RATE 9600 // set by library:platform
jjeong 0:9d06cdd73bc7 29 #define MBED_CONF_PLATFORM_STDIO_CONVERT_NEWLINES 0 // set by library:platform
jjeong 0:9d06cdd73bc7 30 #define MBED_CONF_PLATFORM_STDIO_FLUSH_AT_EXIT 1 // set by library:platform
jjeong 0:9d06cdd73bc7 31 #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 // set by target:MCU_STM32_BAREMETAL
jjeong 0:9d06cdd73bc7 32 #define MBED_CONF_TARGET_CONSOLE_UART 1 // set by target:Target
jjeong 0:9d06cdd73bc7 33 #define MBED_CONF_TARGET_DEEP_SLEEP_LATENCY 4 // set by target:MCU_STM32
jjeong 0:9d06cdd73bc7 34 #define MBED_CONF_TARGET_DEFAULT_ADC_VREF NAN // set by target:Target
jjeong 0:9d06cdd73bc7 35 #define MBED_CONF_TARGET_INIT_US_TICKER_AT_BOOT 1 // set by target:MCU_STM32
jjeong 0:9d06cdd73bc7 36 #define MBED_CONF_TARGET_LPTICKER_LPTIM 1 // set by target:NUCLEO_L432KC
jjeong 0:9d06cdd73bc7 37 #define MBED_CONF_TARGET_LPTICKER_LPTIM_CLOCK 1 // set by target:MCU_STM32
jjeong 0:9d06cdd73bc7 38 #define MBED_CONF_TARGET_LPUART_CLOCK_SOURCE USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1 // set by target:MCU_STM32
jjeong 0:9d06cdd73bc7 39 #define MBED_CONF_TARGET_LSE_AVAILABLE 1 // set by target:MCU_STM32
jjeong 0:9d06cdd73bc7 40 #define MBED_CONF_TARGET_MPU_ROM_END 0x0fffffff // set by target:Target
jjeong 0:9d06cdd73bc7 41 #define MBED_CONF_TARGET_TICKLESS_FROM_US_TICKER 0 // set by target:Target
jjeong 0:9d06cdd73bc7 42 #define MBED_CONF_TARGET_XIP_ENABLE 0 // set by target:Target
jjeong 0:9d06cdd73bc7 43
jjeong 0:9d06cdd73bc7 44 #endif
jjeong 0:9d06cdd73bc7 45