jim herd / FPGA_bus
Revision:
13:67382358d024
Parent:
7:c0bef9c1f5d5
Child:
14:b56473e54f6f
diff -r c0bef9c1f5d5 -r 67382358d024 FPGA_bus.cpp
--- a/FPGA_bus.cpp	Mon Apr 13 16:10:23 2020 +0000
+++ b/FPGA_bus.cpp	Sat May 02 22:49:47 2020 +0000
@@ -40,15 +40,15 @@
                     async_uP_RW(ASYNC_UP_RW_PIN),
                     async_uP_reset(ASYNC_UP_RESET_PIN),
                     uP_ack(ASYNC_UP_ACK_PIN),
-                    uP_handshake_2(ASYNC_UP_HANDSHAKE_2_PIN),
+                    uP_handshake_2(ASYNC_UP_HANDSHAKE_2_PIN)
                     
-                      _nos_PWM_units(nos_PWM),
+ /*                     _nos_PWM_units(nos_PWM),
                       _nos_QE_units(nos_QE),
-                      _nos_servo_units(nos_servo)               
+                      _nos_servo_units(nos_servo)        */       
 {
- /*   _nos_PWM_units   = nos_PWM;
+    _nos_PWM_units   = nos_PWM;
     _nos_QE_units    = nos_QE;
-    _nos_servo_units = nos_servo;  */
+    _nos_servo_units = nos_servo; 
     
     async_uP_start   = LOW;
 }