jim herd / FPGA_bus
Revision:
5:64c677e9995c
Parent:
4:e5d36eee9245
Child:
6:e68defb7b775
diff -r e5d36eee9245 -r 64c677e9995c FPGA_bus.cpp
--- a/FPGA_bus.cpp	Thu Apr 18 22:54:18 2019 +0000
+++ b/FPGA_bus.cpp	Thu Apr 18 22:59:26 2019 +0000
@@ -229,4 +229,13 @@
     uint32_t register_address = ((QE_BASE + (channel * NOS_QE_REGISTERS)) + QE_CONFIG);
     uint32_t register_data = QE_SPEED_CALC_ENABLE;
     do_transaction(WRITE_REGISTER_CMD, register_address, register_data, &data, &status);
+    global_FPGA_unit_error_flag = status;
+}
+
+uint32_t FPGA_bus::read_speed_measure(uint32_t channel)
+{
+    uint32_t register_address = ((QE_BASE + (channel * NOS_QE_REGISTERS)) + QE_CONFIG);
+    do_transaction(READ_REGISTER_CMD, register_address, NULL, &data, &status);
+    global_FPGA_unit_error_flag = status;
+    return data;
 }
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