Comms between MAX 10 FPGA and ST uP
History
Made 'hard_check_bus' routine public.
2020-07-25, by jimherd [Sat, 25 Jul 2020 23:14:10 +0000] rev 27
Made 'hard_check_bus' routine public.
Computed PWM, QE, and RC base register addresses made public
2020-07-07, by jimherd [Tue, 07 Jul 2020 11:03:34 +0000] rev 26
Computed PWM, QE, and RC base register addresses made public
Removed "wait_ms" from bus initialise code. Routine is deprecated.
2020-06-28, by jimherd [Sun, 28 Jun 2020 14:27:00 +0000] rev 25
Removed "wait_ms" from bus initialise code. Routine is deprecated.
motor command config values fixed
2020-06-28, by jimherd [Sun, 28 Jun 2020 13:51:17 +0000] rev 24
motor command config values fixed
"soft_bus_check" changed to use decrementing timeout counter rather than fixed delay.
2020-06-26, by jimherd [Fri, 26 Jun 2020 11:02:30 +0000] rev 23
"soft_bus_check" changed to use decrementing timeout counter rather than fixed delay.
Added soft bus check that does not need a hard RESET therefore retians system configuration.
2020-06-23, by jimherd [Tue, 23 Jun 2020 11:39:07 +0000] rev 22
Added soft bus check that does not need a hard RESET therefore retians system configuration.
Bus check routine ammended to look for low to high transition on handshake_2
2020-06-16, by jimherd [Tue, 16 Jun 2020 23:06:04 +0000] rev 21
Bus check routine ammended to look for low to high transition on handshake_2
Added routine to test bus on initialisation. Code documented.
2020-06-15, by jimherd [Mon, 15 Jun 2020 21:29:40 +0000] rev 20
Added routine to test bus on initialisation. Code documented.
REmoved reference to serial debug channel
2020-05-25, by jimherd [Mon, 25 May 2020 14:14:17 +0000] rev 19
REmoved reference to serial debug channel
Updated H-bridge bit enum definitions
2020-05-24, by jimherd [Sun, 24 May 2020 22:53:59 +0000] rev 18
Updated H-bridge bit enum definitions