jim herd / FPGA_bus
Revision:
25:9cdeb5267a47
Parent:
23:4b391cfd4f2d
Child:
27:fe3dddcd448c
--- a/FPGA_bus.cpp	Sun Jun 28 13:51:17 2020 +0000
+++ b/FPGA_bus.cpp	Sun Jun 28 14:27:00 2020 +0000
@@ -94,7 +94,7 @@
 //
 // Seems OK, now read register 0 and get basic system parameters
 //
-    wait_ms(10);
+    wait_us(1000);
     get_SYS_data();
     
     if (global_FPGA_unit_error_flag != NO_ERROR){