jim herd / FPGA_bus

Comms between MAX 10 FPGA and ST uP

Diff: FPGA_bus.h

Revision:
26:1837bc6df8ef
Parent:
24:551a996eb5c2
Child:
27:fe3dddcd448c
--- a/FPGA_bus.h	Sun Jun 28 14:27:00 2020 +0000
+++ b/FPGA_bus.h	Tue Jul 07 11:03:34 2020 +0000
@@ -191,6 +191,7 @@
 // data
 //   
      int32_t global_FPGA_unit_error_flag;
+     uint32_t    PWM_base, QE_base, RC_base;
 //
 // persistant system data
 //
@@ -212,8 +213,6 @@
     uint32_t    _nos_QE_units;
     uint32_t    _nos_servo_units;
     
-    uint32_t    PWM_base, QE_base, RC_base;
-    
     uint32_t data, status, tmp_config;
     received_packet_t   in_pkt;
 //