Jordan Hanson / Mbed 2 deprecated AutonomousDAQ

Arianna autonomous DAQ firmware

Dependencies:   mbed SDFileSystemFilinfo AriSnProtocol NetServicesMin AriSnComm MODSERIAL PowerControlClkPatch DS1820OW

Watchdog.h@63:4820a4460f00, 2014-11-28 (annotated)

Committer:
uci1
Date:
Fri Nov 28 05:41:42 2014 +0000
Revision:
63:4820a4460f00
Parent:
62:4b59c1eb429f 
Revert to SDFileSystemFilInfo with no-stall changes to SDFileSystem.cpp . change watchdog to internal RC clock. move check power to after startup LED sequence. make InitSDCard try up to 26 init's. DEBUG ENABLED, NO SAFETY NETS

Who changed what in which revision?

UserRevisionLine numberNew contents of line
uci1 0:664899e0b988 1 #ifndef MB_Watchdog
uci1 0:664899e0b988 2 #define MB_Watchdog
uci1 0:664899e0b988 3
uci1 22:f957c4f840ad 4 #define WDFAILSAFE (1200u)
uci1 22:f957c4f840ad 5
uci1 62:4b59c1eb429f 6 //#define DEBUG
uci1 62:4b59c1eb429f 7
uci1 40:1324da35afd4 8 // Adapted from Simon's Watchdog code from
uci1 0:664899e0b988 9 // http://mbed.org/forum/mbed/topic/508/
uci1 0:664899e0b988 10 namespace Watchdog {
uci1 0:664899e0b988 11
uci1 0:664899e0b988 12 // "kick" or "feed" the dog - reset the watchdog timer
uci1 0:664899e0b988 13 // by writing this required bit pattern
uci1 12:d472f9811262 14 inline
uci1 0:664899e0b988 15 void kick() {
uci1 63:4820a4460f00 16 #ifdef DEBUG
uci1 63:4820a4460f00 17 printf("WDkick. wdtc=%u, wdtv=%u (at %u)\r\n",
uci1 63:4820a4460f00 18 LPC_WDT->WDTC, LPC_WDT->WDTV, time(0));
uci1 63:4820a4460f00 19 #endif
uci1 0:664899e0b988 20 LPC_WDT->WDFEED = 0xAA;
uci1 0:664899e0b988 21 LPC_WDT->WDFEED = 0x55;
uci1 0:664899e0b988 22 }
uci1 0:664899e0b988 23
uci1 0:664899e0b988 24 // Load timeout value in watchdog timer and enable
uci1 12:d472f9811262 25 inline
uci1 0:664899e0b988 26 void kick(const float s) {
uci1 62:4b59c1eb429f 27 #ifdef DEBUG
uci1 62:4b59c1eb429f 28 printf("WDkick s=[%g] \r\n",s);
uci1 63:4820a4460f00 29 printf("SystemCoreClock=[%u]\r\n",(uint32_t)SystemCoreClock);
uci1 62:4b59c1eb429f 30 #endif
uci1 63:4820a4460f00 31 // LPC_WDT->WDCLKSEL = 0x1; // Set CLK src to PCLK
uci1 0:664899e0b988 32 // WD has a fixed /4 prescaler, PCLK default is /4
uci1 63:4820a4460f00 33 // static const float clk = static_cast<float>(SystemCoreClock / 16);
uci1 63:4820a4460f00 34 LPC_WDT->WDCLKSEL = 0x00; // Set CLK src to Internal RC
uci1 63:4820a4460f00 35 static const float clk = static_cast<float>(1e6); // 4MHz / 4 for WD prescaler
uci1 63:4820a4460f00 36 #ifdef DEBUG
uci1 63:4820a4460f00 37 printf("s=[%g], clk=%g, sc=%u\r\n", s, clk, uint32_t(s*clk));
uci1 63:4820a4460f00 38 #endif
uci1 63:4820a4460f00 39 LPC_WDT->WDTC = static_cast<uint32_t>(s * clk);
uci1 40:1324da35afd4 40 // LPC_WDT->WDMOD = 0x3; // Enabled and Reset
uci1 40:1324da35afd4 41 LPC_WDT->WDMOD |= 0x3; // Enabled and Reset
uci1 0:664899e0b988 42 kick();
uci1 0:664899e0b988 43 }
uci1 22:f957c4f840ad 44
uci1 40:1324da35afd4 45 inline
uci1 40:1324da35afd4 46 bool didWatchdogReset() {
uci1 40:1324da35afd4 47 return ( (LPC_WDT->WDMOD) & 0x4 );
uci1 40:1324da35afd4 48 }
uci1 40:1324da35afd4 49
uci1 40:1324da35afd4 50 inline
uci1 40:1324da35afd4 51 void clearResetFlag() {
uci1 40:1324da35afd4 52 LPC_WDT->WDMOD &= ~(0x4);
uci1 40:1324da35afd4 53 }
uci1 40:1324da35afd4 54
uci1 22:f957c4f840ad 55 struct SnKickStarter {
uci1 22:f957c4f840ad 56 SnKickStarter(const float s) {
uci1 22:f957c4f840ad 57 Watchdog::kick(s);
uci1 22:f957c4f840ad 58 }
uci1 22:f957c4f840ad 59 };
uci1 0:664899e0b988 60
uci1 0:664899e0b988 61 };
uci1 0:664899e0b988 62
uci1 0:664899e0b988 63
uci1 0:664899e0b988 64 #endif // MB_Watchdog