Arianna autonomous DAQ firmware

Dependencies:   mbed SDFileSystemFilinfo AriSnProtocol NetServicesMin AriSnComm MODSERIAL PowerControlClkPatch DS1820OW

Committer:
uci1
Date:
Sat Aug 18 05:00:32 2012 +0000
Revision:
12:d472f9811262
Parent:
0:664899e0b988
Child:
22:f957c4f840ad
Fixed bug in throttling timers. Now evt stores dt of triggers but throttle works on dt of events. AfarTCP communication possibly done. Debug output put behind precompiler macros.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
uci1 0:664899e0b988 1 #ifndef MB_Watchdog
uci1 0:664899e0b988 2 #define MB_Watchdog
uci1 0:664899e0b988 3
uci1 0:664899e0b988 4 // Simon's Watchdog code from
uci1 0:664899e0b988 5 // http://mbed.org/forum/mbed/topic/508/
uci1 0:664899e0b988 6 namespace Watchdog {
uci1 0:664899e0b988 7
uci1 0:664899e0b988 8 // "kick" or "feed" the dog - reset the watchdog timer
uci1 0:664899e0b988 9 // by writing this required bit pattern
uci1 12:d472f9811262 10 inline
uci1 0:664899e0b988 11 void kick() {
uci1 0:664899e0b988 12 LPC_WDT->WDFEED = 0xAA;
uci1 0:664899e0b988 13 LPC_WDT->WDFEED = 0x55;
uci1 0:664899e0b988 14 }
uci1 0:664899e0b988 15
uci1 0:664899e0b988 16 // Load timeout value in watchdog timer and enable
uci1 12:d472f9811262 17 inline
uci1 0:664899e0b988 18 void kick(const float s) {
uci1 0:664899e0b988 19 LPC_WDT->WDCLKSEL = 0x1; // Set CLK src to PCLK
uci1 0:664899e0b988 20 // WD has a fixed /4 prescaler, PCLK default is /4
uci1 0:664899e0b988 21 static const float clk = static_cast<float>(SystemCoreClock / 16);
uci1 0:664899e0b988 22 LPC_WDT->WDTC = s * clk;
uci1 0:664899e0b988 23 LPC_WDT->WDMOD = 0x3; // Enabled and Reset
uci1 0:664899e0b988 24 kick();
uci1 0:664899e0b988 25 }
uci1 0:664899e0b988 26
uci1 0:664899e0b988 27 };
uci1 0:664899e0b988 28
uci1 0:664899e0b988 29
uci1 0:664899e0b988 30 #endif // MB_Watchdog