forked for unsupported target
Dependents: stm32-disco-example DISCO-F469NI_BD_SD_Card_Control
Fork of USBHOST by
USBHost/TARGET_RENESAS/TARGET_VK_RZ_A1H/ohci_wrapp_RZ_A1.h@1:ab240722d7ef, 2017-02-15 (annotated)
- Committer:
- frq08711@LMECWL0871.LME.ST.COM
- Date:
- Wed Feb 15 10:49:44 2017 +0100
- Revision:
- 1:ab240722d7ef
update to mbed 5.3.5
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 1 | /* Copyright (c) 2010-2011 mbed.org, MIT License |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 2 | * |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 4 | * and associated documentation files (the "Software"), to deal in the Software without |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 5 | * restriction, including without limitation the rights to use, copy, modify, merge, publish, |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 6 | * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 7 | * Software is furnished to do so, subject to the following conditions: |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 8 | * |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 9 | * The above copyright notice and this permission notice shall be included in all copies or |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 10 | * substantial portions of the Software. |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 11 | * |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 13 | * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 14 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 15 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 16 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 17 | */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 18 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 19 | #ifndef OHCI_WRAPP_RZ_A1_H |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 20 | #define OHCI_WRAPP_RZ_A1_H |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 21 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 22 | #ifdef __cplusplus |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 23 | extern "C" { |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 24 | #endif |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 25 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 26 | #define OHCI_REG_REVISION (0x00) /* HcRevision */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 27 | #define OHCI_REG_CONTROL (0x04) /* HcControl */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 28 | #define OHCI_REG_COMMANDSTATUS (0x08) /* HcCommandStatus */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 29 | #define OHCI_REG_INTERRUPTSTATUS (0x0C) /* HcInterruptStatus */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 30 | #define OHCI_REG_INTERRUPTENABLE (0x10) /* HcInterruptEnable */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 31 | #define OHCI_REG_INTERRUPTDISABLE (0x14) /* HcInterruptDisable */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 32 | #define OHCI_REG_HCCA (0x18) /* HcHCCA */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 33 | #define OHCI_REG_PERIODCURRENTED (0x1C) /* HcPeriodCurrentED */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 34 | #define OHCI_REG_CONTROLHEADED (0x20) /* HcControlHeadED */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 35 | #define OHCI_REG_CONTROLCURRENTED (0x24) /* HcControlCurrentED */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 36 | #define OHCI_REG_BULKHEADED (0x28) /* HcBulkHeadED */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 37 | #define OHCI_REG_BULKCURRENTED (0x2C) /* HcBulkCurrentED */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 38 | #define OHCI_REG_DONEHEADED (0x30) /* HcDoneHead */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 39 | #define OHCI_REG_FMINTERVAL (0x34) /* HcFmInterval */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 40 | #define OHCI_REG_FMREMAINING (0x38) /* HcFmRemaining */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 41 | #define OHCI_REG_FMNUMBER (0x3C) /* HcFmNumber */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 42 | #define OHCI_REG_PERIODICSTART (0x40) /* HcPeriodicStart */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 43 | #define OHCI_REG_LSTHRESHOLD (0x44) /* HcLSThreshold */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 44 | #define OHCI_REG_RHDESCRIPTORA (0x48) /* HcRhDescriptorA */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 45 | #define OHCI_REG_RHDESCRIPTORB (0x4C) /* HcRhDescriptorB */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 46 | #define OHCI_REG_RHSTATUS (0x50) /* HcRhStatus */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 47 | #define OHCI_REG_RHPORTSTATUS1 (0x54) /* HcRhPortStatus1 */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 48 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 49 | typedef void (usbisr_fnc_t)(void); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 50 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 51 | extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 52 | extern uint32_t ohciwrapp_reg_r(uint32_t reg_ofs); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 53 | extern void ohciwrapp_reg_w(uint32_t reg_ofs, uint32_t set_data); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 54 | extern void ohciwrapp_interrupt(uint32_t int_sense); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 55 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 56 | #ifdef __cplusplus |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 57 | } |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 58 | #endif |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 59 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 60 | #endif /* OHCI_WRAPP_RZ_A1_H */ |