forked for unsupported target
Dependents: stm32-disco-example DISCO-F469NI_BD_SD_Card_Control
Fork of USBHOST by
USBHost/TARGET_RENESAS/TARGET_VK_RZ_A1H/usb1/inc/usb1_host_dmacdrv.h@1:ab240722d7ef, 2017-02-15 (annotated)
- Committer:
- frq08711@LMECWL0871.LME.ST.COM
- Date:
- Wed Feb 15 10:49:44 2017 +0100
- Revision:
- 1:ab240722d7ef
update to mbed 5.3.5
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 1 | /******************************************************************************* |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 2 | * DISCLAIMER |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 3 | * This software is supplied by Renesas Electronics Corporation and is only |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 4 | * intended for use with Renesas products. No other uses are authorized. This |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 5 | * software is owned by Renesas Electronics Corporation and is protected under |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 6 | * all applicable laws, including copyright laws. |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 16 | * Renesas reserves the right, without notice, to make changes to this software |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 17 | * and to discontinue the availability of this software. By using this software, |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 18 | * you agree to the additional terms and conditions found by accessing the |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 19 | * following link: |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 20 | * http://www.renesas.com/disclaimer |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 21 | * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved. |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 22 | *******************************************************************************/ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 23 | /******************************************************************************* |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 24 | * File Name : usb1_host_dmacdrv.h |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 25 | * $Rev: 1116 $ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 26 | * $Date:: 2014-07-09 16:29:19 +0900#$ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 27 | * Description : RZ/A1H R7S72100 USB Sample Program |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 28 | *******************************************************************************/ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 29 | #ifndef USB1_HOST_DMACDRV_H |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 30 | #define USB1_HOST_DMACDRV_H |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 31 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 32 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 33 | /******************************************************************************* |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 34 | Includes <System Includes> , "Project Includes" |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 35 | *******************************************************************************/ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 36 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 37 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 38 | /******************************************************************************* |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 39 | Typedef definitions |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 40 | *******************************************************************************/ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 41 | typedef struct dmac_transinfo |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 42 | { |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 43 | uint32_t src_addr; /* Transfer source address */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 44 | uint32_t dst_addr; /* Transfer destination address */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 45 | uint32_t count; /* Transfer byte count */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 46 | uint32_t src_size; /* Transfer source data size */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 47 | uint32_t dst_size; /* Transfer destination data size */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 48 | uint32_t saddr_dir; /* Transfer source address direction */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 49 | uint32_t daddr_dir; /* Transfer destination address direction */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 50 | } dmac_transinfo_t; |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 51 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 52 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 53 | /******************************************************************************* |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 54 | Macro definitions |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 55 | *******************************************************************************/ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 56 | /* ==== Transfer specification of the sample program ==== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 57 | #define DMAC_SAMPLE_SINGLE (0) /* Single transfer */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 58 | #define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 59 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 60 | /* ==== DMA modes ==== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 61 | #define DMAC_MODE_REGISTER (0) /* Register mode */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 62 | #define DMAC_MODE_LINK (1) /* Link mode */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 63 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 64 | /* ==== Transfer requests ==== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 65 | #define DMAC_REQ_MODE_EXT (0) /* External request */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 66 | #define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 67 | #define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 68 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 69 | /* ==== DMAC transfer sizes ==== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 70 | #define DMAC_TRANS_SIZE_8 (0) /* 8 bits */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 71 | #define DMAC_TRANS_SIZE_16 (1) /* 16 bits */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 72 | #define DMAC_TRANS_SIZE_32 (2) /* 32 bits */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 73 | #define DMAC_TRANS_SIZE_64 (3) /* 64 bits */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 74 | #define DMAC_TRANS_SIZE_128 (4) /* 128 bits */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 75 | #define DMAC_TRANS_SIZE_256 (5) /* 256 bits */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 76 | #define DMAC_TRANS_SIZE_512 (6) /* 512 bits */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 77 | #define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 78 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 79 | /* ==== Address increment for transferring ==== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 80 | #define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 81 | #define DMAC_TRANS_ADR_INC (0) /* Increment */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 82 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 83 | /* ==== Method for detecting DMA request ==== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 84 | #define DMAC_REQ_DET_FALL (0) /* Falling edge detection */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 85 | #define DMAC_REQ_DET_RISE (1) /* Rising edge detection */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 86 | #define DMAC_REQ_DET_LOW (2) /* Low level detection */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 87 | #define DMAC_REQ_DET_HIGH (3) /* High level detection */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 88 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 89 | /* ==== Request Direction ==== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 90 | #define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 91 | #define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 92 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 93 | /* ==== Descriptors ==== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 94 | #define DMAC_DESC_HEADER (0) /* Header */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 95 | #define DMAC_DESC_SRC_ADDR (1) /* Source Address */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 96 | #define DMAC_DESC_DST_ADDR (2) /* Destination Address */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 97 | #define DMAC_DESC_COUNT (3) /* Transaction Byte */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 98 | #define DMAC_DESC_CHCFG (4) /* Channel Confg */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 99 | #define DMAC_DESC_CHITVL (5) /* Channel Interval */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 100 | #define DMAC_DESC_CHEXT (6) /* Channel Extension */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 101 | #define DMAC_DESC_LINK_ADDR (7) /* Link Address */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 102 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 103 | /* ==== On-chip peripheral module requests ===== */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 104 | typedef enum dmac_request_factor |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 105 | { |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 106 | DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 107 | DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 108 | DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 109 | DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 110 | DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 111 | DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 112 | DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 113 | DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 114 | } dmac_request_factor_t; |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 115 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 116 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 117 | /******************************************************************************* |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 118 | Variable Externs |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 119 | *******************************************************************************/ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 120 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 121 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 122 | /******************************************************************************* |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 123 | Functions Prototypes |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 124 | *******************************************************************************/ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 125 | void usb1_host_DMAC3_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation, |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 126 | uint32_t request_factor, uint32_t req_direction); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 127 | int32_t usb1_host_DMAC3_Open(uint32_t req); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 128 | void usb1_host_DMAC3_Close(uint32_t *remain); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 129 | void usb1_host_DMAC3_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 130 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 131 | void usb1_host_DMAC4_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation, |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 132 | uint32_t request_factor, uint32_t req_direction); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 133 | int32_t usb1_host_DMAC4_Open(uint32_t req); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 134 | void usb1_host_DMAC4_Close(uint32_t *remain); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 135 | void usb1_host_DMAC4_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count); |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 136 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 137 | #endif /* USB1_HOST_DMACDRV_H */ |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 138 | |
frq08711@LMECWL0871.LME.ST.COM | 1:ab240722d7ef | 139 | /* End of File */ |