james kain / Mbed 2 deprecated GPS_Incremental

JEK changes enabling proper recording of IMU/GPS datastrams - 02-APR-2013

Dependencies:   mbed

Fork of GPS_Incremental by Dan Matthews

ADIS16488.h@0:c746ee34feae, 2013-03-19 (annotated)

Committer:
dannyman939
Date:
Tue Mar 19 02:17:40 2013 +0000
Revision:
0:c746ee34feae
Child:
4:68268737ff89
Basic functionality, Chris Version 0.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dannyman939 0:c746ee34feae 1
dannyman939 0:c746ee34feae 2
dannyman939 0:c746ee34feae 3
dannyman939 0:c746ee34feae 4 //set up the SPI on pins 5, 6, 7 to read from the ADIS16488
dannyman939 0:c746ee34feae 5 SPI spi(p5, p6, p7); // mosi (DIN), miso (DOUT), sclk (CLK)
dannyman939 0:c746ee34feae 6 DigitalOut ADIS_CS(p8); //Chip Select for the ADIS SPI
dannyman939 0:c746ee34feae 7 InterruptIn ADIS_DR(p28); //DataReady interrupt connected to DIO2 for ADIS
dannyman939 0:c746ee34feae 8 DigitalOut ADIS_RST(p20); //ADIS reset pin
dannyman939 0:c746ee34feae 9
dannyman939 0:c746ee34feae 10 bool IMUDataReady = false;
dannyman939 0:c746ee34feae 11 int IMURecordCounter = 0;
dannyman939 0:c746ee34feae 12 //see Table 9 from page 11 of the ADIS16488 spec
dannyman939 0:c746ee34feae 13 //see fig 15 of spec -- note the low byte of the regsiter word is always zero
dannyman939 0:c746ee34feae 14 // X_DELTANG_LOW, Y_DELTANG_LOW, X_DETANG_LOW, X_DELTVEL_LOW, Y_DELTVEL_LOW, Z_DELTVEL_LOW
dannyman939 0:c746ee34feae 15 unsigned short LOW_REGISTER[] = {0x4000, 0x4400, 0x4800, 0x4C00, 0x5000, 0x5400};
dannyman939 0:c746ee34feae 16 // X_DELTANG_HIGH, Y_DELTANG_HIGH, X_DETANG_HIGH, X_DELTVEL_HIGH, Y_DELTVEL_HIGH, Z_DELTVEL_HIGH
dannyman939 0:c746ee34feae 17 unsigned short HIGH_REGISTER[] = {0x4200, 0x4600, 0x4A00, 0x4E00, 0x5200, 0x5600};
dannyman939 0:c746ee34feae 18
dannyman939 0:c746ee34feae 19 union WD { long dataWord; unsigned short pt[2];} wd;
dannyman939 0:c746ee34feae 20
dannyman939 0:c746ee34feae 21 #pragma pack(1)
dannyman939 0:c746ee34feae 22 struct IMUREC
dannyman939 0:c746ee34feae 23 {
dannyman939 0:c746ee34feae 24 unsigned long synch;
dannyman939 0:c746ee34feae 25 unsigned char msgID;
dannyman939 0:c746ee34feae 26 double GPSTime;
dannyman939 0:c746ee34feae 27 long dataWord[6];
dannyman939 0:c746ee34feae 28 } imuRec;
dannyman939 0:c746ee34feae 29
dannyman939 0:c746ee34feae 30
dannyman939 0:c746ee34feae 31
dannyman939 0:c746ee34feae 32 void IMUDataReadyISR(void)
dannyman939 0:c746ee34feae 33 {
dannyman939 0:c746ee34feae 34 imuRec.GPSTime = GPSTimemsecs + timeFromPPS.read_us()/1000000.0;
dannyman939 0:c746ee34feae 35 spi.write((int) HIGH_REGISTER[0]); // next read will return results from HIGH_REGITER[0]
dannyman939 0:c746ee34feae 36 for (int i=0; i<6; i++) //read the 6 rate and accel variables
dannyman939 0:c746ee34feae 37 {
dannyman939 0:c746ee34feae 38 wd.pt[1] = (unsigned short)spi.write((int) LOW_REGISTER[i]) ;
dannyman939 0:c746ee34feae 39 if (i<5) // dont this on the last because this was pre-called
dannyman939 0:c746ee34feae 40 {
dannyman939 0:c746ee34feae 41 wd.pt[0] = (unsigned short)spi.write((int) HIGH_REGISTER[i+1]);
dannyman939 0:c746ee34feae 42 }
dannyman939 0:c746ee34feae 43 imuRec.dataWord[i] = wd.dataWord; //data word is a signed long
dannyman939 0:c746ee34feae 44
dannyman939 0:c746ee34feae 45 }
dannyman939 0:c746ee34feae 46 IMUDataReady = true;
dannyman939 0:c746ee34feae 47 IMURecordCounter++;
dannyman939 0:c746ee34feae 48
dannyman939 0:c746ee34feae 49 return;
dannyman939 0:c746ee34feae 50 }
dannyman939 0:c746ee34feae 51
dannyman939 0:c746ee34feae 52 void setupADIS(void)
dannyman939 0:c746ee34feae 53 {
dannyman939 0:c746ee34feae 54 ADIS_DR.mode(PullDown);
dannyman939 0:c746ee34feae 55 ADIS_RST = 0;
dannyman939 0:c746ee34feae 56
dannyman939 0:c746ee34feae 57 printf("\nStart of ADIS test\n");
dannyman939 0:c746ee34feae 58 // set the IMU dataReady ISR
dannyman939 0:c746ee34feae 59 ADIS_DR.rise(&IMUDataReadyISR);
dannyman939 0:c746ee34feae 60
dannyman939 0:c746ee34feae 61 // Setup the mbed SPI for 16 bit data, high steady state clock,
dannyman939 0:c746ee34feae 62 // second edge capture, with a 1MHz clock rate
dannyman939 0:c746ee34feae 63 spi.format(16,3);
dannyman939 0:c746ee34feae 64 spi.frequency(1000000);
dannyman939 0:c746ee34feae 65
dannyman939 0:c746ee34feae 66 ADIS_CS = 1; //CS must be set high before it goes low cause the enable is the transition
dannyman939 0:c746ee34feae 67 ADIS_RST = 1;
dannyman939 0:c746ee34feae 68 wait(0.5);
dannyman939 0:c746ee34feae 69 ADIS_CS = 0; //set the Chip select low to enable the IMU SPI access
dannyman939 0:c746ee34feae 70
dannyman939 0:c746ee34feae 71 spi.write((int)0x8003); //change to page 3
dannyman939 0:c746ee34feae 72
dannyman939 0:c746ee34feae 73 //change the DECRATE to 98.4 Hz (this is also in page 3)
dannyman939 0:c746ee34feae 74 //the 8 sets the high bit to 1 indicating a write to a register
dannyman939 0:c746ee34feae 75 // The C abd D designate the registers for the DECRATE of Page 3
dannyman939 0:c746ee34feae 76 // The 17 sets the rate to: 2460/(23+1) = 102.5Hz
dannyman939 0:c746ee34feae 77 spi.write((int)0x8C17); //write high byte (only page number can be written in a single byte)
dannyman939 0:c746ee34feae 78 spi.write((int)0x8D00); //write the low byte of DECRATE
dannyman939 0:c746ee34feae 79
dannyman939 0:c746ee34feae 80 //to set the GPS VARF clock as the input synch clock for the IMU
dannyman939 0:c746ee34feae 81 //the high byte is CD indicating the synch is enabled on the rising edge of the input clock
dannyman939 0:c746ee34feae 82 //spi.write((int)0x86CD); //write high byte to register 0x06
dannyman939 0:c746ee34feae 83 //spi.write((int)0x8700); //write the low byte of 00 to registed 0x07
dannyman939 0:c746ee34feae 84
dannyman939 0:c746ee34feae 85 //change the page to 0 to get the data
dannyman939 0:c746ee34feae 86 spi.write((int)0x8000); //change to page 0
dannyman939 0:c746ee34feae 87
dannyman939 0:c746ee34feae 88 //set the IMU synch and message ID
dannyman939 0:c746ee34feae 89 imuRec.synch = 0xAA44121C; //same as the GPS synch words
dannyman939 0:c746ee34feae 90 imuRec.msgID=111; //IMU record ID
dannyman939 0:c746ee34feae 91 }