Encapsulates access to the Cypress CY14B101P nvSRAM module.
Diff: CY14B101P.h
- Revision:
- 0:eec14545c442
- Child:
- 1:0f4063d68380
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/CY14B101P.h Mon Jul 11 16:41:25 2011 +0000 @@ -0,0 +1,113 @@ +/**************************** +/ This library encapsulates (or will when completely implemented) +/ all software functions for reading and writing to the Cypress Semiconductor +/ CY14B101P nvSRAM module. +/ +/ As of July 11, 2011 RTC functions are not implemented. +/ +/ Author: Dr. Jeffrey Craighead +*****************************/ + + +#ifndef CY14B101P +#define CY14B101P + +/***** +* Includes +*****/ +#include "mbed.h" + + +/***** +* Status Register Instructions +*****/ +#define WREN 0x06 //Set Write Enable latch +#define WRDI 0x04 //Reset Write Enable latch +#define RDSR 0x05 //Read Status Register +#define WRSR 0x01 //Write Status Register + +/***** +* SRAM Instructions +*****/ +#define READ 0x03 //Read data from memory array +#define WRITE 0x02 //Write data to memory array + +/***** +* RTC Instructions +*****/ +#define WRTC 0x12 //Write Real Time Clock registers +#define RDRTC 0x13 //Read Real Time Clock registers + +/***** +* Special NV Instructions +*****/ +#define STORE 0x3C //Software Store (to NV memory) +#define RECALL 0x60 //Software Recall (from NV memory) +#define ASENB 0x59 //AutoStore Enable +#define ASDISB 0x19 //AutoStore Disable + +/***** +* Other Definitions +*****/ +#define MAXADDR 0x1FFF + +/***** +* Status Register Bits +*****/ +#define READY 0x00 //Read Only, Active Low, bit is 1 while a STORE or RECALL is in progress +#define WENABLE 0x01 //Write enabled bit +#define BP0 0x02; //Block protection bit 0 +#define BP1 0x03; //Block protection bit 1 +#define WPENABLE 0x07; //Enabled the use of the hardware Write Protect pin. + + +/***** +* Cypress CY14B101P SPI nvSRAM Memory +*****/ + +class NVSRAM { + +public: + + //Constructor - specify mbed pins for SPI connection to memory and the SPI clock rate + NVSRAM(PinName mosi, PinName miso, PinName sclk, PinName csel, int spifrequency, int spibits, int spimode); + + //Initialize the nvRAM status register allowing writes across the entire memory range. + void init(); + + //Write bytes to the SRAM + void writeBytes(char *bytes, unsigned int address, int length); + + //Read bytes from the SRAM + void readBytes(char *bytes, unsigned int address, int length); + + //Set the Real Time Clock + void setRTC(int century, int year, int month, int dayofmonth, int dayofweek, int hour, int minute, int second); + + //Read the RTC + int readRTC(); + + //Store the contents of SRAM to the NV memory + void nvStore(); + + //Restore the contents of NV memory to the SRAM + void nvRecall(); + + //Boolean to enable the AutoStore feature of the CY14B101P + //When enabled, the contents of the SRAM will automatically be stored + //to the NV memory on poweroff. Requires a capacitor between Vcap and Vss + void enableAutoStore(bool enable); + + //Write the status register + void writeStatusRegister(char status); + + //Read the status register + char readStatusRegister(); + +private: + int spifreq; + SPI spi_; + DigitalOut chipSel_; +}; + +#endif /* CY14B101P */ \ No newline at end of file