Simple implementation of the watchdog timer for NRF51xxx.

Dependents:   WatchdogTimerTest Seeed_Test_Wristband_final mbed-os-PF-UWBBEACON_v1_dev RB-2018-X_MPU_12

Committer:
jcady92
Date:
Tue Jun 30 16:19:16 2015 +0000
Revision:
0:172aa845e1d7
Child:
1:10fdcb411fbd
Initial commit.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jcady92 0:172aa845e1d7 1 #include "WatchdogTimer.h"
jcady92 0:172aa845e1d7 2
jcady92 0:172aa845e1d7 3 WatchdogTimer::WatchdogTimer(float seconds)
jcady92 0:172aa845e1d7 4 {
jcady92 0:172aa845e1d7 5 //Configure watchdog timer
jcady92 0:172aa845e1d7 6 //HALT_Pause: Pause watchdog when debugger stops chip
jcady92 0:172aa845e1d7 7 //Sleep_Run: Continue running watchdog when chip sleeps
jcady92 0:172aa845e1d7 8 NRF_WDT->CONFIG = (WDT_CONFIG_HALT_Pause << WDT_CONFIG_HALT_Pos) | ( WDT_CONFIG_SLEEP_Run << WDT_CONFIG_SLEEP_Pos);
jcady92 0:172aa845e1d7 9
jcady92 0:172aa845e1d7 10 //Set watchdog timeout (seconds * clock cycle)
jcady92 0:172aa845e1d7 11 NRF_WDT->CRV = seconds * (float)NRF_CLK_RATE;
jcady92 0:172aa845e1d7 12
jcady92 0:172aa845e1d7 13 //Enable reload register 0
jcady92 0:172aa845e1d7 14 NRF_WDT->RREN = WDT_RREN_RR0_Enabled << WDT_RREN_RR0_Pos;
jcady92 0:172aa845e1d7 15
jcady92 0:172aa845e1d7 16 //Start the watchdog timer
jcady92 0:172aa845e1d7 17 NRF_WDT->TASKS_START = 1;
jcady92 0:172aa845e1d7 18 }
jcady92 0:172aa845e1d7 19
jcady92 0:172aa845e1d7 20 void WatchdogTimer::kick()
jcady92 0:172aa845e1d7 21 {
jcady92 0:172aa845e1d7 22 //Reload register 0
jcady92 0:172aa845e1d7 23 NRF_WDT->RR[0] = WDT_RR_RR_Reload;
jcady92 0:172aa845e1d7 24 }