mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/hal/TARGET_NXP/TARGET_LPC408X/serial_api.c@259:da299e454ce7, 2014-07-18 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jul 18 14:15:09 2014 +0100
- Revision:
- 259:da299e454ce7
- Parent:
- 251:de9a1e4ffd79
- Child:
- 286:31249416b6f9
Synchronized with git revision df84f2b3e967624878b8b54e093a8a3a675f3ca7
Full URL: https://github.com/mbedmicro/mbed/commit/df84f2b3e967624878b8b54e093a8a3a675f3ca7/
New ARCH_GPRS target
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 15:4892fe388435 | 1 | /* mbed Microcontroller Library |
bogdanm | 15:4892fe388435 | 2 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 15:4892fe388435 | 3 | * |
bogdanm | 15:4892fe388435 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 15:4892fe388435 | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 15:4892fe388435 | 6 | * You may obtain a copy of the License at |
bogdanm | 15:4892fe388435 | 7 | * |
bogdanm | 15:4892fe388435 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 15:4892fe388435 | 9 | * |
bogdanm | 15:4892fe388435 | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 15:4892fe388435 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 15:4892fe388435 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 15:4892fe388435 | 13 | * See the License for the specific language governing permissions and |
bogdanm | 15:4892fe388435 | 14 | * limitations under the License. |
bogdanm | 15:4892fe388435 | 15 | */ |
bogdanm | 15:4892fe388435 | 16 | // math.h required for floating point operations for baud rate calculation |
bogdanm | 15:4892fe388435 | 17 | #include <math.h> |
bogdanm | 15:4892fe388435 | 18 | #include <string.h> |
mbed_official | 140:ca60b7a31055 | 19 | #include <stdlib.h> |
bogdanm | 15:4892fe388435 | 20 | |
bogdanm | 15:4892fe388435 | 21 | #include "serial_api.h" |
bogdanm | 15:4892fe388435 | 22 | #include "cmsis.h" |
bogdanm | 15:4892fe388435 | 23 | #include "pinmap.h" |
mbed_official | 251:de9a1e4ffd79 | 24 | #include "error.h" |
bogdanm | 15:4892fe388435 | 25 | |
bogdanm | 15:4892fe388435 | 26 | /****************************************************************************** |
bogdanm | 15:4892fe388435 | 27 | * INITIALIZATION |
bogdanm | 15:4892fe388435 | 28 | ******************************************************************************/ |
bogdanm | 15:4892fe388435 | 29 | static const PinMap PinMap_UART_TX[] = { |
bogdanm | 15:4892fe388435 | 30 | {P0_0, UART_3, 2}, |
bogdanm | 15:4892fe388435 | 31 | {P0_2, UART_0, 1}, |
bogdanm | 15:4892fe388435 | 32 | {P0_10, UART_2, 1}, |
bogdanm | 15:4892fe388435 | 33 | {P0_15, UART_1, 1}, |
bogdanm | 15:4892fe388435 | 34 | {P1_29, UART_4, 5}, |
bogdanm | 15:4892fe388435 | 35 | {P0_25, UART_3, 3}, |
bogdanm | 15:4892fe388435 | 36 | {P2_0 , UART_1, 2}, |
bogdanm | 15:4892fe388435 | 37 | {P2_8 , UART_2, 2}, |
bogdanm | 15:4892fe388435 | 38 | {P3_16, UART_1, 3}, |
bogdanm | 15:4892fe388435 | 39 | {P4_22, UART_2, 2}, |
bogdanm | 15:4892fe388435 | 40 | {P4_28, UART_3, 2}, |
bogdanm | 15:4892fe388435 | 41 | {P5_4, UART_4, 4}, |
bogdanm | 15:4892fe388435 | 42 | {NC , NC , 0} |
bogdanm | 15:4892fe388435 | 43 | }; |
bogdanm | 15:4892fe388435 | 44 | |
bogdanm | 15:4892fe388435 | 45 | static const PinMap PinMap_UART_RX[] = { |
bogdanm | 15:4892fe388435 | 46 | {P0_1 , UART_3, 2}, |
bogdanm | 15:4892fe388435 | 47 | {P0_3 , UART_0, 1}, |
bogdanm | 15:4892fe388435 | 48 | {P0_11, UART_2, 1}, |
bogdanm | 15:4892fe388435 | 49 | {P0_16, UART_1, 1}, |
bogdanm | 15:4892fe388435 | 50 | {P0_26, UART_3, 3}, |
bogdanm | 15:4892fe388435 | 51 | {P2_1 , UART_1, 2}, |
bogdanm | 15:4892fe388435 | 52 | {P2_9 , UART_2, 2}, |
bogdanm | 15:4892fe388435 | 53 | {P3_17, UART_1, 3}, |
bogdanm | 15:4892fe388435 | 54 | {P4_23, UART_2, 2}, |
bogdanm | 15:4892fe388435 | 55 | {P4_29, UART_3, 2}, |
bogdanm | 15:4892fe388435 | 56 | {P5_3, UART_4, 4}, |
bogdanm | 15:4892fe388435 | 57 | {NC , NC , 0} |
bogdanm | 15:4892fe388435 | 58 | }; |
bogdanm | 15:4892fe388435 | 59 | |
bogdanm | 15:4892fe388435 | 60 | #define UART_NUM 5 |
bogdanm | 15:4892fe388435 | 61 | |
bogdanm | 15:4892fe388435 | 62 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
bogdanm | 15:4892fe388435 | 63 | static uart_irq_handler irq_handler; |
bogdanm | 15:4892fe388435 | 64 | |
bogdanm | 15:4892fe388435 | 65 | int stdio_uart_inited = 0; |
bogdanm | 15:4892fe388435 | 66 | serial_t stdio_uart; |
bogdanm | 15:4892fe388435 | 67 | |
bogdanm | 15:4892fe388435 | 68 | void serial_init(serial_t *obj, PinName tx, PinName rx) { |
bogdanm | 15:4892fe388435 | 69 | int is_stdio_uart = 0; |
bogdanm | 15:4892fe388435 | 70 | |
bogdanm | 15:4892fe388435 | 71 | // determine the UART to use |
bogdanm | 15:4892fe388435 | 72 | UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
bogdanm | 15:4892fe388435 | 73 | UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
bogdanm | 15:4892fe388435 | 74 | UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx); |
mbed_official | 227:7bd0639b8911 | 75 | MBED_ASSERT((int)uart != NC); |
bogdanm | 15:4892fe388435 | 76 | |
bogdanm | 15:4892fe388435 | 77 | obj->uart = (LPC_UART_TypeDef *)uart; |
bogdanm | 15:4892fe388435 | 78 | // enable power |
bogdanm | 15:4892fe388435 | 79 | switch (uart) { |
bogdanm | 15:4892fe388435 | 80 | case UART_0: LPC_SC->PCONP |= 1 << 3; break; |
bogdanm | 15:4892fe388435 | 81 | case UART_1: LPC_SC->PCONP |= 1 << 4; break; |
bogdanm | 15:4892fe388435 | 82 | case UART_2: LPC_SC->PCONP |= 1 << 24; break; |
bogdanm | 15:4892fe388435 | 83 | case UART_3: LPC_SC->PCONP |= 1 << 25; break; |
bogdanm | 15:4892fe388435 | 84 | case UART_4: LPC_SC->PCONP |= 1 << 8; break; |
bogdanm | 15:4892fe388435 | 85 | } |
bogdanm | 15:4892fe388435 | 86 | |
bogdanm | 15:4892fe388435 | 87 | // enable fifos and default rx trigger level |
bogdanm | 15:4892fe388435 | 88 | obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled |
bogdanm | 15:4892fe388435 | 89 | | 0 << 1 // Rx Fifo Reset |
bogdanm | 15:4892fe388435 | 90 | | 0 << 2 // Tx Fifo Reset |
bogdanm | 15:4892fe388435 | 91 | | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars |
bogdanm | 15:4892fe388435 | 92 | |
bogdanm | 15:4892fe388435 | 93 | // disable irqs |
bogdanm | 15:4892fe388435 | 94 | obj->uart->IER = 0 << 0 // Rx Data available irq enable |
bogdanm | 15:4892fe388435 | 95 | | 0 << 1 // Tx Fifo empty irq enable |
bogdanm | 15:4892fe388435 | 96 | | 0 << 2; // Rx Line Status irq enable |
bogdanm | 15:4892fe388435 | 97 | |
bogdanm | 15:4892fe388435 | 98 | // set default baud rate and format |
bogdanm | 15:4892fe388435 | 99 | serial_baud (obj, 9600); |
bogdanm | 15:4892fe388435 | 100 | serial_format(obj, 8, ParityNone, 1); |
bogdanm | 15:4892fe388435 | 101 | |
bogdanm | 15:4892fe388435 | 102 | // pinout the chosen uart |
bogdanm | 15:4892fe388435 | 103 | pinmap_pinout(tx, PinMap_UART_TX); |
bogdanm | 15:4892fe388435 | 104 | pinmap_pinout(rx, PinMap_UART_RX); |
bogdanm | 15:4892fe388435 | 105 | |
bogdanm | 15:4892fe388435 | 106 | // set rx/tx pins in PullUp mode |
bogdanm | 15:4892fe388435 | 107 | pin_mode(tx, PullUp); |
bogdanm | 15:4892fe388435 | 108 | pin_mode(rx, PullUp); |
bogdanm | 15:4892fe388435 | 109 | |
bogdanm | 15:4892fe388435 | 110 | switch (uart) { |
bogdanm | 15:4892fe388435 | 111 | case UART_0: obj->index = 0; break; |
bogdanm | 15:4892fe388435 | 112 | case UART_1: obj->index = 1; break; |
bogdanm | 15:4892fe388435 | 113 | case UART_2: obj->index = 2; break; |
bogdanm | 15:4892fe388435 | 114 | case UART_3: obj->index = 3; break; |
bogdanm | 15:4892fe388435 | 115 | case UART_4: obj->index = 4; break; |
bogdanm | 15:4892fe388435 | 116 | } |
bogdanm | 15:4892fe388435 | 117 | |
bogdanm | 15:4892fe388435 | 118 | is_stdio_uart = (uart == STDIO_UART) ? (1) : (0); |
bogdanm | 15:4892fe388435 | 119 | |
bogdanm | 15:4892fe388435 | 120 | if (is_stdio_uart) { |
bogdanm | 15:4892fe388435 | 121 | stdio_uart_inited = 1; |
bogdanm | 15:4892fe388435 | 122 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
bogdanm | 15:4892fe388435 | 123 | } |
bogdanm | 15:4892fe388435 | 124 | } |
bogdanm | 15:4892fe388435 | 125 | |
bogdanm | 15:4892fe388435 | 126 | void serial_free(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 127 | serial_irq_ids[obj->index] = 0; |
bogdanm | 15:4892fe388435 | 128 | } |
bogdanm | 15:4892fe388435 | 129 | |
bogdanm | 15:4892fe388435 | 130 | // serial_baud |
bogdanm | 15:4892fe388435 | 131 | // set the baud rate, taking in to account the current SystemFrequency |
bogdanm | 15:4892fe388435 | 132 | void serial_baud(serial_t *obj, int baudrate) { |
bogdanm | 15:4892fe388435 | 133 | uint32_t PCLK = PeripheralClock; |
bogdanm | 15:4892fe388435 | 134 | |
bogdanm | 15:4892fe388435 | 135 | // First we check to see if the basic divide with no DivAddVal/MulVal |
bogdanm | 15:4892fe388435 | 136 | // ratio gives us an integer result. If it does, we set DivAddVal = 0, |
bogdanm | 15:4892fe388435 | 137 | // MulVal = 1. Otherwise, we search the valid ratio value range to find |
bogdanm | 15:4892fe388435 | 138 | // the closest match. This could be more elegant, using search methods |
bogdanm | 15:4892fe388435 | 139 | // and/or lookup tables, but the brute force method is not that much |
bogdanm | 15:4892fe388435 | 140 | // slower, and is more maintainable. |
bogdanm | 15:4892fe388435 | 141 | uint16_t DL = PCLK / (16 * baudrate); |
bogdanm | 15:4892fe388435 | 142 | |
bogdanm | 15:4892fe388435 | 143 | uint8_t DivAddVal = 0; |
bogdanm | 15:4892fe388435 | 144 | uint8_t MulVal = 1; |
bogdanm | 15:4892fe388435 | 145 | int hit = 0; |
bogdanm | 15:4892fe388435 | 146 | uint16_t dlv; |
bogdanm | 15:4892fe388435 | 147 | uint8_t mv, dav; |
bogdanm | 15:4892fe388435 | 148 | if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder |
mbed_official | 51:7838415c99e7 | 149 | int err_best = baudrate, b; |
mbed_official | 51:7838415c99e7 | 150 | for (mv = 1; mv < 16 && !hit; mv++) |
mbed_official | 51:7838415c99e7 | 151 | { |
mbed_official | 51:7838415c99e7 | 152 | for (dav = 0; dav < mv; dav++) |
mbed_official | 51:7838415c99e7 | 153 | { |
mbed_official | 51:7838415c99e7 | 154 | // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul)) |
mbed_official | 51:7838415c99e7 | 155 | // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul)) |
mbed_official | 51:7838415c99e7 | 156 | // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding |
mbed_official | 51:7838415c99e7 | 157 | // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision |
mbed_official | 51:7838415c99e7 | 158 | // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding |
mbed_official | 51:7838415c99e7 | 159 | |
mbed_official | 51:7838415c99e7 | 160 | if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom |
mbed_official | 51:7838415c99e7 | 161 | dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2; |
mbed_official | 51:7838415c99e7 | 162 | else // 2 bits headroom, use more precision |
mbed_official | 51:7838415c99e7 | 163 | dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2; |
mbed_official | 51:7838415c99e7 | 164 | |
mbed_official | 51:7838415c99e7 | 165 | // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood |
mbed_official | 51:7838415c99e7 | 166 | if (dlv == 0) |
mbed_official | 51:7838415c99e7 | 167 | dlv = 1; |
mbed_official | 51:7838415c99e7 | 168 | |
mbed_official | 51:7838415c99e7 | 169 | // datasheet says if dav > 0 then DL must be >= 2 |
mbed_official | 51:7838415c99e7 | 170 | if ((dav > 0) && (dlv < 2)) |
mbed_official | 51:7838415c99e7 | 171 | dlv = 2; |
mbed_official | 51:7838415c99e7 | 172 | |
mbed_official | 51:7838415c99e7 | 173 | // integer rearrangement of the baudrate equation (with rounding) |
mbed_official | 51:7838415c99e7 | 174 | b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2; |
mbed_official | 51:7838415c99e7 | 175 | |
mbed_official | 51:7838415c99e7 | 176 | // check to see how we went |
mbed_official | 51:7838415c99e7 | 177 | b = abs(b - baudrate); |
mbed_official | 51:7838415c99e7 | 178 | if (b < err_best) |
mbed_official | 51:7838415c99e7 | 179 | { |
mbed_official | 51:7838415c99e7 | 180 | err_best = b; |
mbed_official | 51:7838415c99e7 | 181 | |
mbed_official | 51:7838415c99e7 | 182 | DL = dlv; |
mbed_official | 51:7838415c99e7 | 183 | MulVal = mv; |
mbed_official | 51:7838415c99e7 | 184 | DivAddVal = dav; |
mbed_official | 51:7838415c99e7 | 185 | |
mbed_official | 51:7838415c99e7 | 186 | if (b == baudrate) |
mbed_official | 51:7838415c99e7 | 187 | { |
mbed_official | 51:7838415c99e7 | 188 | hit = 1; |
mbed_official | 51:7838415c99e7 | 189 | break; |
bogdanm | 15:4892fe388435 | 190 | } |
bogdanm | 15:4892fe388435 | 191 | } |
bogdanm | 15:4892fe388435 | 192 | } |
bogdanm | 15:4892fe388435 | 193 | } |
bogdanm | 15:4892fe388435 | 194 | } |
bogdanm | 15:4892fe388435 | 195 | |
bogdanm | 15:4892fe388435 | 196 | // set LCR[DLAB] to enable writing to divider registers |
bogdanm | 15:4892fe388435 | 197 | obj->uart->LCR |= (1 << 7); |
bogdanm | 15:4892fe388435 | 198 | |
bogdanm | 15:4892fe388435 | 199 | // set divider values |
bogdanm | 15:4892fe388435 | 200 | obj->uart->DLM = (DL >> 8) & 0xFF; |
bogdanm | 15:4892fe388435 | 201 | obj->uart->DLL = (DL >> 0) & 0xFF; |
bogdanm | 15:4892fe388435 | 202 | obj->uart->FDR = (uint32_t) DivAddVal << 0 |
bogdanm | 15:4892fe388435 | 203 | | (uint32_t) MulVal << 4; |
bogdanm | 15:4892fe388435 | 204 | |
bogdanm | 15:4892fe388435 | 205 | // clear LCR[DLAB] |
bogdanm | 15:4892fe388435 | 206 | obj->uart->LCR &= ~(1 << 7); |
bogdanm | 15:4892fe388435 | 207 | } |
bogdanm | 15:4892fe388435 | 208 | |
bogdanm | 15:4892fe388435 | 209 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
mbed_official | 227:7bd0639b8911 | 210 | MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits |
mbed_official | 227:7bd0639b8911 | 211 | MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits |
mbed_official | 227:7bd0639b8911 | 212 | MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) || |
mbed_official | 227:7bd0639b8911 | 213 | (parity == ParityForced1) || (parity == ParityForced0)); |
mbed_official | 227:7bd0639b8911 | 214 | |
bogdanm | 15:4892fe388435 | 215 | stop_bits -= 1; |
bogdanm | 15:4892fe388435 | 216 | data_bits -= 5; |
bogdanm | 15:4892fe388435 | 217 | |
bogdanm | 15:4892fe388435 | 218 | int parity_enable, parity_select; |
bogdanm | 15:4892fe388435 | 219 | switch (parity) { |
bogdanm | 15:4892fe388435 | 220 | case ParityNone: parity_enable = 0; parity_select = 0; break; |
bogdanm | 15:4892fe388435 | 221 | case ParityOdd : parity_enable = 1; parity_select = 0; break; |
bogdanm | 15:4892fe388435 | 222 | case ParityEven: parity_enable = 1; parity_select = 1; break; |
bogdanm | 15:4892fe388435 | 223 | case ParityForced1: parity_enable = 1; parity_select = 2; break; |
bogdanm | 15:4892fe388435 | 224 | case ParityForced0: parity_enable = 1; parity_select = 3; break; |
bogdanm | 15:4892fe388435 | 225 | default: |
mbed_official | 227:7bd0639b8911 | 226 | break; |
bogdanm | 15:4892fe388435 | 227 | } |
bogdanm | 15:4892fe388435 | 228 | |
bogdanm | 15:4892fe388435 | 229 | obj->uart->LCR = data_bits << 0 |
bogdanm | 15:4892fe388435 | 230 | | stop_bits << 2 |
bogdanm | 15:4892fe388435 | 231 | | parity_enable << 3 |
bogdanm | 15:4892fe388435 | 232 | | parity_select << 4; |
bogdanm | 15:4892fe388435 | 233 | } |
bogdanm | 15:4892fe388435 | 234 | |
bogdanm | 15:4892fe388435 | 235 | /****************************************************************************** |
bogdanm | 15:4892fe388435 | 236 | * INTERRUPTS HANDLING |
bogdanm | 15:4892fe388435 | 237 | ******************************************************************************/ |
bogdanm | 15:4892fe388435 | 238 | static inline void uart_irq(uint32_t iir, uint32_t index) { |
bogdanm | 15:4892fe388435 | 239 | // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling |
bogdanm | 15:4892fe388435 | 240 | SerialIrq irq_type; |
bogdanm | 15:4892fe388435 | 241 | switch (iir) { |
bogdanm | 15:4892fe388435 | 242 | case 1: irq_type = TxIrq; break; |
bogdanm | 15:4892fe388435 | 243 | case 2: irq_type = RxIrq; break; |
bogdanm | 15:4892fe388435 | 244 | default: return; |
bogdanm | 15:4892fe388435 | 245 | } |
bogdanm | 15:4892fe388435 | 246 | |
bogdanm | 15:4892fe388435 | 247 | if (serial_irq_ids[index] != 0) |
bogdanm | 15:4892fe388435 | 248 | irq_handler(serial_irq_ids[index], irq_type); |
bogdanm | 15:4892fe388435 | 249 | } |
bogdanm | 15:4892fe388435 | 250 | |
bogdanm | 15:4892fe388435 | 251 | void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);} |
bogdanm | 15:4892fe388435 | 252 | void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);} |
bogdanm | 15:4892fe388435 | 253 | void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);} |
bogdanm | 15:4892fe388435 | 254 | void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);} |
bogdanm | 15:4892fe388435 | 255 | void uart4_irq() {uart_irq((LPC_UART4->IIR >> 1) & 0x7, 4);} |
bogdanm | 15:4892fe388435 | 256 | |
bogdanm | 15:4892fe388435 | 257 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
bogdanm | 15:4892fe388435 | 258 | irq_handler = handler; |
bogdanm | 15:4892fe388435 | 259 | serial_irq_ids[obj->index] = id; |
bogdanm | 15:4892fe388435 | 260 | } |
bogdanm | 15:4892fe388435 | 261 | |
bogdanm | 15:4892fe388435 | 262 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
bogdanm | 15:4892fe388435 | 263 | IRQn_Type irq_n = (IRQn_Type)0; |
bogdanm | 15:4892fe388435 | 264 | uint32_t vector = 0; |
bogdanm | 15:4892fe388435 | 265 | switch ((int)obj->uart) { |
bogdanm | 15:4892fe388435 | 266 | case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break; |
bogdanm | 15:4892fe388435 | 267 | case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break; |
bogdanm | 15:4892fe388435 | 268 | case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break; |
bogdanm | 15:4892fe388435 | 269 | case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break; |
bogdanm | 15:4892fe388435 | 270 | case UART_4: irq_n=UART4_IRQn; vector = (uint32_t)&uart4_irq; break; |
bogdanm | 15:4892fe388435 | 271 | } |
bogdanm | 15:4892fe388435 | 272 | |
bogdanm | 15:4892fe388435 | 273 | if (enable) { |
bogdanm | 15:4892fe388435 | 274 | obj->uart->IER |= 1 << irq; |
bogdanm | 15:4892fe388435 | 275 | NVIC_SetVector(irq_n, vector); |
bogdanm | 15:4892fe388435 | 276 | NVIC_EnableIRQ(irq_n); |
bogdanm | 15:4892fe388435 | 277 | } else { // disable |
bogdanm | 15:4892fe388435 | 278 | int all_disabled = 0; |
bogdanm | 15:4892fe388435 | 279 | SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq); |
bogdanm | 15:4892fe388435 | 280 | obj->uart->IER &= ~(1 << irq); |
bogdanm | 15:4892fe388435 | 281 | all_disabled = (obj->uart->IER & (1 << other_irq)) == 0; |
bogdanm | 15:4892fe388435 | 282 | if (all_disabled) |
bogdanm | 15:4892fe388435 | 283 | NVIC_DisableIRQ(irq_n); |
bogdanm | 15:4892fe388435 | 284 | } |
bogdanm | 15:4892fe388435 | 285 | } |
bogdanm | 15:4892fe388435 | 286 | |
bogdanm | 15:4892fe388435 | 287 | /****************************************************************************** |
bogdanm | 15:4892fe388435 | 288 | * READ/WRITE |
bogdanm | 15:4892fe388435 | 289 | ******************************************************************************/ |
bogdanm | 15:4892fe388435 | 290 | int serial_getc(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 291 | while (!serial_readable(obj)); |
bogdanm | 15:4892fe388435 | 292 | return obj->uart->RBR; |
bogdanm | 15:4892fe388435 | 293 | } |
bogdanm | 15:4892fe388435 | 294 | |
bogdanm | 15:4892fe388435 | 295 | void serial_putc(serial_t *obj, int c) { |
bogdanm | 15:4892fe388435 | 296 | while (!serial_writable(obj)); |
bogdanm | 15:4892fe388435 | 297 | obj->uart->THR = c; |
bogdanm | 15:4892fe388435 | 298 | } |
bogdanm | 15:4892fe388435 | 299 | |
bogdanm | 15:4892fe388435 | 300 | int serial_readable(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 301 | return obj->uart->LSR & 0x01; |
bogdanm | 15:4892fe388435 | 302 | } |
bogdanm | 15:4892fe388435 | 303 | |
bogdanm | 15:4892fe388435 | 304 | int serial_writable(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 305 | return obj->uart->LSR & 0x20; |
bogdanm | 15:4892fe388435 | 306 | } |
bogdanm | 15:4892fe388435 | 307 | |
bogdanm | 15:4892fe388435 | 308 | void serial_clear(serial_t *obj) { |
mbed_official | 29:6ac4027eff2b | 309 | obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled |
mbed_official | 29:6ac4027eff2b | 310 | | 1 << 1 // rx FIFO reset |
mbed_official | 29:6ac4027eff2b | 311 | | 1 << 2 // tx FIFO reset |
mbed_official | 29:6ac4027eff2b | 312 | | 0 << 6; // interrupt depth |
bogdanm | 15:4892fe388435 | 313 | } |
bogdanm | 15:4892fe388435 | 314 | |
bogdanm | 15:4892fe388435 | 315 | void serial_pinout_tx(PinName tx) { |
bogdanm | 15:4892fe388435 | 316 | pinmap_pinout(tx, PinMap_UART_TX); |
bogdanm | 15:4892fe388435 | 317 | } |
bogdanm | 15:4892fe388435 | 318 | |
bogdanm | 15:4892fe388435 | 319 | void serial_break_set(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 320 | obj->uart->LCR |= (1 << 6); |
bogdanm | 15:4892fe388435 | 321 | } |
bogdanm | 15:4892fe388435 | 322 | |
bogdanm | 15:4892fe388435 | 323 | void serial_break_clear(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 324 | obj->uart->LCR &= ~(1 << 6); |
bogdanm | 15:4892fe388435 | 325 | } |
bogdanm | 15:4892fe388435 | 326 |