mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/hal/TARGET_NXP/TARGET_LPC408X/serial_api.c@51:7838415c99e7, 2013-12-02 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Dec 02 10:00:04 2013 +0000
- Revision:
- 51:7838415c99e7
- Parent:
- 29:6ac4027eff2b
- Child:
- 140:ca60b7a31055
Synchronized with git revision 6aaa1345164ad42bf681b857dc768b1b65a07595
Full URL: https://github.com/mbedmicro/mbed/commit/6aaa1345164ad42bf681b857dc768b1b65a07595/
Added (deep)sleep to KL25Z
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 15:4892fe388435 | 1 | /* mbed Microcontroller Library |
bogdanm | 15:4892fe388435 | 2 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 15:4892fe388435 | 3 | * |
bogdanm | 15:4892fe388435 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 15:4892fe388435 | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 15:4892fe388435 | 6 | * You may obtain a copy of the License at |
bogdanm | 15:4892fe388435 | 7 | * |
bogdanm | 15:4892fe388435 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 15:4892fe388435 | 9 | * |
bogdanm | 15:4892fe388435 | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 15:4892fe388435 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 15:4892fe388435 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 15:4892fe388435 | 13 | * See the License for the specific language governing permissions and |
bogdanm | 15:4892fe388435 | 14 | * limitations under the License. |
bogdanm | 15:4892fe388435 | 15 | */ |
bogdanm | 15:4892fe388435 | 16 | // math.h required for floating point operations for baud rate calculation |
bogdanm | 15:4892fe388435 | 17 | #include <math.h> |
bogdanm | 15:4892fe388435 | 18 | #include <string.h> |
bogdanm | 15:4892fe388435 | 19 | |
bogdanm | 15:4892fe388435 | 20 | #include "serial_api.h" |
bogdanm | 15:4892fe388435 | 21 | #include "cmsis.h" |
bogdanm | 15:4892fe388435 | 22 | #include "pinmap.h" |
bogdanm | 15:4892fe388435 | 23 | #include "error.h" |
bogdanm | 15:4892fe388435 | 24 | |
bogdanm | 15:4892fe388435 | 25 | /****************************************************************************** |
bogdanm | 15:4892fe388435 | 26 | * INITIALIZATION |
bogdanm | 15:4892fe388435 | 27 | ******************************************************************************/ |
bogdanm | 15:4892fe388435 | 28 | static const PinMap PinMap_UART_TX[] = { |
bogdanm | 15:4892fe388435 | 29 | {P0_0, UART_3, 2}, |
bogdanm | 15:4892fe388435 | 30 | {P0_2, UART_0, 1}, |
bogdanm | 15:4892fe388435 | 31 | {P0_10, UART_2, 1}, |
bogdanm | 15:4892fe388435 | 32 | {P0_15, UART_1, 1}, |
bogdanm | 15:4892fe388435 | 33 | {P1_29, UART_4, 5}, |
bogdanm | 15:4892fe388435 | 34 | {P0_25, UART_3, 3}, |
bogdanm | 15:4892fe388435 | 35 | {P2_0 , UART_1, 2}, |
bogdanm | 15:4892fe388435 | 36 | {P2_8 , UART_2, 2}, |
bogdanm | 15:4892fe388435 | 37 | {P3_16, UART_1, 3}, |
bogdanm | 15:4892fe388435 | 38 | {P4_22, UART_2, 2}, |
bogdanm | 15:4892fe388435 | 39 | {P4_28, UART_3, 2}, |
bogdanm | 15:4892fe388435 | 40 | {P5_4, UART_4, 4}, |
bogdanm | 15:4892fe388435 | 41 | {NC , NC , 0} |
bogdanm | 15:4892fe388435 | 42 | }; |
bogdanm | 15:4892fe388435 | 43 | |
bogdanm | 15:4892fe388435 | 44 | static const PinMap PinMap_UART_RX[] = { |
bogdanm | 15:4892fe388435 | 45 | {P0_1 , UART_3, 2}, |
bogdanm | 15:4892fe388435 | 46 | {P0_3 , UART_0, 1}, |
bogdanm | 15:4892fe388435 | 47 | {P0_11, UART_2, 1}, |
bogdanm | 15:4892fe388435 | 48 | {P0_16, UART_1, 1}, |
bogdanm | 15:4892fe388435 | 49 | {P0_26, UART_3, 3}, |
bogdanm | 15:4892fe388435 | 50 | {P2_1 , UART_1, 2}, |
bogdanm | 15:4892fe388435 | 51 | {P2_9 , UART_2, 2}, |
bogdanm | 15:4892fe388435 | 52 | {P3_17, UART_1, 3}, |
bogdanm | 15:4892fe388435 | 53 | {P4_23, UART_2, 2}, |
bogdanm | 15:4892fe388435 | 54 | {P4_29, UART_3, 2}, |
bogdanm | 15:4892fe388435 | 55 | {P5_3, UART_4, 4}, |
bogdanm | 15:4892fe388435 | 56 | {NC , NC , 0} |
bogdanm | 15:4892fe388435 | 57 | }; |
bogdanm | 15:4892fe388435 | 58 | |
bogdanm | 15:4892fe388435 | 59 | #define UART_NUM 5 |
bogdanm | 15:4892fe388435 | 60 | |
bogdanm | 15:4892fe388435 | 61 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
bogdanm | 15:4892fe388435 | 62 | static uart_irq_handler irq_handler; |
bogdanm | 15:4892fe388435 | 63 | |
bogdanm | 15:4892fe388435 | 64 | int stdio_uart_inited = 0; |
bogdanm | 15:4892fe388435 | 65 | serial_t stdio_uart; |
bogdanm | 15:4892fe388435 | 66 | |
bogdanm | 15:4892fe388435 | 67 | void serial_init(serial_t *obj, PinName tx, PinName rx) { |
bogdanm | 15:4892fe388435 | 68 | int is_stdio_uart = 0; |
bogdanm | 15:4892fe388435 | 69 | |
bogdanm | 15:4892fe388435 | 70 | // determine the UART to use |
bogdanm | 15:4892fe388435 | 71 | UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
bogdanm | 15:4892fe388435 | 72 | UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
bogdanm | 15:4892fe388435 | 73 | UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx); |
bogdanm | 15:4892fe388435 | 74 | if ((int)uart == NC) { |
bogdanm | 15:4892fe388435 | 75 | error("Serial pinout mapping failed"); |
bogdanm | 15:4892fe388435 | 76 | } |
bogdanm | 15:4892fe388435 | 77 | |
bogdanm | 15:4892fe388435 | 78 | obj->uart = (LPC_UART_TypeDef *)uart; |
bogdanm | 15:4892fe388435 | 79 | // enable power |
bogdanm | 15:4892fe388435 | 80 | switch (uart) { |
bogdanm | 15:4892fe388435 | 81 | case UART_0: LPC_SC->PCONP |= 1 << 3; break; |
bogdanm | 15:4892fe388435 | 82 | case UART_1: LPC_SC->PCONP |= 1 << 4; break; |
bogdanm | 15:4892fe388435 | 83 | case UART_2: LPC_SC->PCONP |= 1 << 24; break; |
bogdanm | 15:4892fe388435 | 84 | case UART_3: LPC_SC->PCONP |= 1 << 25; break; |
bogdanm | 15:4892fe388435 | 85 | case UART_4: LPC_SC->PCONP |= 1 << 8; break; |
bogdanm | 15:4892fe388435 | 86 | } |
bogdanm | 15:4892fe388435 | 87 | |
bogdanm | 15:4892fe388435 | 88 | // enable fifos and default rx trigger level |
bogdanm | 15:4892fe388435 | 89 | obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled |
bogdanm | 15:4892fe388435 | 90 | | 0 << 1 // Rx Fifo Reset |
bogdanm | 15:4892fe388435 | 91 | | 0 << 2 // Tx Fifo Reset |
bogdanm | 15:4892fe388435 | 92 | | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars |
bogdanm | 15:4892fe388435 | 93 | |
bogdanm | 15:4892fe388435 | 94 | // disable irqs |
bogdanm | 15:4892fe388435 | 95 | obj->uart->IER = 0 << 0 // Rx Data available irq enable |
bogdanm | 15:4892fe388435 | 96 | | 0 << 1 // Tx Fifo empty irq enable |
bogdanm | 15:4892fe388435 | 97 | | 0 << 2; // Rx Line Status irq enable |
bogdanm | 15:4892fe388435 | 98 | |
bogdanm | 15:4892fe388435 | 99 | // set default baud rate and format |
bogdanm | 15:4892fe388435 | 100 | serial_baud (obj, 9600); |
bogdanm | 15:4892fe388435 | 101 | serial_format(obj, 8, ParityNone, 1); |
bogdanm | 15:4892fe388435 | 102 | |
bogdanm | 15:4892fe388435 | 103 | // pinout the chosen uart |
bogdanm | 15:4892fe388435 | 104 | pinmap_pinout(tx, PinMap_UART_TX); |
bogdanm | 15:4892fe388435 | 105 | pinmap_pinout(rx, PinMap_UART_RX); |
bogdanm | 15:4892fe388435 | 106 | |
bogdanm | 15:4892fe388435 | 107 | // set rx/tx pins in PullUp mode |
bogdanm | 15:4892fe388435 | 108 | pin_mode(tx, PullUp); |
bogdanm | 15:4892fe388435 | 109 | pin_mode(rx, PullUp); |
bogdanm | 15:4892fe388435 | 110 | |
bogdanm | 15:4892fe388435 | 111 | switch (uart) { |
bogdanm | 15:4892fe388435 | 112 | case UART_0: obj->index = 0; break; |
bogdanm | 15:4892fe388435 | 113 | case UART_1: obj->index = 1; break; |
bogdanm | 15:4892fe388435 | 114 | case UART_2: obj->index = 2; break; |
bogdanm | 15:4892fe388435 | 115 | case UART_3: obj->index = 3; break; |
bogdanm | 15:4892fe388435 | 116 | case UART_4: obj->index = 4; break; |
bogdanm | 15:4892fe388435 | 117 | } |
bogdanm | 15:4892fe388435 | 118 | |
bogdanm | 15:4892fe388435 | 119 | is_stdio_uart = (uart == STDIO_UART) ? (1) : (0); |
bogdanm | 15:4892fe388435 | 120 | |
bogdanm | 15:4892fe388435 | 121 | if (is_stdio_uart) { |
bogdanm | 15:4892fe388435 | 122 | stdio_uart_inited = 1; |
bogdanm | 15:4892fe388435 | 123 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
bogdanm | 15:4892fe388435 | 124 | } |
bogdanm | 15:4892fe388435 | 125 | } |
bogdanm | 15:4892fe388435 | 126 | |
bogdanm | 15:4892fe388435 | 127 | void serial_free(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 128 | serial_irq_ids[obj->index] = 0; |
bogdanm | 15:4892fe388435 | 129 | } |
bogdanm | 15:4892fe388435 | 130 | |
bogdanm | 15:4892fe388435 | 131 | // serial_baud |
bogdanm | 15:4892fe388435 | 132 | // set the baud rate, taking in to account the current SystemFrequency |
bogdanm | 15:4892fe388435 | 133 | void serial_baud(serial_t *obj, int baudrate) { |
bogdanm | 15:4892fe388435 | 134 | uint32_t PCLK = PeripheralClock; |
bogdanm | 15:4892fe388435 | 135 | |
bogdanm | 15:4892fe388435 | 136 | // First we check to see if the basic divide with no DivAddVal/MulVal |
bogdanm | 15:4892fe388435 | 137 | // ratio gives us an integer result. If it does, we set DivAddVal = 0, |
bogdanm | 15:4892fe388435 | 138 | // MulVal = 1. Otherwise, we search the valid ratio value range to find |
bogdanm | 15:4892fe388435 | 139 | // the closest match. This could be more elegant, using search methods |
bogdanm | 15:4892fe388435 | 140 | // and/or lookup tables, but the brute force method is not that much |
bogdanm | 15:4892fe388435 | 141 | // slower, and is more maintainable. |
bogdanm | 15:4892fe388435 | 142 | uint16_t DL = PCLK / (16 * baudrate); |
bogdanm | 15:4892fe388435 | 143 | |
bogdanm | 15:4892fe388435 | 144 | uint8_t DivAddVal = 0; |
bogdanm | 15:4892fe388435 | 145 | uint8_t MulVal = 1; |
bogdanm | 15:4892fe388435 | 146 | int hit = 0; |
bogdanm | 15:4892fe388435 | 147 | uint16_t dlv; |
bogdanm | 15:4892fe388435 | 148 | uint8_t mv, dav; |
bogdanm | 15:4892fe388435 | 149 | if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder |
mbed_official | 51:7838415c99e7 | 150 | int err_best = baudrate, b; |
mbed_official | 51:7838415c99e7 | 151 | for (mv = 1; mv < 16 && !hit; mv++) |
mbed_official | 51:7838415c99e7 | 152 | { |
mbed_official | 51:7838415c99e7 | 153 | for (dav = 0; dav < mv; dav++) |
mbed_official | 51:7838415c99e7 | 154 | { |
mbed_official | 51:7838415c99e7 | 155 | // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul)) |
mbed_official | 51:7838415c99e7 | 156 | // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul)) |
mbed_official | 51:7838415c99e7 | 157 | // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding |
mbed_official | 51:7838415c99e7 | 158 | // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision |
mbed_official | 51:7838415c99e7 | 159 | // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding |
mbed_official | 51:7838415c99e7 | 160 | |
mbed_official | 51:7838415c99e7 | 161 | if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom |
mbed_official | 51:7838415c99e7 | 162 | dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2; |
mbed_official | 51:7838415c99e7 | 163 | else // 2 bits headroom, use more precision |
mbed_official | 51:7838415c99e7 | 164 | dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2; |
mbed_official | 51:7838415c99e7 | 165 | |
mbed_official | 51:7838415c99e7 | 166 | // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood |
mbed_official | 51:7838415c99e7 | 167 | if (dlv == 0) |
mbed_official | 51:7838415c99e7 | 168 | dlv = 1; |
mbed_official | 51:7838415c99e7 | 169 | |
mbed_official | 51:7838415c99e7 | 170 | // datasheet says if dav > 0 then DL must be >= 2 |
mbed_official | 51:7838415c99e7 | 171 | if ((dav > 0) && (dlv < 2)) |
mbed_official | 51:7838415c99e7 | 172 | dlv = 2; |
mbed_official | 51:7838415c99e7 | 173 | |
mbed_official | 51:7838415c99e7 | 174 | // integer rearrangement of the baudrate equation (with rounding) |
mbed_official | 51:7838415c99e7 | 175 | b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2; |
mbed_official | 51:7838415c99e7 | 176 | |
mbed_official | 51:7838415c99e7 | 177 | // check to see how we went |
mbed_official | 51:7838415c99e7 | 178 | b = abs(b - baudrate); |
mbed_official | 51:7838415c99e7 | 179 | if (b < err_best) |
mbed_official | 51:7838415c99e7 | 180 | { |
mbed_official | 51:7838415c99e7 | 181 | err_best = b; |
mbed_official | 51:7838415c99e7 | 182 | |
mbed_official | 51:7838415c99e7 | 183 | DL = dlv; |
mbed_official | 51:7838415c99e7 | 184 | MulVal = mv; |
mbed_official | 51:7838415c99e7 | 185 | DivAddVal = dav; |
mbed_official | 51:7838415c99e7 | 186 | |
mbed_official | 51:7838415c99e7 | 187 | if (b == baudrate) |
mbed_official | 51:7838415c99e7 | 188 | { |
mbed_official | 51:7838415c99e7 | 189 | hit = 1; |
mbed_official | 51:7838415c99e7 | 190 | break; |
bogdanm | 15:4892fe388435 | 191 | } |
bogdanm | 15:4892fe388435 | 192 | } |
bogdanm | 15:4892fe388435 | 193 | } |
bogdanm | 15:4892fe388435 | 194 | } |
bogdanm | 15:4892fe388435 | 195 | } |
bogdanm | 15:4892fe388435 | 196 | |
bogdanm | 15:4892fe388435 | 197 | // set LCR[DLAB] to enable writing to divider registers |
bogdanm | 15:4892fe388435 | 198 | obj->uart->LCR |= (1 << 7); |
bogdanm | 15:4892fe388435 | 199 | |
bogdanm | 15:4892fe388435 | 200 | // set divider values |
bogdanm | 15:4892fe388435 | 201 | obj->uart->DLM = (DL >> 8) & 0xFF; |
bogdanm | 15:4892fe388435 | 202 | obj->uart->DLL = (DL >> 0) & 0xFF; |
bogdanm | 15:4892fe388435 | 203 | obj->uart->FDR = (uint32_t) DivAddVal << 0 |
bogdanm | 15:4892fe388435 | 204 | | (uint32_t) MulVal << 4; |
bogdanm | 15:4892fe388435 | 205 | |
bogdanm | 15:4892fe388435 | 206 | // clear LCR[DLAB] |
bogdanm | 15:4892fe388435 | 207 | obj->uart->LCR &= ~(1 << 7); |
bogdanm | 15:4892fe388435 | 208 | } |
bogdanm | 15:4892fe388435 | 209 | |
bogdanm | 15:4892fe388435 | 210 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
bogdanm | 15:4892fe388435 | 211 | // 0: 1 stop bits, 1: 2 stop bits |
bogdanm | 15:4892fe388435 | 212 | if (stop_bits != 1 && stop_bits != 2) { |
bogdanm | 15:4892fe388435 | 213 | error("Invalid stop bits specified"); |
bogdanm | 15:4892fe388435 | 214 | } |
bogdanm | 15:4892fe388435 | 215 | stop_bits -= 1; |
bogdanm | 15:4892fe388435 | 216 | |
bogdanm | 15:4892fe388435 | 217 | // 0: 5 data bits ... 3: 8 data bits |
bogdanm | 15:4892fe388435 | 218 | if (data_bits < 5 || data_bits > 8) { |
bogdanm | 15:4892fe388435 | 219 | error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits); |
bogdanm | 15:4892fe388435 | 220 | } |
bogdanm | 15:4892fe388435 | 221 | data_bits -= 5; |
bogdanm | 15:4892fe388435 | 222 | |
bogdanm | 15:4892fe388435 | 223 | int parity_enable, parity_select; |
bogdanm | 15:4892fe388435 | 224 | switch (parity) { |
bogdanm | 15:4892fe388435 | 225 | case ParityNone: parity_enable = 0; parity_select = 0; break; |
bogdanm | 15:4892fe388435 | 226 | case ParityOdd : parity_enable = 1; parity_select = 0; break; |
bogdanm | 15:4892fe388435 | 227 | case ParityEven: parity_enable = 1; parity_select = 1; break; |
bogdanm | 15:4892fe388435 | 228 | case ParityForced1: parity_enable = 1; parity_select = 2; break; |
bogdanm | 15:4892fe388435 | 229 | case ParityForced0: parity_enable = 1; parity_select = 3; break; |
bogdanm | 15:4892fe388435 | 230 | default: |
bogdanm | 15:4892fe388435 | 231 | error("Invalid serial parity setting"); |
bogdanm | 15:4892fe388435 | 232 | return; |
bogdanm | 15:4892fe388435 | 233 | } |
bogdanm | 15:4892fe388435 | 234 | |
bogdanm | 15:4892fe388435 | 235 | obj->uart->LCR = data_bits << 0 |
bogdanm | 15:4892fe388435 | 236 | | stop_bits << 2 |
bogdanm | 15:4892fe388435 | 237 | | parity_enable << 3 |
bogdanm | 15:4892fe388435 | 238 | | parity_select << 4; |
bogdanm | 15:4892fe388435 | 239 | } |
bogdanm | 15:4892fe388435 | 240 | |
bogdanm | 15:4892fe388435 | 241 | /****************************************************************************** |
bogdanm | 15:4892fe388435 | 242 | * INTERRUPTS HANDLING |
bogdanm | 15:4892fe388435 | 243 | ******************************************************************************/ |
bogdanm | 15:4892fe388435 | 244 | static inline void uart_irq(uint32_t iir, uint32_t index) { |
bogdanm | 15:4892fe388435 | 245 | // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling |
bogdanm | 15:4892fe388435 | 246 | SerialIrq irq_type; |
bogdanm | 15:4892fe388435 | 247 | switch (iir) { |
bogdanm | 15:4892fe388435 | 248 | case 1: irq_type = TxIrq; break; |
bogdanm | 15:4892fe388435 | 249 | case 2: irq_type = RxIrq; break; |
bogdanm | 15:4892fe388435 | 250 | default: return; |
bogdanm | 15:4892fe388435 | 251 | } |
bogdanm | 15:4892fe388435 | 252 | |
bogdanm | 15:4892fe388435 | 253 | if (serial_irq_ids[index] != 0) |
bogdanm | 15:4892fe388435 | 254 | irq_handler(serial_irq_ids[index], irq_type); |
bogdanm | 15:4892fe388435 | 255 | } |
bogdanm | 15:4892fe388435 | 256 | |
bogdanm | 15:4892fe388435 | 257 | void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);} |
bogdanm | 15:4892fe388435 | 258 | void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);} |
bogdanm | 15:4892fe388435 | 259 | void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);} |
bogdanm | 15:4892fe388435 | 260 | void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);} |
bogdanm | 15:4892fe388435 | 261 | void uart4_irq() {uart_irq((LPC_UART4->IIR >> 1) & 0x7, 4);} |
bogdanm | 15:4892fe388435 | 262 | |
bogdanm | 15:4892fe388435 | 263 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
bogdanm | 15:4892fe388435 | 264 | irq_handler = handler; |
bogdanm | 15:4892fe388435 | 265 | serial_irq_ids[obj->index] = id; |
bogdanm | 15:4892fe388435 | 266 | } |
bogdanm | 15:4892fe388435 | 267 | |
bogdanm | 15:4892fe388435 | 268 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
bogdanm | 15:4892fe388435 | 269 | IRQn_Type irq_n = (IRQn_Type)0; |
bogdanm | 15:4892fe388435 | 270 | uint32_t vector = 0; |
bogdanm | 15:4892fe388435 | 271 | switch ((int)obj->uart) { |
bogdanm | 15:4892fe388435 | 272 | case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break; |
bogdanm | 15:4892fe388435 | 273 | case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break; |
bogdanm | 15:4892fe388435 | 274 | case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break; |
bogdanm | 15:4892fe388435 | 275 | case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break; |
bogdanm | 15:4892fe388435 | 276 | case UART_4: irq_n=UART4_IRQn; vector = (uint32_t)&uart4_irq; break; |
bogdanm | 15:4892fe388435 | 277 | } |
bogdanm | 15:4892fe388435 | 278 | |
bogdanm | 15:4892fe388435 | 279 | if (enable) { |
bogdanm | 15:4892fe388435 | 280 | obj->uart->IER |= 1 << irq; |
bogdanm | 15:4892fe388435 | 281 | NVIC_SetVector(irq_n, vector); |
bogdanm | 15:4892fe388435 | 282 | NVIC_EnableIRQ(irq_n); |
bogdanm | 15:4892fe388435 | 283 | } else { // disable |
bogdanm | 15:4892fe388435 | 284 | int all_disabled = 0; |
bogdanm | 15:4892fe388435 | 285 | SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq); |
bogdanm | 15:4892fe388435 | 286 | obj->uart->IER &= ~(1 << irq); |
bogdanm | 15:4892fe388435 | 287 | all_disabled = (obj->uart->IER & (1 << other_irq)) == 0; |
bogdanm | 15:4892fe388435 | 288 | if (all_disabled) |
bogdanm | 15:4892fe388435 | 289 | NVIC_DisableIRQ(irq_n); |
bogdanm | 15:4892fe388435 | 290 | } |
bogdanm | 15:4892fe388435 | 291 | } |
bogdanm | 15:4892fe388435 | 292 | |
bogdanm | 15:4892fe388435 | 293 | /****************************************************************************** |
bogdanm | 15:4892fe388435 | 294 | * READ/WRITE |
bogdanm | 15:4892fe388435 | 295 | ******************************************************************************/ |
bogdanm | 15:4892fe388435 | 296 | int serial_getc(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 297 | while (!serial_readable(obj)); |
bogdanm | 15:4892fe388435 | 298 | return obj->uart->RBR; |
bogdanm | 15:4892fe388435 | 299 | } |
bogdanm | 15:4892fe388435 | 300 | |
bogdanm | 15:4892fe388435 | 301 | void serial_putc(serial_t *obj, int c) { |
bogdanm | 15:4892fe388435 | 302 | while (!serial_writable(obj)); |
bogdanm | 15:4892fe388435 | 303 | obj->uart->THR = c; |
bogdanm | 15:4892fe388435 | 304 | } |
bogdanm | 15:4892fe388435 | 305 | |
bogdanm | 15:4892fe388435 | 306 | int serial_readable(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 307 | return obj->uart->LSR & 0x01; |
bogdanm | 15:4892fe388435 | 308 | } |
bogdanm | 15:4892fe388435 | 309 | |
bogdanm | 15:4892fe388435 | 310 | int serial_writable(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 311 | return obj->uart->LSR & 0x20; |
bogdanm | 15:4892fe388435 | 312 | } |
bogdanm | 15:4892fe388435 | 313 | |
bogdanm | 15:4892fe388435 | 314 | void serial_clear(serial_t *obj) { |
mbed_official | 29:6ac4027eff2b | 315 | obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled |
mbed_official | 29:6ac4027eff2b | 316 | | 1 << 1 // rx FIFO reset |
mbed_official | 29:6ac4027eff2b | 317 | | 1 << 2 // tx FIFO reset |
mbed_official | 29:6ac4027eff2b | 318 | | 0 << 6; // interrupt depth |
bogdanm | 15:4892fe388435 | 319 | } |
bogdanm | 15:4892fe388435 | 320 | |
bogdanm | 15:4892fe388435 | 321 | void serial_pinout_tx(PinName tx) { |
bogdanm | 15:4892fe388435 | 322 | pinmap_pinout(tx, PinMap_UART_TX); |
bogdanm | 15:4892fe388435 | 323 | } |
bogdanm | 15:4892fe388435 | 324 | |
bogdanm | 15:4892fe388435 | 325 | void serial_break_set(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 326 | obj->uart->LCR |= (1 << 6); |
bogdanm | 15:4892fe388435 | 327 | } |
bogdanm | 15:4892fe388435 | 328 | |
bogdanm | 15:4892fe388435 | 329 | void serial_break_clear(serial_t *obj) { |
bogdanm | 15:4892fe388435 | 330 | obj->uart->LCR &= ~(1 << 6); |
bogdanm | 15:4892fe388435 | 331 | } |
bogdanm | 15:4892fe388435 | 332 |