mbed library sources modified for open wear
Dependents: openwear-lifelogger-example
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_crs.c@76:aeb1df146756, 2014-01-27 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Jan 27 14:30:07 2014 +0000
- Revision:
- 76:aeb1df146756
- Child:
- 106:ced8cbb51063
Synchronized with git revision a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd
Full URL: https://github.com/mbedmicro/mbed/commit/a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd/
Add NUCLEO_L152RE
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 76:aeb1df146756 | 1 | /** |
mbed_official | 76:aeb1df146756 | 2 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 3 | * @file stm32f0xx_crs.c |
mbed_official | 76:aeb1df146756 | 4 | * @author MCD Application Team |
mbed_official | 76:aeb1df146756 | 5 | * @version V1.3.0 |
mbed_official | 76:aeb1df146756 | 6 | * @date 16-January-2014 |
mbed_official | 76:aeb1df146756 | 7 | * @brief This file provides firmware functions to manage the following |
mbed_official | 76:aeb1df146756 | 8 | * functionalities of CRS peripheral applicable only on STM32F042 and |
mbed_official | 76:aeb1df146756 | 9 | * STM32F072 devices: |
mbed_official | 76:aeb1df146756 | 10 | * + Configuration of the CRS peripheral |
mbed_official | 76:aeb1df146756 | 11 | * + Interrupts and flags management |
mbed_official | 76:aeb1df146756 | 12 | * |
mbed_official | 76:aeb1df146756 | 13 | * |
mbed_official | 76:aeb1df146756 | 14 | * @verbatim |
mbed_official | 76:aeb1df146756 | 15 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 16 | ##### How to use this driver ##### |
mbed_official | 76:aeb1df146756 | 17 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 18 | [..] |
mbed_official | 76:aeb1df146756 | 19 | |
mbed_official | 76:aeb1df146756 | 20 | (+) Enable CRS AHB clock using RCC_APB1eriphClockCmd(RCC_APB1Periph_CRS, ENABLE) |
mbed_official | 76:aeb1df146756 | 21 | function |
mbed_official | 76:aeb1df146756 | 22 | |
mbed_official | 76:aeb1df146756 | 23 | |
mbed_official | 76:aeb1df146756 | 24 | @endverbatim |
mbed_official | 76:aeb1df146756 | 25 | * |
mbed_official | 76:aeb1df146756 | 26 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 27 | * @attention |
mbed_official | 76:aeb1df146756 | 28 | * |
mbed_official | 76:aeb1df146756 | 29 | * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
mbed_official | 76:aeb1df146756 | 30 | * |
mbed_official | 76:aeb1df146756 | 31 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
mbed_official | 76:aeb1df146756 | 32 | * You may not use this file except in compliance with the License. |
mbed_official | 76:aeb1df146756 | 33 | * You may obtain a copy of the License at: |
mbed_official | 76:aeb1df146756 | 34 | * |
mbed_official | 76:aeb1df146756 | 35 | * http://www.st.com/software_license_agreement_liberty_v2 |
mbed_official | 76:aeb1df146756 | 36 | * |
mbed_official | 76:aeb1df146756 | 37 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 76:aeb1df146756 | 38 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 76:aeb1df146756 | 39 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 76:aeb1df146756 | 40 | * See the License for the specific language governing permissions and |
mbed_official | 76:aeb1df146756 | 41 | * limitations under the License. |
mbed_official | 76:aeb1df146756 | 42 | * |
mbed_official | 76:aeb1df146756 | 43 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 44 | */ |
mbed_official | 76:aeb1df146756 | 45 | |
mbed_official | 76:aeb1df146756 | 46 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 47 | #include "stm32f0xx_crs.h" |
mbed_official | 76:aeb1df146756 | 48 | #include "stm32f0xx_rcc.h" |
mbed_official | 76:aeb1df146756 | 49 | |
mbed_official | 76:aeb1df146756 | 50 | /** @addtogroup STM32F0xx_StdPeriph_Driver |
mbed_official | 76:aeb1df146756 | 51 | * @{ |
mbed_official | 76:aeb1df146756 | 52 | */ |
mbed_official | 76:aeb1df146756 | 53 | |
mbed_official | 76:aeb1df146756 | 54 | /** @defgroup CRS |
mbed_official | 76:aeb1df146756 | 55 | * @brief CRS driver modules |
mbed_official | 76:aeb1df146756 | 56 | * @{ |
mbed_official | 76:aeb1df146756 | 57 | */ |
mbed_official | 76:aeb1df146756 | 58 | |
mbed_official | 76:aeb1df146756 | 59 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 60 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 61 | /* CRS Flag Mask */ |
mbed_official | 76:aeb1df146756 | 62 | #define FLAG_MASK ((uint32_t)0x700) |
mbed_official | 76:aeb1df146756 | 63 | |
mbed_official | 76:aeb1df146756 | 64 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 65 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 66 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 67 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 68 | |
mbed_official | 76:aeb1df146756 | 69 | /** @defgroup CRS_Private_Functions |
mbed_official | 76:aeb1df146756 | 70 | * @{ |
mbed_official | 76:aeb1df146756 | 71 | */ |
mbed_official | 76:aeb1df146756 | 72 | |
mbed_official | 76:aeb1df146756 | 73 | /** @defgroup CRS_Group1 Configuration of the CRS functions |
mbed_official | 76:aeb1df146756 | 74 | * @brief Configuration of the CRS functions |
mbed_official | 76:aeb1df146756 | 75 | * |
mbed_official | 76:aeb1df146756 | 76 | @verbatim |
mbed_official | 76:aeb1df146756 | 77 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 78 | ##### CRS configuration functions ##### |
mbed_official | 76:aeb1df146756 | 79 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 80 | |
mbed_official | 76:aeb1df146756 | 81 | @endverbatim |
mbed_official | 76:aeb1df146756 | 82 | * @{ |
mbed_official | 76:aeb1df146756 | 83 | */ |
mbed_official | 76:aeb1df146756 | 84 | |
mbed_official | 76:aeb1df146756 | 85 | /** |
mbed_official | 76:aeb1df146756 | 86 | * @brief Deinitializes CRS peripheral registers to their default reset values. |
mbed_official | 76:aeb1df146756 | 87 | * @param None |
mbed_official | 76:aeb1df146756 | 88 | * @retval None |
mbed_official | 76:aeb1df146756 | 89 | */ |
mbed_official | 76:aeb1df146756 | 90 | void CRS_DeInit(void) |
mbed_official | 76:aeb1df146756 | 91 | { |
mbed_official | 76:aeb1df146756 | 92 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_CRS, ENABLE); |
mbed_official | 76:aeb1df146756 | 93 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_CRS, DISABLE); |
mbed_official | 76:aeb1df146756 | 94 | } |
mbed_official | 76:aeb1df146756 | 95 | |
mbed_official | 76:aeb1df146756 | 96 | /** |
mbed_official | 76:aeb1df146756 | 97 | * @brief Adjusts the Internal High Speed 48 oscillator (HSI 48) calibration value. |
mbed_official | 76:aeb1df146756 | 98 | * @note The calibration is used to compensate for the variations in voltage |
mbed_official | 76:aeb1df146756 | 99 | * and temperature that influence the frequency of the internal HSI48 RC. |
mbed_official | 76:aeb1df146756 | 100 | * @note This function can be called only when the AUTOTRIMEN bit is reset. |
mbed_official | 76:aeb1df146756 | 101 | * @param CRS_HSI48CalibrationValue: |
mbed_official | 76:aeb1df146756 | 102 | * @retval None |
mbed_official | 76:aeb1df146756 | 103 | */ |
mbed_official | 76:aeb1df146756 | 104 | void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue) |
mbed_official | 76:aeb1df146756 | 105 | { |
mbed_official | 76:aeb1df146756 | 106 | /* Clear TRIM[5:0] bits */ |
mbed_official | 76:aeb1df146756 | 107 | CRS->CR &= ~CRS_CR_TRIM; |
mbed_official | 76:aeb1df146756 | 108 | |
mbed_official | 76:aeb1df146756 | 109 | /* Set the TRIM[5:0] bits according to CRS_HSI48CalibrationValue value */ |
mbed_official | 76:aeb1df146756 | 110 | CRS->CR |= (uint32_t)((uint32_t)CRS_HSI48CalibrationValue << 8); |
mbed_official | 76:aeb1df146756 | 111 | |
mbed_official | 76:aeb1df146756 | 112 | } |
mbed_official | 76:aeb1df146756 | 113 | |
mbed_official | 76:aeb1df146756 | 114 | /** |
mbed_official | 76:aeb1df146756 | 115 | * @brief Enables or disables the oscillator clock for frequency error counter. |
mbed_official | 76:aeb1df146756 | 116 | * @note when the CEN bit is set the CRS_CFGR register becomes write-protected. |
mbed_official | 76:aeb1df146756 | 117 | * @param NewState: new state of the frequency error counter. |
mbed_official | 76:aeb1df146756 | 118 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 119 | * @retval None |
mbed_official | 76:aeb1df146756 | 120 | */ |
mbed_official | 76:aeb1df146756 | 121 | void CRS_FrequencyErrorCounterCmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 122 | { |
mbed_official | 76:aeb1df146756 | 123 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 124 | |
mbed_official | 76:aeb1df146756 | 125 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 126 | { |
mbed_official | 76:aeb1df146756 | 127 | CRS->CR |= CRS_CR_CEN; |
mbed_official | 76:aeb1df146756 | 128 | } |
mbed_official | 76:aeb1df146756 | 129 | else |
mbed_official | 76:aeb1df146756 | 130 | { |
mbed_official | 76:aeb1df146756 | 131 | CRS->CR &= ~CRS_CR_CEN; |
mbed_official | 76:aeb1df146756 | 132 | } |
mbed_official | 76:aeb1df146756 | 133 | } |
mbed_official | 76:aeb1df146756 | 134 | |
mbed_official | 76:aeb1df146756 | 135 | /** |
mbed_official | 76:aeb1df146756 | 136 | * @brief Enables or disables the automatic hardware adjustement of TRIM bits. |
mbed_official | 76:aeb1df146756 | 137 | * @note When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected. |
mbed_official | 76:aeb1df146756 | 138 | * @param NewState: new state of the automatic trimming. |
mbed_official | 76:aeb1df146756 | 139 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 140 | * @retval None |
mbed_official | 76:aeb1df146756 | 141 | */ |
mbed_official | 76:aeb1df146756 | 142 | void CRS_AutomaticCalibrationCmd(FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 143 | { |
mbed_official | 76:aeb1df146756 | 144 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 145 | |
mbed_official | 76:aeb1df146756 | 146 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 147 | { |
mbed_official | 76:aeb1df146756 | 148 | CRS->CR |= CRS_CR_AUTOTRIMEN; |
mbed_official | 76:aeb1df146756 | 149 | } |
mbed_official | 76:aeb1df146756 | 150 | else |
mbed_official | 76:aeb1df146756 | 151 | { |
mbed_official | 76:aeb1df146756 | 152 | CRS->CR &= ~CRS_CR_AUTOTRIMEN; |
mbed_official | 76:aeb1df146756 | 153 | } |
mbed_official | 76:aeb1df146756 | 154 | } |
mbed_official | 76:aeb1df146756 | 155 | |
mbed_official | 76:aeb1df146756 | 156 | /** |
mbed_official | 76:aeb1df146756 | 157 | * @brief Generate the software synchronization event |
mbed_official | 76:aeb1df146756 | 158 | * @param None |
mbed_official | 76:aeb1df146756 | 159 | * @retval None |
mbed_official | 76:aeb1df146756 | 160 | */ |
mbed_official | 76:aeb1df146756 | 161 | void CRS_SoftwareSynchronizationGenerate(void) |
mbed_official | 76:aeb1df146756 | 162 | { |
mbed_official | 76:aeb1df146756 | 163 | CRS->CR |= CRS_CR_SWSYNC; |
mbed_official | 76:aeb1df146756 | 164 | } |
mbed_official | 76:aeb1df146756 | 165 | |
mbed_official | 76:aeb1df146756 | 166 | /** |
mbed_official | 76:aeb1df146756 | 167 | * @brief Adjusts the Internal High Speed 48 oscillator (HSI 48) calibration value. |
mbed_official | 76:aeb1df146756 | 168 | * @note The calibration is used to compensate for the variations in voltage |
mbed_official | 76:aeb1df146756 | 169 | * and temperature that influence the frequency of the internal HSI48 RC. |
mbed_official | 76:aeb1df146756 | 170 | * @note This function can be called only when the CEN bit is reset. |
mbed_official | 76:aeb1df146756 | 171 | * @param CRS_ReloadValue: specifies the HSI calibration trimming value. |
mbed_official | 76:aeb1df146756 | 172 | * This parameter must be a number between 0 and . |
mbed_official | 76:aeb1df146756 | 173 | * @retval None |
mbed_official | 76:aeb1df146756 | 174 | */ |
mbed_official | 76:aeb1df146756 | 175 | void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue) |
mbed_official | 76:aeb1df146756 | 176 | { |
mbed_official | 76:aeb1df146756 | 177 | |
mbed_official | 76:aeb1df146756 | 178 | /* Clear RELOAD[15:0] bits */ |
mbed_official | 76:aeb1df146756 | 179 | CRS->CFGR &= ~CRS_CFGR_RELOAD; |
mbed_official | 76:aeb1df146756 | 180 | |
mbed_official | 76:aeb1df146756 | 181 | /* Set the RELOAD[15:0] bits according to CRS_ReloadValue value */ |
mbed_official | 76:aeb1df146756 | 182 | CRS->CFGR |= (uint32_t)CRS_ReloadValue; |
mbed_official | 76:aeb1df146756 | 183 | |
mbed_official | 76:aeb1df146756 | 184 | } |
mbed_official | 76:aeb1df146756 | 185 | |
mbed_official | 76:aeb1df146756 | 186 | /** |
mbed_official | 76:aeb1df146756 | 187 | * @brief |
mbed_official | 76:aeb1df146756 | 188 | * @note This function can be called only when the CEN bit is reset. |
mbed_official | 76:aeb1df146756 | 189 | * @param CRS_ErrorLimitValue: specifies the HSI calibration trimming value. |
mbed_official | 76:aeb1df146756 | 190 | * This parameter must be a number between 0 and . |
mbed_official | 76:aeb1df146756 | 191 | * @retval None |
mbed_official | 76:aeb1df146756 | 192 | */ |
mbed_official | 76:aeb1df146756 | 193 | void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue) |
mbed_official | 76:aeb1df146756 | 194 | { |
mbed_official | 76:aeb1df146756 | 195 | /* Clear FELIM[7:0] bits */ |
mbed_official | 76:aeb1df146756 | 196 | CRS->CFGR &= ~CRS_CFGR_FELIM; |
mbed_official | 76:aeb1df146756 | 197 | |
mbed_official | 76:aeb1df146756 | 198 | /* Set the FELIM[7:0] bits according to CRS_ErrorLimitValue value */ |
mbed_official | 76:aeb1df146756 | 199 | CRS->CFGR |= (uint32_t)CRS_ErrorLimitValue; |
mbed_official | 76:aeb1df146756 | 200 | } |
mbed_official | 76:aeb1df146756 | 201 | |
mbed_official | 76:aeb1df146756 | 202 | /** |
mbed_official | 76:aeb1df146756 | 203 | * @brief |
mbed_official | 76:aeb1df146756 | 204 | * @note This function can be called only when the CEN bit is reset. |
mbed_official | 76:aeb1df146756 | 205 | * @param CRS_Prescaler: specifies the HSI calibration trimming value. |
mbed_official | 76:aeb1df146756 | 206 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 207 | * @arg CRS_SYNC_Div1: |
mbed_official | 76:aeb1df146756 | 208 | * @arg CRS_SYNC_Div2: |
mbed_official | 76:aeb1df146756 | 209 | * @arg CRS_SYNC_Div4: |
mbed_official | 76:aeb1df146756 | 210 | * @arg CRS_SYNC_Div8: |
mbed_official | 76:aeb1df146756 | 211 | * @arg CRS_SYNC_Div16: |
mbed_official | 76:aeb1df146756 | 212 | * @arg CRS_SYNC_Div32: |
mbed_official | 76:aeb1df146756 | 213 | * @arg CRS_SYNC_Div64: |
mbed_official | 76:aeb1df146756 | 214 | * @arg CRS_SYNC_Div128: |
mbed_official | 76:aeb1df146756 | 215 | * @retval None |
mbed_official | 76:aeb1df146756 | 216 | */ |
mbed_official | 76:aeb1df146756 | 217 | void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler) |
mbed_official | 76:aeb1df146756 | 218 | { |
mbed_official | 76:aeb1df146756 | 219 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 220 | assert_param(IS_CRS_SYNC_DIV(CRS_Prescaler)); |
mbed_official | 76:aeb1df146756 | 221 | |
mbed_official | 76:aeb1df146756 | 222 | /* Clear SYNCDIV[2:0] bits */ |
mbed_official | 76:aeb1df146756 | 223 | CRS->CFGR &= ~CRS_CFGR_SYNCDIV; |
mbed_official | 76:aeb1df146756 | 224 | |
mbed_official | 76:aeb1df146756 | 225 | /* Set the CRS_CFGR_SYNCDIV[2:0] bits according to CRS_Prescaler value */ |
mbed_official | 76:aeb1df146756 | 226 | CRS->CFGR |= CRS_Prescaler; |
mbed_official | 76:aeb1df146756 | 227 | } |
mbed_official | 76:aeb1df146756 | 228 | |
mbed_official | 76:aeb1df146756 | 229 | /** |
mbed_official | 76:aeb1df146756 | 230 | * @brief |
mbed_official | 76:aeb1df146756 | 231 | * @note This function can be called only when the CEN bit is reset. |
mbed_official | 76:aeb1df146756 | 232 | * @param CRS_Source: . |
mbed_official | 76:aeb1df146756 | 233 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 234 | * @arg CRS_SYNCSource_GPIO: |
mbed_official | 76:aeb1df146756 | 235 | * @arg CRS_SYNCSource_LSE: |
mbed_official | 76:aeb1df146756 | 236 | * @arg CRS_SYNCSource_USB: |
mbed_official | 76:aeb1df146756 | 237 | * @retval None |
mbed_official | 76:aeb1df146756 | 238 | */ |
mbed_official | 76:aeb1df146756 | 239 | void CRS_SynchronizationSourceConfig(uint32_t CRS_Source) |
mbed_official | 76:aeb1df146756 | 240 | { |
mbed_official | 76:aeb1df146756 | 241 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 242 | assert_param(IS_CRS_SYNC_SOURCE(CRS_Source)); |
mbed_official | 76:aeb1df146756 | 243 | |
mbed_official | 76:aeb1df146756 | 244 | /* Clear SYNCSRC[1:0] bits */ |
mbed_official | 76:aeb1df146756 | 245 | CRS->CFGR &= ~CRS_CFGR_SYNCSRC; |
mbed_official | 76:aeb1df146756 | 246 | |
mbed_official | 76:aeb1df146756 | 247 | /* Set the SYNCSRC[1:0] bits according to CRS_Source value */ |
mbed_official | 76:aeb1df146756 | 248 | CRS->CFGR |= CRS_Source; |
mbed_official | 76:aeb1df146756 | 249 | } |
mbed_official | 76:aeb1df146756 | 250 | |
mbed_official | 76:aeb1df146756 | 251 | /** |
mbed_official | 76:aeb1df146756 | 252 | * @brief |
mbed_official | 76:aeb1df146756 | 253 | * @note This function can be called only when the CEN bit is reset. |
mbed_official | 76:aeb1df146756 | 254 | * @param CRS_Polarity: . |
mbed_official | 76:aeb1df146756 | 255 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 256 | * @arg CRS_SYNCPolarity_Rising: |
mbed_official | 76:aeb1df146756 | 257 | * @arg CRS_SYNCPolarity_Falling: |
mbed_official | 76:aeb1df146756 | 258 | * @retval None |
mbed_official | 76:aeb1df146756 | 259 | */ |
mbed_official | 76:aeb1df146756 | 260 | void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity) |
mbed_official | 76:aeb1df146756 | 261 | { |
mbed_official | 76:aeb1df146756 | 262 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 263 | assert_param(IS_CRS_SYNC_POLARITY(CRS_Polarity)); |
mbed_official | 76:aeb1df146756 | 264 | |
mbed_official | 76:aeb1df146756 | 265 | /* Clear SYNCSPOL bit */ |
mbed_official | 76:aeb1df146756 | 266 | CRS->CFGR &= ~CRS_CFGR_SYNCPOL; |
mbed_official | 76:aeb1df146756 | 267 | |
mbed_official | 76:aeb1df146756 | 268 | /* Set the SYNCSPOL bits according to CRS_Polarity value */ |
mbed_official | 76:aeb1df146756 | 269 | CRS->CFGR |= CRS_Polarity; |
mbed_official | 76:aeb1df146756 | 270 | } |
mbed_official | 76:aeb1df146756 | 271 | |
mbed_official | 76:aeb1df146756 | 272 | /** |
mbed_official | 76:aeb1df146756 | 273 | * @brief Returns the Relaod value. |
mbed_official | 76:aeb1df146756 | 274 | * @param None |
mbed_official | 76:aeb1df146756 | 275 | * @retval The reload value |
mbed_official | 76:aeb1df146756 | 276 | */ |
mbed_official | 76:aeb1df146756 | 277 | uint32_t CRS_GetReloadValue(void) |
mbed_official | 76:aeb1df146756 | 278 | { |
mbed_official | 76:aeb1df146756 | 279 | return ((uint32_t)(CRS->CFGR & CRS_CFGR_RELOAD)); |
mbed_official | 76:aeb1df146756 | 280 | } |
mbed_official | 76:aeb1df146756 | 281 | |
mbed_official | 76:aeb1df146756 | 282 | /** |
mbed_official | 76:aeb1df146756 | 283 | * @brief Returns the HSI48 Calibration value. |
mbed_official | 76:aeb1df146756 | 284 | * @param None |
mbed_official | 76:aeb1df146756 | 285 | * @retval The reload value |
mbed_official | 76:aeb1df146756 | 286 | */ |
mbed_official | 76:aeb1df146756 | 287 | uint32_t CRS_GetHSI48CalibrationValue(void) |
mbed_official | 76:aeb1df146756 | 288 | { |
mbed_official | 76:aeb1df146756 | 289 | return (((uint32_t)(CRS->CR & CRS_CR_TRIM)) >> 8); |
mbed_official | 76:aeb1df146756 | 290 | } |
mbed_official | 76:aeb1df146756 | 291 | |
mbed_official | 76:aeb1df146756 | 292 | /** |
mbed_official | 76:aeb1df146756 | 293 | * @brief Returns the frequency error capture. |
mbed_official | 76:aeb1df146756 | 294 | * @param None |
mbed_official | 76:aeb1df146756 | 295 | * @retval The frequency error capture value |
mbed_official | 76:aeb1df146756 | 296 | */ |
mbed_official | 76:aeb1df146756 | 297 | uint32_t CRS_GetFrequencyErrorValue(void) |
mbed_official | 76:aeb1df146756 | 298 | { |
mbed_official | 76:aeb1df146756 | 299 | return ((uint32_t)(CRS->ISR & CRS_ISR_FECAP)); |
mbed_official | 76:aeb1df146756 | 300 | } |
mbed_official | 76:aeb1df146756 | 301 | |
mbed_official | 76:aeb1df146756 | 302 | /** |
mbed_official | 76:aeb1df146756 | 303 | * @brief Returns the frequency error direction. |
mbed_official | 76:aeb1df146756 | 304 | * @param None |
mbed_official | 76:aeb1df146756 | 305 | * @retval The frequency error direction. The returned value can be one |
mbed_official | 76:aeb1df146756 | 306 | * of the following values: |
mbed_official | 76:aeb1df146756 | 307 | * - 0x00: Up counting |
mbed_official | 76:aeb1df146756 | 308 | * - 0x8000: Down counting |
mbed_official | 76:aeb1df146756 | 309 | */ |
mbed_official | 76:aeb1df146756 | 310 | uint32_t CRS_GetFrequencyErrorDirection(void) |
mbed_official | 76:aeb1df146756 | 311 | { |
mbed_official | 76:aeb1df146756 | 312 | return ((uint32_t)(CRS->ISR & CRS_ISR_FEDIR)); |
mbed_official | 76:aeb1df146756 | 313 | } |
mbed_official | 76:aeb1df146756 | 314 | |
mbed_official | 76:aeb1df146756 | 315 | /** @defgroup CRS_Group2 Interrupts and flags management functions |
mbed_official | 76:aeb1df146756 | 316 | * @brief Interrupts and flags management functions |
mbed_official | 76:aeb1df146756 | 317 | * |
mbed_official | 76:aeb1df146756 | 318 | @verbatim |
mbed_official | 76:aeb1df146756 | 319 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 320 | ##### Interrupts and flags management functions ##### |
mbed_official | 76:aeb1df146756 | 321 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 322 | @endverbatim |
mbed_official | 76:aeb1df146756 | 323 | * @{ |
mbed_official | 76:aeb1df146756 | 324 | */ |
mbed_official | 76:aeb1df146756 | 325 | /** |
mbed_official | 76:aeb1df146756 | 326 | * @brief Enables or disables the specified CRS interrupts. |
mbed_official | 76:aeb1df146756 | 327 | * @param CRS_IT: specifies the RCC interrupt sources to be enabled or disabled. |
mbed_official | 76:aeb1df146756 | 328 | * This parameter can be any combination of the following values: |
mbed_official | 76:aeb1df146756 | 329 | * @arg CRS_IT_SYNCOK: |
mbed_official | 76:aeb1df146756 | 330 | * @arg CRS_IT_SYNCWARN: |
mbed_official | 76:aeb1df146756 | 331 | * @arg CRS_IT_ERR: |
mbed_official | 76:aeb1df146756 | 332 | * @arg CRS_IT_ESYNC: |
mbed_official | 76:aeb1df146756 | 333 | * @param NewState: new state of the specified CRS interrupts. |
mbed_official | 76:aeb1df146756 | 334 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 335 | * @retval None |
mbed_official | 76:aeb1df146756 | 336 | */ |
mbed_official | 76:aeb1df146756 | 337 | void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 338 | { |
mbed_official | 76:aeb1df146756 | 339 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 340 | assert_param(IS_CRS_IT(CRS_IT)); |
mbed_official | 76:aeb1df146756 | 341 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 342 | |
mbed_official | 76:aeb1df146756 | 343 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 344 | { |
mbed_official | 76:aeb1df146756 | 345 | CRS->CR |= CRS_IT; |
mbed_official | 76:aeb1df146756 | 346 | } |
mbed_official | 76:aeb1df146756 | 347 | else |
mbed_official | 76:aeb1df146756 | 348 | { |
mbed_official | 76:aeb1df146756 | 349 | CRS->CR &= ~CRS_IT; |
mbed_official | 76:aeb1df146756 | 350 | } |
mbed_official | 76:aeb1df146756 | 351 | } |
mbed_official | 76:aeb1df146756 | 352 | |
mbed_official | 76:aeb1df146756 | 353 | /** |
mbed_official | 76:aeb1df146756 | 354 | * @brief Checks whether the specified CRS flag is set or not. |
mbed_official | 76:aeb1df146756 | 355 | * @param CRS_FLAG: specifies the flag to check. |
mbed_official | 76:aeb1df146756 | 356 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 357 | * @arg CRS_FLAG_SYNCOK: |
mbed_official | 76:aeb1df146756 | 358 | * @arg CRS_FLAG_SYNCWARN: |
mbed_official | 76:aeb1df146756 | 359 | * @arg CRS_FLAG_ERR: |
mbed_official | 76:aeb1df146756 | 360 | * @arg CRS_FLAG_ESYNC: |
mbed_official | 76:aeb1df146756 | 361 | * @arg CRS_FLAG_TRIMOVF: |
mbed_official | 76:aeb1df146756 | 362 | * @arg CRS_FLAG_SYNCERR: |
mbed_official | 76:aeb1df146756 | 363 | * @arg CRS_FLAG_SYNCMISS: |
mbed_official | 76:aeb1df146756 | 364 | * @retval The new state of CRS_FLAG (SET or RESET). |
mbed_official | 76:aeb1df146756 | 365 | */ |
mbed_official | 76:aeb1df146756 | 366 | FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG) |
mbed_official | 76:aeb1df146756 | 367 | { |
mbed_official | 76:aeb1df146756 | 368 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 369 | assert_param(IS_CRS_FLAG(CRS_FLAG)); |
mbed_official | 76:aeb1df146756 | 370 | |
mbed_official | 76:aeb1df146756 | 371 | return ((FlagStatus)(CRS->ISR & CRS_FLAG)); |
mbed_official | 76:aeb1df146756 | 372 | } |
mbed_official | 76:aeb1df146756 | 373 | |
mbed_official | 76:aeb1df146756 | 374 | /** |
mbed_official | 76:aeb1df146756 | 375 | * @brief Clears the CRS specified FLAG. |
mbed_official | 76:aeb1df146756 | 376 | * @param CRS_FLAG: specifies the flag to check. |
mbed_official | 76:aeb1df146756 | 377 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 378 | * @arg CRS_FLAG_SYNCOK: |
mbed_official | 76:aeb1df146756 | 379 | * @arg CRS_FLAG_SYNCWARN: |
mbed_official | 76:aeb1df146756 | 380 | * @arg CRS_FLAG_ERR: |
mbed_official | 76:aeb1df146756 | 381 | * @arg CRS_FLAG_ESYNC: |
mbed_official | 76:aeb1df146756 | 382 | * @arg CRS_FLAG_TRIMOVF: |
mbed_official | 76:aeb1df146756 | 383 | * @arg CRS_FLAG_SYNCERR: |
mbed_official | 76:aeb1df146756 | 384 | * @arg CRS_FLAG_SYNCMISS: |
mbed_official | 76:aeb1df146756 | 385 | * @retval None |
mbed_official | 76:aeb1df146756 | 386 | */ |
mbed_official | 76:aeb1df146756 | 387 | void CRS_ClearFlag(uint32_t CRS_FLAG) |
mbed_official | 76:aeb1df146756 | 388 | { |
mbed_official | 76:aeb1df146756 | 389 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 390 | assert_param(IS_CRS_FLAG(CRS_FLAG)); |
mbed_official | 76:aeb1df146756 | 391 | |
mbed_official | 76:aeb1df146756 | 392 | if ((CRS_FLAG & FLAG_MASK)!= 0) |
mbed_official | 76:aeb1df146756 | 393 | { |
mbed_official | 76:aeb1df146756 | 394 | CRS->ICR |= CRS_ICR_ERRC; |
mbed_official | 76:aeb1df146756 | 395 | } |
mbed_official | 76:aeb1df146756 | 396 | else |
mbed_official | 76:aeb1df146756 | 397 | { |
mbed_official | 76:aeb1df146756 | 398 | CRS->ICR |= CRS_FLAG; |
mbed_official | 76:aeb1df146756 | 399 | } |
mbed_official | 76:aeb1df146756 | 400 | } |
mbed_official | 76:aeb1df146756 | 401 | |
mbed_official | 76:aeb1df146756 | 402 | /** |
mbed_official | 76:aeb1df146756 | 403 | * @brief Checks whether the specified CRS IT pending bit is set or not. |
mbed_official | 76:aeb1df146756 | 404 | * @param CRS_IT: specifies the IT pending bit to check. |
mbed_official | 76:aeb1df146756 | 405 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 406 | * @arg CRS_IT_SYNCOK: |
mbed_official | 76:aeb1df146756 | 407 | * @arg CRS_IT_SYNCWARN: |
mbed_official | 76:aeb1df146756 | 408 | * @arg CRS_IT_ERR: |
mbed_official | 76:aeb1df146756 | 409 | * @arg CRS_IT_ESYNC: |
mbed_official | 76:aeb1df146756 | 410 | * @arg CRS_IT_TRIMOVF: |
mbed_official | 76:aeb1df146756 | 411 | * @arg CRS_IT_SYNCERR: |
mbed_official | 76:aeb1df146756 | 412 | * @arg CRS_IT_SYNCMISS: |
mbed_official | 76:aeb1df146756 | 413 | * @retval The new state of CRS_IT (SET or RESET). |
mbed_official | 76:aeb1df146756 | 414 | */ |
mbed_official | 76:aeb1df146756 | 415 | ITStatus CRS_GetITStatus(uint32_t CRS_IT) |
mbed_official | 76:aeb1df146756 | 416 | { |
mbed_official | 76:aeb1df146756 | 417 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 418 | assert_param(IS_CRS_GET_IT(CRS_IT)); |
mbed_official | 76:aeb1df146756 | 419 | |
mbed_official | 76:aeb1df146756 | 420 | return ((ITStatus)(CRS->ISR & CRS_IT)); |
mbed_official | 76:aeb1df146756 | 421 | } |
mbed_official | 76:aeb1df146756 | 422 | |
mbed_official | 76:aeb1df146756 | 423 | /** |
mbed_official | 76:aeb1df146756 | 424 | * @brief Clears the CRS specified IT pending bi. |
mbed_official | 76:aeb1df146756 | 425 | * @param CRS_FLAG: specifies the IT pending bi to clear. |
mbed_official | 76:aeb1df146756 | 426 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 427 | * @arg CRS_IT_SYNCOK: |
mbed_official | 76:aeb1df146756 | 428 | * @arg CRS_IT_SYNCWARN: |
mbed_official | 76:aeb1df146756 | 429 | * @arg CRS_IT_ERR: |
mbed_official | 76:aeb1df146756 | 430 | * @arg CRS_IT_ESYNC: |
mbed_official | 76:aeb1df146756 | 431 | * @arg CRS_IT_TRIMOVF: |
mbed_official | 76:aeb1df146756 | 432 | * @arg CRS_IT_SYNCERR: |
mbed_official | 76:aeb1df146756 | 433 | * @arg CRS_IT_SYNCMISS: |
mbed_official | 76:aeb1df146756 | 434 | * @retval None |
mbed_official | 76:aeb1df146756 | 435 | */ |
mbed_official | 76:aeb1df146756 | 436 | void CRS_ClearITPendingBit(uint32_t CRS_IT) |
mbed_official | 76:aeb1df146756 | 437 | { |
mbed_official | 76:aeb1df146756 | 438 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 439 | assert_param(IS_CRS_CLEAR_IT(CRS_IT)); |
mbed_official | 76:aeb1df146756 | 440 | |
mbed_official | 76:aeb1df146756 | 441 | if ((CRS_IT & FLAG_MASK)!= 0) |
mbed_official | 76:aeb1df146756 | 442 | { |
mbed_official | 76:aeb1df146756 | 443 | CRS->ICR |= CRS_ICR_ERRC; |
mbed_official | 76:aeb1df146756 | 444 | } |
mbed_official | 76:aeb1df146756 | 445 | else |
mbed_official | 76:aeb1df146756 | 446 | { |
mbed_official | 76:aeb1df146756 | 447 | CRS->ICR |= CRS_IT; |
mbed_official | 76:aeb1df146756 | 448 | } |
mbed_official | 76:aeb1df146756 | 449 | } |
mbed_official | 76:aeb1df146756 | 450 | /** |
mbed_official | 76:aeb1df146756 | 451 | * @} |
mbed_official | 76:aeb1df146756 | 452 | */ |
mbed_official | 76:aeb1df146756 | 453 | |
mbed_official | 76:aeb1df146756 | 454 | /** |
mbed_official | 76:aeb1df146756 | 455 | * @} |
mbed_official | 76:aeb1df146756 | 456 | */ |
mbed_official | 76:aeb1df146756 | 457 | |
mbed_official | 76:aeb1df146756 | 458 | /** |
mbed_official | 76:aeb1df146756 | 459 | * @} |
mbed_official | 76:aeb1df146756 | 460 | */ |
mbed_official | 76:aeb1df146756 | 461 | |
mbed_official | 76:aeb1df146756 | 462 | /** |
mbed_official | 76:aeb1df146756 | 463 | * @} |
mbed_official | 76:aeb1df146756 | 464 | */ |
mbed_official | 76:aeb1df146756 | 465 | |
mbed_official | 76:aeb1df146756 | 466 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |