Diff: IAP.cpp

Revision:

1:ff906ad52cf9

Parent:

0:ada7fb504504

Child:

2:7484398d50ea

--- a/IAP.cpp	Mon Nov 26 04:00:38 2012 +0000
+++ b/IAP.cpp	Mon Nov 26 06:02:24 2012 +0000
@@ -19,7 +19,9 @@
  *        revision 1.0  09-Mar-2010   1st release
  *        revision 1.1  12-Mar-2010   chaged: to make possible to reserve flash area for user
  *                                            it can be set by USER_FLASH_AREA_START and USER_FLASH_AREA_SIZE in IAP.h
- *        revision 2.0  26-Nov.2012   LPC11U24 code added
+ *        revision 2.0  26-Nov-2012   LPC11U24 code added
+ *        revision 2.1  26-Nov-2012   EEPROM access code imported from Suga koubou san's (http://mbed.org/users/okini3939/) library
+ *                                            http://mbed.org/users/okini3939/code/M0_EEPROM_test/
  */
 
 #include    "mbed.h"
@@ -53,7 +55,11 @@
             IAPCommand_Read_Boot_Code_version,
             IAPCommand_Compare,
             IAPCommand_Reinvoke_ISP,
-            IAPCommand_Read_device_serial_number
+            IAPCommand_Read_device_serial_number,
+#if defined(TARGET_LPC11U24)
+            IAPCommand_EEPROM_Write = 61,
+            IAPCommand_EEPROM_Read,
+#endif
         };
 
 
@@ -222,3 +228,44 @@
     return ( USER_FLASH_AREA_SIZE );
 }
 
+#if defined(TARGET_LPC11U24)
+/** Copy RAM to EEPROM (LPC11U24)
+ *  
+ *  @param    source_addr    Source RAM address from which data bytes are to be read.
+ *  @param    target_addr    Destination EEPROM address where data bytes are to be written.
+ *  @param    size           Number of bytes to be written.
+ *  @return   error code: CMD_SUCCESS | SRC_ADDR_NOT_MAPPED | DST_ADDR_NOT_MAPPED
+ *  Remark: The top 64 bytes of the EEPROM memory are reserved and cannot be written to.
+ */
+int IAP::write_eeprom( char *source_addr, char *target_addr, int size ) {
+    IAP_command[ 0 ]    = IAPCommand_EEPROM_Write;
+    IAP_command[ 1 ]    = (unsigned int)target_addr;    //  Destination EEPROM address where data bytes are to be written. This address should be a 256 byte boundary.
+    IAP_command[ 2 ]    = (unsigned int)source_addr;    //  Source RAM address from which data bytes are to be read. This address should be a word boundary.
+    IAP_command[ 3 ]    = size;                         //  Number of bytes to be written. Should be 256 | 512 | 1024 | 4096.
+    IAP_command[ 4 ]    = cclk_kHz;                     //  CPU Clock Frequency (CCLK) in kHz.
+ 
+    iap_entry( IAP_command, IAP_result );
+ 
+    return ( (int)IAP_result[ 0 ] );
+}
+ 
+/** Copy EEPROM to RAM (LPC11U24)
+ *  
+ *  @param    source_addr    Source EEPROM address from which data bytes are to be read.
+ *  @param    target_addr    Destination RAM address where data bytes are to be written.
+ *  @param    size           Number of bytes to be written.
+ *  @return   error code: CMD_SUCCESS | SRC_ADDR_NOT_MAPPED | DST_ADDR_NOT_MAPPED
+ *  Remark: The top 64 bytes of the EEPROM memory are reserved and cannot be written to.
+ */
+int IAP::read_eeprom( char *source_addr, char *target_addr, int size ) {
+    IAP_command[ 0 ]    = IAPCommand_EEPROM_Read;
+    IAP_command[ 1 ]    = (unsigned int)source_addr;    //  Source EEPROM address from which data bytes are to be read. This address should be a word boundary.
+    IAP_command[ 2 ]    = (unsigned int)target_addr;    //  Destination RAM address where data bytes are to be written. This address should be a 256 byte boundary.
+    IAP_command[ 3 ]    = size;                         //  Number of bytes to be written. Should be 256 | 512 | 1024 | 4096.
+    IAP_command[ 4 ]    = cclk_kHz;                     //  CPU Clock Frequency (CCLK) in kHz.
+ 
+    iap_entry( IAP_command, IAP_result );
+ 
+    return ( (int)IAP_result[ 0 ] );
+}
+#endif