fork of library for MAX14661 16:2 mux
Fork of max14661 by
max14661.h@11:d3971b4fbdd8, 2015-09-29 (annotated)
- Committer:
- j3
- Date:
- Tue Sep 29 23:06:01 2015 +0000
- Revision:
- 11:d3971b4fbdd8
- Parent:
- 10:ccbe1afdab31
- Child:
- 12:f14ce75c0661
fixed some comments
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
j3 | 0:c770ad7363c8 | 1 | /******************************************************************//** |
j3 | 0:c770ad7363c8 | 2 | * @file max14661.h |
j3 | 0:c770ad7363c8 | 3 | * |
j3 | 0:c770ad7363c8 | 4 | * @author Justin Jordan |
j3 | 0:c770ad7363c8 | 5 | * |
j3 | 7:1d4e59ec0fba | 6 | * @version 1.0 |
j3 | 0:c770ad7363c8 | 7 | * |
j3 | 0:c770ad7363c8 | 8 | * Started: 11NOV14 |
j3 | 0:c770ad7363c8 | 9 | * |
j3 | 0:c770ad7363c8 | 10 | * Updated: |
j3 | 10:ccbe1afdab31 | 11 | * 29SEP15 - added second constructor that uses pointer to I2C bus |
j3 | 11:d3971b4fbdd8 | 12 | * - added destructor |
j3 | 0:c770ad7363c8 | 13 | * |
j3 | 0:c770ad7363c8 | 14 | * @brief Header file for MAX14661 class |
j3 | 0:c770ad7363c8 | 15 | * |
j3 | 0:c770ad7363c8 | 16 | *********************************************************************** |
j3 | 0:c770ad7363c8 | 17 | * |
j3 | 0:c770ad7363c8 | 18 | * @copyright |
j3 | 8:44257d87fa9e | 19 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
j3 | 0:c770ad7363c8 | 20 | * |
j3 | 0:c770ad7363c8 | 21 | * Permission is hereby granted, free of charge, to any person obtaining a |
j3 | 0:c770ad7363c8 | 22 | * copy of this software and associated documentation files (the "Software"), |
j3 | 0:c770ad7363c8 | 23 | * to deal in the Software without restriction, including without limitation |
j3 | 0:c770ad7363c8 | 24 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
j3 | 0:c770ad7363c8 | 25 | * and/or sell copies of the Software, and to permit persons to whom the |
j3 | 0:c770ad7363c8 | 26 | * Software is furnished to do so, subject to the following conditions: |
j3 | 0:c770ad7363c8 | 27 | * |
j3 | 0:c770ad7363c8 | 28 | * The above copyright notice and this permission notice shall be included |
j3 | 0:c770ad7363c8 | 29 | * in all copies or substantial portions of the Software. |
j3 | 0:c770ad7363c8 | 30 | * |
j3 | 0:c770ad7363c8 | 31 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
j3 | 0:c770ad7363c8 | 32 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
j3 | 0:c770ad7363c8 | 33 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
j3 | 0:c770ad7363c8 | 34 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
j3 | 0:c770ad7363c8 | 35 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
j3 | 0:c770ad7363c8 | 36 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
j3 | 0:c770ad7363c8 | 37 | * OTHER DEALINGS IN THE SOFTWARE. |
j3 | 0:c770ad7363c8 | 38 | * |
j3 | 0:c770ad7363c8 | 39 | * Except as contained in this notice, the name of Maxim Integrated |
j3 | 0:c770ad7363c8 | 40 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
j3 | 0:c770ad7363c8 | 41 | * Products, Inc. Branding Policy. |
j3 | 0:c770ad7363c8 | 42 | * |
j3 | 0:c770ad7363c8 | 43 | * The mere transfer of this software does not imply any licenses |
j3 | 0:c770ad7363c8 | 44 | * of trade secrets, proprietary technology, copyrights, patents, |
j3 | 0:c770ad7363c8 | 45 | * trademarks, maskwork rights, or any other form of intellectual |
j3 | 0:c770ad7363c8 | 46 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
j3 | 0:c770ad7363c8 | 47 | * ownership rights. |
j3 | 0:c770ad7363c8 | 48 | **********************************************************************/ |
j3 | 0:c770ad7363c8 | 49 | |
j3 | 0:c770ad7363c8 | 50 | |
j3 | 0:c770ad7363c8 | 51 | #ifndef MAX14661_H |
j3 | 0:c770ad7363c8 | 52 | #define MAX14661_H |
j3 | 0:c770ad7363c8 | 53 | |
j3 | 0:c770ad7363c8 | 54 | |
j3 | 0:c770ad7363c8 | 55 | #include "mbed.h" |
j3 | 0:c770ad7363c8 | 56 | |
j3 | 0:c770ad7363c8 | 57 | |
j3 | 0:c770ad7363c8 | 58 | /******************************************************************//** |
j3 | 0:c770ad7363c8 | 59 | * Max14661 Class |
j3 | 0:c770ad7363c8 | 60 | **********************************************************************/ |
j3 | 10:ccbe1afdab31 | 61 | class Max14661 |
j3 | 0:c770ad7363c8 | 62 | { |
j3 | 0:c770ad7363c8 | 63 | |
j3 | 0:c770ad7363c8 | 64 | public: |
j3 | 9:27cfbbce3094 | 65 | |
j3 | 10:ccbe1afdab31 | 66 | /** |
j3 | 10:ccbe1afdab31 | 67 | * max14661_i2c_adrs_t - enumerated MAX14661 I2C Addresses |
j3 | 10:ccbe1afdab31 | 68 | */ |
j3 | 10:ccbe1afdab31 | 69 | typedef enum |
j3 | 10:ccbe1afdab31 | 70 | { |
j3 | 10:ccbe1afdab31 | 71 | MAX14661_I2C_ADRS0 = 0x4C, |
j3 | 10:ccbe1afdab31 | 72 | MAX14661_I2C_ADRS1, |
j3 | 10:ccbe1afdab31 | 73 | MAX14661_I2C_ADRS2, |
j3 | 10:ccbe1afdab31 | 74 | MAX14661_I2C_ADRS3 |
j3 | 10:ccbe1afdab31 | 75 | }max14661_i2c_adrs_t; |
j3 | 10:ccbe1afdab31 | 76 | |
j3 | 10:ccbe1afdab31 | 77 | |
j3 | 10:ccbe1afdab31 | 78 | /** |
j3 | 10:ccbe1afdab31 | 79 | * max14661_regs_t - enumerated MAX14661 register addresses |
j3 | 10:ccbe1afdab31 | 80 | */ |
j3 | 10:ccbe1afdab31 | 81 | typedef enum |
j3 | 10:ccbe1afdab31 | 82 | { |
j3 | 10:ccbe1afdab31 | 83 | DIR0, //Switches 8A–1A direct read/write access |
j3 | 10:ccbe1afdab31 | 84 | DIR1, //Switches 16A–9A direct read/write access |
j3 | 10:ccbe1afdab31 | 85 | DIR2, //Switches 8B–1B direct read/write access |
j3 | 10:ccbe1afdab31 | 86 | DIR3, //Switches 16B–9B direct read/write access |
j3 | 10:ccbe1afdab31 | 87 | SHDW0 = 0x10, //Switches 8A–1A shadow read/write access |
j3 | 10:ccbe1afdab31 | 88 | SHDW1, //Switches 16A–9A shadow read/write access |
j3 | 10:ccbe1afdab31 | 89 | SHDW2, //Switches 8B–1B shadow read/write access |
j3 | 10:ccbe1afdab31 | 90 | SHDW3, //Switches 16B–9B shadow read/write access |
j3 | 10:ccbe1afdab31 | 91 | CMD_A, //Set mux A command (reads 0x00) |
j3 | 10:ccbe1afdab31 | 92 | CMD_B //Set mux B command (reads 0x00) |
j3 | 10:ccbe1afdab31 | 93 | }max14661_regs_t; |
j3 | 10:ccbe1afdab31 | 94 | |
j3 | 10:ccbe1afdab31 | 95 | |
j3 | 10:ccbe1afdab31 | 96 | /** |
j3 | 10:ccbe1afdab31 | 97 | * max14661_cmds_t - enumerated MAX14661 commands |
j3 | 10:ccbe1afdab31 | 98 | */ |
j3 | 10:ccbe1afdab31 | 99 | typedef enum |
j3 | 10:ccbe1afdab31 | 100 | { |
j3 | 10:ccbe1afdab31 | 101 | ENABLE_SW01, //enables sw1 on bank only |
j3 | 10:ccbe1afdab31 | 102 | ENABLE_SW02, //enables sw2 on bank only |
j3 | 10:ccbe1afdab31 | 103 | ENABLE_SW03, //enables sw3 on bank only |
j3 | 10:ccbe1afdab31 | 104 | ENABLE_SW04, //enables sw4 on bank only |
j3 | 10:ccbe1afdab31 | 105 | ENABLE_SW05, //enables sw5 on bank only |
j3 | 10:ccbe1afdab31 | 106 | ENABLE_SW06, //enables sw6 on bank only |
j3 | 10:ccbe1afdab31 | 107 | ENABLE_SW07, //enables sw7 on bank only |
j3 | 10:ccbe1afdab31 | 108 | ENABLE_SW08, //enables sw8 on bank only |
j3 | 10:ccbe1afdab31 | 109 | ENABLE_SW09, //enables sw9 on bank only |
j3 | 10:ccbe1afdab31 | 110 | ENABLE_SW10, //enables sw10 on bank only |
j3 | 10:ccbe1afdab31 | 111 | ENABLE_SW11, //enables sw11 on bank only |
j3 | 10:ccbe1afdab31 | 112 | ENABLE_SW12, //enables sw12 on bank only |
j3 | 10:ccbe1afdab31 | 113 | ENABLE_SW13, //enables sw13 on bank only |
j3 | 10:ccbe1afdab31 | 114 | ENABLE_SW14, //enables sw14 on bank only |
j3 | 10:ccbe1afdab31 | 115 | ENABLE_SW15, //enables sw15 on bank only |
j3 | 10:ccbe1afdab31 | 116 | ENABLE_SW16, //enables sw16 on bank only |
j3 | 10:ccbe1afdab31 | 117 | DISABLE_BANK, //opens all switches on bank |
j3 | 10:ccbe1afdab31 | 118 | COPY_SHADOW, //copies both shadow registers for bank |
j3 | 10:ccbe1afdab31 | 119 | NO_CHANGE, |
j3 | 10:ccbe1afdab31 | 120 | }max14661_cmds_t; |
j3 | 10:ccbe1afdab31 | 121 | |
j3 | 10:ccbe1afdab31 | 122 | |
j3 | 10:ccbe1afdab31 | 123 | /** |
j3 | 10:ccbe1afdab31 | 124 | * max14661_sw_t - enumerated MAX14661 switch bitmasks |
j3 | 10:ccbe1afdab31 | 125 | */ |
j3 | 10:ccbe1afdab31 | 126 | typedef enum |
j3 | 10:ccbe1afdab31 | 127 | { |
j3 | 10:ccbe1afdab31 | 128 | SW01 = (1 << 0), |
j3 | 10:ccbe1afdab31 | 129 | SW02 = (1 << 1), |
j3 | 10:ccbe1afdab31 | 130 | SW03 = (1 << 2), |
j3 | 10:ccbe1afdab31 | 131 | SW04 = (1 << 3), |
j3 | 10:ccbe1afdab31 | 132 | SW05 = (1 << 4), |
j3 | 10:ccbe1afdab31 | 133 | SW06 = (1 << 5), |
j3 | 10:ccbe1afdab31 | 134 | SW07 = (1 << 6), |
j3 | 10:ccbe1afdab31 | 135 | SW08 = (1 << 7), |
j3 | 10:ccbe1afdab31 | 136 | SW09 = (1 << 8), |
j3 | 10:ccbe1afdab31 | 137 | SW10 = (1 << 9), |
j3 | 10:ccbe1afdab31 | 138 | SW11 = (1 << 10), |
j3 | 10:ccbe1afdab31 | 139 | SW12 = (1 << 11), |
j3 | 10:ccbe1afdab31 | 140 | SW13 = (1 << 12), |
j3 | 10:ccbe1afdab31 | 141 | SW14 = (1 << 13), |
j3 | 10:ccbe1afdab31 | 142 | SW15 = (1 << 14), |
j3 | 10:ccbe1afdab31 | 143 | SW16 = (1 << 15) |
j3 | 10:ccbe1afdab31 | 144 | }max14661_sw_t; |
j3 | 10:ccbe1afdab31 | 145 | |
j3 | 10:ccbe1afdab31 | 146 | |
j3 | 10:ccbe1afdab31 | 147 | /**********************************************************//** |
j3 | 10:ccbe1afdab31 | 148 | * @brief Constructor for Max14661 Class. |
j3 | 10:ccbe1afdab31 | 149 | * |
j3 | 10:ccbe1afdab31 | 150 | * @details Allows user to use existing I2C object |
j3 | 10:ccbe1afdab31 | 151 | * |
j3 | 10:ccbe1afdab31 | 152 | * On Entry: |
j3 | 10:ccbe1afdab31 | 153 | * @param[in] i2c_bus - pointer to existing I2C object |
j3 | 10:ccbe1afdab31 | 154 | * @param[in] i2c_adrs - 7-bit slave address of MAX14661 |
j3 | 10:ccbe1afdab31 | 155 | * |
j3 | 10:ccbe1afdab31 | 156 | * On Exit: |
j3 | 10:ccbe1afdab31 | 157 | * @return none |
j3 | 10:ccbe1afdab31 | 158 | **************************************************************/ |
j3 | 10:ccbe1afdab31 | 159 | Max14661(I2C *i2c_bus, max14661_i2c_adrs_t i2c_adrs); |
j3 | 10:ccbe1afdab31 | 160 | |
j3 | 10:ccbe1afdab31 | 161 | |
j3 | 10:ccbe1afdab31 | 162 | /**********************************************************//** |
j3 | 10:ccbe1afdab31 | 163 | * Constructor for Max14661 Class |
j3 | 10:ccbe1afdab31 | 164 | * |
j3 | 10:ccbe1afdab31 | 165 | * On Entry: |
j3 | 10:ccbe1afdab31 | 166 | * @param[in] sda - sda pin of I2C bus |
j3 | 10:ccbe1afdab31 | 167 | * @param[in] scl - scl pin of I2C bus |
j3 | 10:ccbe1afdab31 | 168 | * @param[in] i2c_adrs - 7-bit slave address of MAX14661 |
j3 | 10:ccbe1afdab31 | 169 | * |
j3 | 10:ccbe1afdab31 | 170 | * On Exit: |
j3 | 10:ccbe1afdab31 | 171 | * @return none |
j3 | 10:ccbe1afdab31 | 172 | **************************************************************/ |
j3 | 10:ccbe1afdab31 | 173 | Max14661(PinName sda, PinName scl, max14661_i2c_adrs_t i2c_adrs); |
j3 | 10:ccbe1afdab31 | 174 | |
j3 | 10:ccbe1afdab31 | 175 | |
j3 | 10:ccbe1afdab31 | 176 | /**********************************************************//** |
j3 | 10:ccbe1afdab31 | 177 | * @brief Default destructor for Max14661 Class. |
j3 | 10:ccbe1afdab31 | 178 | * |
j3 | 10:ccbe1afdab31 | 179 | * @details Destroys I2C object if owner |
j3 | 10:ccbe1afdab31 | 180 | * |
j3 | 10:ccbe1afdab31 | 181 | * On Entry: |
j3 | 10:ccbe1afdab31 | 182 | * |
j3 | 10:ccbe1afdab31 | 183 | * On Exit: |
j3 | 10:ccbe1afdab31 | 184 | * @return none |
j3 | 10:ccbe1afdab31 | 185 | **************************************************************/ |
j3 | 10:ccbe1afdab31 | 186 | ~Max14661(); |
j3 | 10:ccbe1afdab31 | 187 | |
j3 | 4:45fa0192f66d | 188 | |
j3 | 10:ccbe1afdab31 | 189 | /******************************************************************//** |
j3 | 10:ccbe1afdab31 | 190 | * Writes given commands to CMD_A and CMD_B |
j3 | 10:ccbe1afdab31 | 191 | * |
j3 | 10:ccbe1afdab31 | 192 | * On Entry: |
j3 | 10:ccbe1afdab31 | 193 | * @param[in] cmdA - command for CMD_A |
j3 | 10:ccbe1afdab31 | 194 | * @param[in] cmdB - command for CMD_B |
j3 | 10:ccbe1afdab31 | 195 | * |
j3 | 10:ccbe1afdab31 | 196 | * On Exit: |
j3 | 10:ccbe1afdab31 | 197 | * @return return value = 0 on success, non-0 on failure |
j3 | 10:ccbe1afdab31 | 198 | **********************************************************************/ |
j3 | 10:ccbe1afdab31 | 199 | uint16_t wrt_cmd_registers(max14661_cmds_t cmdA, max14661_cmds_t cmdB); |
j3 | 4:45fa0192f66d | 200 | |
j3 | 4:45fa0192f66d | 201 | |
j3 | 10:ccbe1afdab31 | 202 | /******************************************************************//** |
j3 | 10:ccbe1afdab31 | 203 | * Writes bankA and bankB to coresponding shadow registers |
j3 | 10:ccbe1afdab31 | 204 | * |
j3 | 10:ccbe1afdab31 | 205 | * On Entry: |
j3 | 10:ccbe1afdab31 | 206 | * @param[in] bankA - binary representation of switch states |
j3 | 10:ccbe1afdab31 | 207 | * @param[in] bankB - binary representation of switch states |
j3 | 10:ccbe1afdab31 | 208 | * |
j3 | 10:ccbe1afdab31 | 209 | * On Exit: |
j3 | 10:ccbe1afdab31 | 210 | * @return return value = 0 on success, non-0 on failure |
j3 | 10:ccbe1afdab31 | 211 | **********************************************************************/ |
j3 | 10:ccbe1afdab31 | 212 | uint16_t wrt_shadow_registers(uint16_t bankA, uint16_t bankB); |
j3 | 4:45fa0192f66d | 213 | |
j3 | 4:45fa0192f66d | 214 | |
j3 | 10:ccbe1afdab31 | 215 | /******************************************************************//** |
j3 | 10:ccbe1afdab31 | 216 | * Writes bankA and bankB to coresponding direct access registers |
j3 | 10:ccbe1afdab31 | 217 | * |
j3 | 10:ccbe1afdab31 | 218 | * On Entry: |
j3 | 10:ccbe1afdab31 | 219 | * @param[in] bankA - binary representation of switch states |
j3 | 10:ccbe1afdab31 | 220 | * @param[in] bankB - binary representation of switch states |
j3 | 10:ccbe1afdab31 | 221 | * |
j3 | 10:ccbe1afdab31 | 222 | * On Exit: |
j3 | 10:ccbe1afdab31 | 223 | * @return return value = 0 on success, non-0 on failure |
j3 | 10:ccbe1afdab31 | 224 | **********************************************************************/ |
j3 | 10:ccbe1afdab31 | 225 | uint16_t wrt_dir_registers(uint16_t bankA, uint16_t bankB); |
j3 | 4:45fa0192f66d | 226 | |
j3 | 4:45fa0192f66d | 227 | |
j3 | 10:ccbe1afdab31 | 228 | /******************************************************************//** |
j3 | 10:ccbe1afdab31 | 229 | * Writes bankA and bankB to coresponding shadow register and then |
j3 | 10:ccbe1afdab31 | 230 | * issues copy command for both banks |
j3 | 10:ccbe1afdab31 | 231 | * |
j3 | 10:ccbe1afdab31 | 232 | * On Entry: |
j3 | 10:ccbe1afdab31 | 233 | * @param[in] bankA - binary representation of switch states |
j3 | 10:ccbe1afdab31 | 234 | * @param[in] bankB - binary representation of switch states |
j3 | 10:ccbe1afdab31 | 235 | * |
j3 | 10:ccbe1afdab31 | 236 | * On Exit: |
j3 | 10:ccbe1afdab31 | 237 | * @return return value = 0 on success, non-0 on failure |
j3 | 10:ccbe1afdab31 | 238 | **********************************************************************/ |
j3 | 10:ccbe1afdab31 | 239 | uint16_t set_switches(uint16_t bankA, uint16_t bankB); |
j3 | 4:45fa0192f66d | 240 | |
j3 | 4:45fa0192f66d | 241 | |
j3 | 10:ccbe1afdab31 | 242 | /**********************************************************//** |
j3 | 10:ccbe1afdab31 | 243 | * Reads data from direct access registers starting at DIR0 and |
j3 | 10:ccbe1afdab31 | 244 | * stores it in byte array pointed at by 'data' |
j3 | 10:ccbe1afdab31 | 245 | * |
j3 | 10:ccbe1afdab31 | 246 | * On Entry: |
j3 | 10:ccbe1afdab31 | 247 | * @param[in] data - pointer to byte array for storing data |
j3 | 10:ccbe1afdab31 | 248 | * |
j3 | 10:ccbe1afdab31 | 249 | * On Exit: |
j3 | 10:ccbe1afdab31 | 250 | * @param[out] data - data buffer now contains data read |
j3 | 10:ccbe1afdab31 | 251 | * from dir registers |
j3 | 10:ccbe1afdab31 | 252 | * @return return value = 0 on success, non-0 on failure |
j3 | 10:ccbe1afdab31 | 253 | **********************************************************************/ |
j3 | 10:ccbe1afdab31 | 254 | uint16_t rd_dir_registers(uint8_t* data); |
j3 | 4:45fa0192f66d | 255 | |
j3 | 4:45fa0192f66d | 256 | |
j3 | 10:ccbe1afdab31 | 257 | /**********************************************************//** |
j3 | 10:ccbe1afdab31 | 258 | * Reads data from shadow registers starting at SHDW0 and stores |
j3 | 10:ccbe1afdab31 | 259 | * it in byte array pointed at by 'data' |
j3 | 10:ccbe1afdab31 | 260 | * |
j3 | 10:ccbe1afdab31 | 261 | * On Entry: |
j3 | 10:ccbe1afdab31 | 262 | * @param[in] data - pointer to byte array for storing data |
j3 | 10:ccbe1afdab31 | 263 | * |
j3 | 10:ccbe1afdab31 | 264 | * On Exit: |
j3 | 10:ccbe1afdab31 | 265 | * @param[out] data - data buffer now contains data read |
j3 | 10:ccbe1afdab31 | 266 | * from shadow registers |
j3 | 10:ccbe1afdab31 | 267 | * @return return value = 0 on success, non-0 on failure |
j3 | 10:ccbe1afdab31 | 268 | **************************************************************/ |
j3 | 10:ccbe1afdab31 | 269 | uint16_t rd_shadow_registers(uint8_t* data); |
j3 | 10:ccbe1afdab31 | 270 | |
j3 | 10:ccbe1afdab31 | 271 | private: |
j3 | 10:ccbe1afdab31 | 272 | |
j3 | 10:ccbe1afdab31 | 273 | I2C *_p_i2c; |
j3 | 10:ccbe1afdab31 | 274 | bool _i2c_owner; |
j3 | 10:ccbe1afdab31 | 275 | uint8_t _w_adrs; |
j3 | 10:ccbe1afdab31 | 276 | uint8_t _r_adrs; |
j3 | 0:c770ad7363c8 | 277 | }; |
j3 | 0:c770ad7363c8 | 278 | |
j3 | 0:c770ad7363c8 | 279 | |
j3 | 0:c770ad7363c8 | 280 | #endif /* MAX14661_H*/ |