Justin Jordan / ard2pmod

Fork of Library for MAXREFDES72# that supports configuration of shield for different PMOD types and the DS3231 RTC

Dependencies:   ds3231 max14661

Dependents:   ard2pmod_demo

Fork of ard2pmod by Maxim Integrated

Diff: ard2pmod.cpp

Revision:
18:6d82914432e2
Parent:
17:294c52822d28
--- a/ard2pmod.cpp	Tue Mar 29 01:22:08 2016 +0000
+++ b/ard2pmod.cpp	Mon Apr 25 17:26:53 2016 +0000
@@ -35,42 +35,34 @@
 
 
 //*********************************************************************
-Ard2Pmod::Ard2Pmod(): 
-_mux(D14, D15, Max14661::MAX14661_I2C_ADRS0)
-{
-    _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
-}
-
-
-//*********************************************************************
-Ard2Pmod::Ard2Pmod(pmod_type_t pmod_type): 
+Ard2Pmod::Ard2Pmod(PmodType pmod_type, PinName ow_pin): 
 _mux(D14, D15, Max14661::MAX14661_I2C_ADRS0)
 {
     switch(pmod_type)
     {
         case PMOD_TYPE_I2C_A:
             _mux.set_switches((Max14661::SW12 | Max14661::SW09), (Max14661::SW11 | Max14661::SW10));
-            break;
+        break;
             
         case PMOD_TYPE_I2C_B:
             _mux.set_switches((Max14661::SW09 | Max14661::SW07), (Max14661::SW10 | Max14661::SW08));
-            break;
+        break;
             
         case PMOD_TYPE_I2C_AB:
             _mux.set_switches((Max14661::SW12 | Max14661::SW09 | Max14661::SW07), (Max14661::SW11 | Max14661::SW10 | Max14661::SW08));
-            break;
+        break;
             
         case PMOD_TYPE_1_GPIO:
             _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
-            break;
+        break;
             
         case PMOD_TYPE_2_SPI:
             _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
-            break;
+        break;
             
         case PMOD_TYPE_3_UART:
             _mux.set_switches((Max14661::SW12 | Max14661::SW01), (Max14661::SW11 | Max14661::SW02));
-            break;
+        break;
             
         case PMOD_TYPE_4_UART:
             _mux.set_switches((Max14661::SW13 | Max14661::SW02), (Max14661::SW12 | Max14661::SW01));
@@ -78,14 +70,147 @@
             
         case PMOD_TYPE_5_HBRIDGE:
             _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
-            break;
+        break;
             
         case PMOD_TYPE_6_HBRIDGE:
             _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
-            break;
+        break;
+            
+        case PMOD_TYPE_7_ONEWIRE_A:
+        
+            //set switches for owm_A
+            switch(ow_pin)
+            {
+                case D0:
+                    _mux.set_switches((Max14661::SW01 | Max14661::SW11), 0);
+                break;
+                
+                case D1:
+                    _mux.set_switches((Max14661::SW02 | Max14661::SW11), 0);
+                break;
+                
+                case D2:
+                    _mux.set_switches((Max14661::SW03 | Max14661::SW11), 0);
+                break;
+                
+                case D3:
+                    _mux.set_switches((Max14661::SW04 | Max14661::SW11), 0);
+                break;
+                
+                case D4:
+                    _mux.set_switches((Max14661::SW05 | Max14661::SW11), 0);
+                break;
+                
+                case D5:
+                    _mux.set_switches((Max14661::SW06 | Max14661::SW11), 0);
+                break;
+                
+                case D6:
+                    _mux.set_switches((Max14661::SW07 | Max14661::SW11), 0);
+                break;
+                
+                case D7:
+                    _mux.set_switches((Max14661::SW08 | Max14661::SW11), 0);
+                break;
+                
+                case D8:
+                    _mux.set_switches((Max14661::SW16 | Max14661::SW11), 0);
+                break;
+                
+                case D9:
+                    _mux.set_switches((Max14661::SW15 | Max14661::SW11), 0);
+                break;
+                
+                case D10:
+                    _mux.set_switches((Max14661::SW14 | Max14661::SW11), 0);
+                break;
+                
+                case D11:
+                    _mux.set_switches((Max14661::SW13 | Max14661::SW11), 0);
+                break;
+                
+                case D12:
+                    _mux.set_switches((Max14661::SW12 | Max14661::SW11), 0);
+                break;
+                
+                default:
+                    _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
+                break;
+            }  
+            
+        break;
+            
+        case PMOD_TYPE_8_ONEWIRE_B:
+            
+            //set switches for owm_B
+            switch(ow_pin)
+            {
+                case D0:
+                    _mux.set_switches(0, (Max14661::SW01 | Max14661::SW08));
+                break;
+                
+                case D1:
+                    _mux.set_switches(0, (Max14661::SW02 | Max14661::SW08));
+                break;
+                
+                case D2:
+                    _mux.set_switches(0, (Max14661::SW03 | Max14661::SW08));
+                break;
+                
+                case D3:
+                    _mux.set_switches(0, (Max14661::SW04 | Max14661::SW08));
+                break;
+                
+                case D4:
+                    _mux.set_switches(0, (Max14661::SW05 | Max14661::SW08));
+                break;
+                
+                case D5:
+                    _mux.set_switches(0, (Max14661::SW06 | Max14661::SW08));
+                break;
+                
+                case D6:
+                    _mux.set_switches(0, (Max14661::SW07 | Max14661::SW08));
+                break;
+                
+                case D7:
+                    _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
+                break;
+                
+                case D8:
+                    _mux.set_switches(0, (Max14661::SW16 | Max14661::SW08));
+                break;
+                
+                case D9:
+                    _mux.set_switches(0, (Max14661::SW15 | Max14661::SW08));
+                break;
+                
+                case D10:
+                    _mux.set_switches(0, (Max14661::SW14 | Max14661::SW08));
+                break;
+                
+                case D11:
+                    _mux.set_switches(0, (Max14661::SW13 | Max14661::SW08));
+                break;
+                
+                case D12:
+                    _mux.set_switches(0, (Max14661::SW12 | Max14661::SW08));
+                break;
+                
+                case D13:
+                    _mux.set_switches(0, (Max14661::SW11 | Max14661::SW08));
+                break;
+                
+                default:
+                    _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
+                break;
+            } 
+            
+        break;
             
         default:
             _mux.wrt_cmd_registers(Max14661::DISABLE_BANK, Max14661::DISABLE_BANK);
+        break;
     } 
 }